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Model
LC-42XD1E (serv.man6)
Pages
22
Size
1.2 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD / Major IC Information
File
lc-42xd1e-sm6.pdf
Date

Sharp LC-42XD1E (serv.man6) Service Manual ▷ View online

LC-42XD1E/RU
5 – 13
8. IC1710: RH-iXB946WJZZQ
FPGA
Pin No.
Pin Name
I/O
Pin Function
Sheet name
1
EXP[8]
O
REG2 light control system identify
REG2
2
EXP[9]
O
REG external sync identify
REG
3
EXP[10]
O
QS parameter
TEMP3
4
EXP[11]
O
QS parameter
TEMP2
5
EXP[12]
O
QS parameter
TEMP1
6
EXP[13]
O
QS parameter
QSSET
7
EXP[14]
O
LED SLEEP (ON at “L”)
LEDSLP
8
EXP[15]
O
LED OPC (ON at “L”)
LEDOPC
9
VCCIO1 3.3V
Power supply 3.3V
3.3V
10
GND
Ground
GND
11
GND
Ground
GND
12
PCLK
I
Panel clock 74.25MHz
PCLK
13
VCCINT 3.3V
Power supply 3.3V
3.3V
14
I/O
GND*
NC
15
I/O
GND*
NC
16
I/O
GND*
NC
17
OSCOUT
O
Light control clock output (No lamp light-up at initial “L”)
OSCOUT
18
I/O
GND*
NC
19
OFLOUT
O
Light control PWM output (No lamp light-up at initial “L”)
OFL1OUT
20
OFL2OUT
O
Light control PWM output
OFL2OUT
21
I/O
GND*
NC
22
(TMS)
I
Inline Program JTAG TMS/ OPEN
TMS
23
(TDI)
I
Inline Program JTAG DataIn / OPEN
TDI
24
(TCK)
I
Inline Program JTAG Clock/ OPEN
TCK
25
(TDO)
O
Inline Program JTAG DataOut / OPEN
TDO
26
I/O
O
Write mode Vpp-cont
NC
27
I/O
GND*
NC
28
I/O
GND*
NC
29
I/O
GND*
NC
30
I/O
GND*
NC
31
VCCIO1 3.3V
Power supply 3.3V
3.3V
32
GND
Ground
GND
33
I/O
GND*
NC
34
EXP[16]
O
MSP FRC Reset Note 2
RESET_A
35
EXP[17]
O
DTU-CVBS/ (S-VY
⋅CVBS) switching
G_ONSYNC
36
EXP[18]
O
DTV/PC/HDMI switching
DTVPC
37
EXP[19]
O
DTV/PC/HDMI switching
DTVHDMI
38
EXP[20]
O
E2PROM WP for HDMI
HDMI_WP
39
EXP[21]
O
Panel flip horizontal
LCDLR
40
EXP[22]
O
Panel flip vertical
LCDUD
41
EXP[23]
O
Panel 50/60Hz
FRAME
42
I/O
GND*
NC
43
I/O
GND*
NC
44
I/O
GND*
NC
45
VCCIO1 3.3V
Power supply 3.3V
3.3V
46
GND
Ground
GND
47
EXP[24]
O
Common Bias Adjustment write Protect.
TCON_WP
48
EXP[25]
O
Not used
NC
49
EXP[26]
O
Change shear impulse on/off.
CSI
50
EXP[27]
O
S+8V Control Signal
S+8V-CTL
51
EXP[28]
O
Memory Bank Select.
BANK
52
EXP[29]
O
Not used
NC
53
EXP[30]
O
Not used
NC
54
EXP[31]
O
Not used
NC
55
I/O
GND*
NC
56
GND*
NC
57
I/O
GND*
NC
58
I/O
GND*
NC
59
VCCIO2 3.3V
Power supply 3.3V
3.3V
60
GND
Ground
GND
61
I/O
GND*
NC
62
GCLR
I
VGC_Reset_Line
RESET_N
     LC-42XD1E/RU
5 – 14
GND*: Non-configured pins are fixed at GND.
Terminals' electrical characteristics are referred to in the EPM240T100C5N data sheet of Altera.
NOTE: 1. Reset output monitor terminal with EXP31 in use.
2. Composed of GCLR and OR.
63
VCCINT 3.3V
Power supply 3.3V
3.3V
64
SCK
I
from VGC
SCK
65
GND
Ground
GND
66
SEN
I
from VGC
FPGA_SDE
67
SDAI
I
from VGC
FPGA_SDA
68
I/O
GND*
NC
69
SDAO
O
Write mode RESET output
FPGA_SDAO
70
I/O
GND*
NC
71
I/O
GND*
NC
72
I/O
GND*
NC
73
I/O
GND*
NC
74
I/O
GND*
NC
75
OFL2EN
I
OFL2_EN external setting terminal
GND
76
I/O
GND*
NC
77
I/O
O
VGC write Open drain (Write mode at “H”)
BOOT
78
I/O
GND*
NC
79
GND
Ground
GND
80
VCCIO2 3.3V
Power supply 3.3V
3.3V
81
I/O
I
VSYNC_OSC
VSYNC
82
I/O
I
HSYNC_OSC
HSYNC
83
I/O
GND*
NC
84
I/O
GND*
NC
85
EXP[0]
O
DTI2CSEL
DTI2CSEL
86
EXP[1]
O
DTM_RESET
DTM_RESET
87
EXP[2]
O
DTU_ON (Analog tuner at “L” D-tuner at “H”)
DTU_ON
88
EXP[3]
O
232C on/off SW (RS232C action at “H”: VGC write enabled)
IREM_SW
89
EXP[4]
O
STB (LAMP ON)
STB
90
EXP[5]
O
S2_MUTE
S2MUTE
91
EXP[6]
O
ANT+5V ON
ANT+5V ON
92
EXP[7]
O
S_MUTE
S-MUTE
93
GND
Ground
GND
94
VCCIO2 3.3V
Power supply 3.3V
3.3V
95
I/O
GND*
NC
96
I/O
GND*
NC
97
I/O
GND*
NC
98
I/O
GND*
TP1703
99
I/O
GND*
NC
100
OFL-SET-IN
I
OFLWD[8] external setting terminal
GND
Pin No.
Pin Name
I/O
Pin Function
Sheet name
LC-42XD1E/RU
5 – 15
9. IC1712: VHiMP1410ES-1Y
Step Down Converter.
10. IC1706: VHiMP1583++-1Y
Step Down Converter
Pin No.
Pin Name
I/O
Pin Function
1
BS
I
High-Side Gate Drive Boost input.
BS supplies the drive for the high-side n-channel MOSFET switch.
Connect a 10nF or greater capacitor from SW to BS to power the high-side switch.
2
IN
I
Power input.
IN supplies the power to the IC, as well as the step-down converter switches.
Drive IN with a 4.75V to 15V power source.
Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC.
See input Capacitor.
3
SW
O
Power Switching Output. 
SW is the switching node that supplies power to the output.
Connect the output LC filter from SW to the output load.
Note that a capacitor is required from SW to BS to power the high-side switch.
4
GND
Ground.
5
FB
I
Feedback input.
FB senses the output voltage to regulate that voltage.
Drive FB with a resistive voltage divider from the output voltage. 
The feedback threshold is 1.22V.
See Setting the Output Voltage.
6
COMP
Compensation Node.
COMP is used to compensate the regulation control loop.
Connect a series RC network from COMP to GND to compensate the regulation control loop.
See Compensation.
7
EN
I
Enable input.
EN is a digital input that turns the regulator on or off.
Drive EN high to turn on the regulator, drive it low to turn it off.
For automatic startup, leave EN unconnected.
8
N/C
No Connect.
Pin No.
Pin Name
I/O
Pin Function
1
BS
I
High-Side Gate Drive Boost Input.
BS supplies the drive for the high-side n-channel MOSFET Switch.
Connect a 4.7nF or greater capacitor from SW to BS to power the high side switch.         
2
IN
I
Power input.
IN supplies the power to the IC, as well as the step-down converter switches.
Drive IN with a 4.75V to 23V power source.
Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC.
See Input Capacitor.        
3
SW
O
Power Switching Output.
SW is the switching node that supplies power to the output.
Connect the output LC filter from SW to the output load.
Note that a capacitor is required from SW to BS to power the high-side switch.        
4
GND
Ground. (Note: Connect the exposed pad on backside to Pin4).         
5
FB
I
Feedback input.
FB senses the output voltage to regulate that voltage.
Drive FB with a resistive voltage divider from the output voltage.
The feedback threshold is 1.222V.
See Setting the Output Voltage.     
6
COMP
I
Compensation Node.
COMP is used to compensate the regulation control loop.
Connect a series RC network from COMP to GND to compensate the regulation control loop.
In same cases, an additional capacitor from COMP to GND is required.
See Compensation.        
7
EN
I
Enable input 
EN is a digital input that turns the regulator on or off.
Drive EN high to turn on the regulator, drive it low to turn it off.
For automatic startup, leave EN unconnected.        
8
SS
I
Soft Start Control input.
SS controls the soft start period.
Connect a capacitor from SS to GND to set the soft-start period.
A 0.1
µF capacitor sets the soft-start period to l0ms
To disable the soft-start feature CIeave SS unconnected.       
     LC-42XD1E/RU
5 – 16
11. IC301/302: VHiTDA8931T-1Y
SOUND AMP
12. IC4001: RH-iXB680WJZZQ
DIGITAL-PROCESSOR
Pin No.
Pin Name
I/O
Pin Function
1
VSSD
negative digital supply voltage; heat spreader
2
VSSA
Negative analogue supply voltage.
3
INN
I
inverting input.
4
INP
I
non inverting input.
5
VDDA
positive analog supply voltage.
6
POWERUP
I
power-up input.
7
ENABLE
I
enable input.
8
DIAG
O
diagnostic output.
9
CGND
control ground; reference ground for pins POWERUP, ENABLE and DIAG.
10
VSSD
negative digital supply voltage; heat spreader.
11
VSSD
negative digital supply voltage; heat spreader.
12
OVP
I
overvoltage protection reference input.
13
HVP
O
half supply voltage output for charging SE capacitor.
14
STABI
I
decoupling of internal stabilizer.
15
VSSP
negative power supply voltage.
16
OUT
O
PWM output.
17
BOOT
I
bootstrap capacitor connection.
18
VDDP
positive power supply voltage.
19
HVPI
I
half supply voltage output for reference voltage of input circuitry.
20
VSSD
negative digital supply voltage; heat spreader.
Pin No.
Pin Name
I/O
Pin Function
NET NAME
A8, B8, B19, B20, C8, D8, 
F1-F4, U23, U24, V1-V4, 
AA23-AA26, AC7, AC15, 
AD7, AD15, AE7, AE15, 
AF7, AF15
VDD
1.8 V power supply
P1.8V
B22, C3, C4, C10, D3, D4, 
D10, E4, G25, M1-M4, 
W23, W24, AC3, AC4, 
AC10, AC13, AC19, 
AC23, AC24, AD3, AD4, 
AD10, AD13, AD19, 
AD23, AD24
VDD3
3.3 V power supply
P3.3V
AD6
RTCVDD
Low power controller 1.8 V power supply
P1.8V
B13, B21, D25, K10-K17, 
L10-L17, M10-M17, N10-
N17, P10-P17, R10-R17, 
T10-T17, U10-U17
GND
Ground for power supplies
GND
C4
Others
Typical load, but the maximum is 75 pF.
S8
SDRAM/EMI
Typical load, but the maximum is 75 pF.
S8b
SDRAM/EMI
Typical load, but the maximum is 75 pF.
E8
EMI (programmable)
Typical load, but the maximum is 75 pF.
P4
PIO
Typical load, but the maximum is 75 pF.
AE11
VDDVDACRGB
3.3 V power supply for RGB video DAC
VDDDAC
AE9
VDDVDACYCC
3.3 V power supply for YCC video DAC
VDDDAC
AD11
GNDVDACRGB
Ground for RGB video DAC
GNDDAC
AD9
GNDVDACYCC
Ground for YCC video DAC
GNDDAC
AD8
SHIELDVDAC
Shield ground for 2 x video DACs
GND A
AE10
IREFDACRGB
RGB video DAC current reference
YOUT
AE8
IREFDACYCC
YCC video DAC current reference
AC9
VREFDACRGB
RGB video DAC voltage reference
AC8
VREFDACYCC
YCC video DAC voltage reference
A10
VDDVPLL
3.3 V power for video PLL
VDDPLL
C13
VDDAUDIOFSYN
1.8 V dedicated power for low jitter audio clock fre-
quency synthesizer
VDDF3
B12
GNDAUDIOFSYN
Dedicated ground for low jitter audio clock frequency 
synthesizer
GNDF3
C12
VDDGENFSYN
1.8 V dedicated power for nonaudio clock frequency 
synthesizer
VDDF3
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