Sharp LC-32LD145E Service Manual ▷ View online
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1.1. General Block Diagram
0.1
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1.2. MB82 Placement of Blocks
0.2
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1. TUNER(MXL601)
MxL601 is a highly integrated low-power silicon tuner IC targeting all global analog and
digital cable standards as well as digital terrestrial reception standards. Broadband input
filtering and channel filtering have been completely integrated on-chip. This integration
enables a very compact design requiring a small footprint, low bill-of-materials cost, and low
power
consumption. A signal at the 753 RF input is filtered and converted to a programmable IF
output up to 44MHz. Automatic gain control, LO generation, and channel selectivity
functions are completely integrated on the chip, which simplifies boardlevel design. All
functions of the IC can be controlled via I2C interface. MxL601 is available in a 4 x 4 mm2
24-pin QFN package.
Features :
digital cable standards as well as digital terrestrial reception standards. Broadband input
filtering and channel filtering have been completely integrated on-chip. This integration
enables a very compact design requiring a small footprint, low bill-of-materials cost, and low
power
consumption. A signal at the 753 RF input is filtered and converted to a programmable IF
output up to 44MHz. Automatic gain control, LO generation, and channel selectivity
functions are completely integrated on the chip, which simplifies boardlevel design. All
functions of the IC can be controlled via I2C interface. MxL601 is available in a 4 x 4 mm2
24-pin QFN package.
Features :
Tuning range from 44MHz to 1002MHz
Programmable channel bandwidths of 6, 7,and 8MHz
Integrated channel filtering requiring noexternal SAW filter for digital applications
Low power consumption with 3.3V and1.8V dual-supply operation351 mW (Digital
Programmable channel bandwidths of 6, 7,and 8MHz
Integrated channel filtering requiring noexternal SAW filter for digital applications
Low power consumption with 3.3V and1.8V dual-supply operation351 mW (Digital
Terrestrial)
On-chip voltage regulator enables singlesupply 3.3V operation
Programmable IF frequency and IF spectrum inversion
Reference clock output available for re-use by demodulators and additional tuners in
Programmable IF frequency and IF spectrum inversion
Reference clock output available for re-use by demodulators and additional tuners in
multi-channel applications
Input power reporting
General purpose open-drain output GPO available for controlling off-chip circuitry
Integrated on-chip programmable loading capacitors for the reference crystal
I2C-compatible digital control interface
RoHS compliance
General purpose open-drain output GPO available for controlling off-chip circuitry
Integrated on-chip programmable loading capacitors for the reference crystal
I2C-compatible digital control interface
RoHS compliance
BLOCK DIAGRAM
CIRCUIT DESCRIPTIONS
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2. AUDIO AMPLIFIER STAGE
TAS5721 (optional)
2.1. General Description
The TAS5721 is a 15-W stereo or 2x10 W + 1x15 W2.1 device, efficient, digital audio-power
amplifier fordriving stereo bridge-tied speakers. One serial datainput allows processing of
up to two discrete audiochannels and seamless integration to most digitalaudio processors
and MPEG decoders. The deviceaccepts a wide range of input data and data rates. Afully
programmable data path routes these channelsto the internal speaker drivers.The TAS5721
is a slave-only device receiving allclocks from external sources. The TAS5721 operateswith
a PWM carrier between a 384-kHz switching rateand a 352-KHz switching rate, depending
on the inputsample rate. Oversampling combined with a fourth- order noise shaper provides
a flat noise floorand excellent dynamic range from 20 Hz to 20 kHz.
2.2. Features
• Audio Input/Output
– 15Wx2 into 8
– 15Wx2 into 8
– Supports Single Device 0.1, 2.0, 2.1 Modes
– Wide PVDD Range, From 4.5 V to 26 V Performance
– Efficient Class-D Operation Eliminates Need for Heatsinks
– Requires Only 3.3 V and PVDD
– One Serial Audio Input (Two Audio Channels)
– I2C Address Selection via PIN (Chip Select)
– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)
– External Headphone-Amplifier Shutdown Signal
– Wide PVDD Range, From 4.5 V to 26 V Performance
– Efficient Class-D Operation Eliminates Need for Heatsinks
– Requires Only 3.3 V and PVDD
– One Serial Audio Input (Two Audio Channels)
– I2C Address Selection via PIN (Chip Select)
– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)
– External Headphone-Amplifier Shutdown Signal
– Integrated CAP-Free Headphone Amplifier
– Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs
• Audio/PWM Processing
– Independent Channel Volume Controls With The 24-dB to Mute
– Separate Dynamic Range Control for Satellite and Sub Channels
– 21 Programmable Biquads for Speaker EQ
– Programmable Coefficients for DRC Filters
– DC Blocking Filters
– Support for 3D Effects
– Independent Channel Volume Controls With The 24-dB to Mute
– Separate Dynamic Range Control for Satellite and Sub Channels
– 21 Programmable Biquads for Speaker EQ
– Programmable Coefficients for DRC Filters
– DC Blocking Filters
– Support for 3D Effects
• General Features
– Serial Control Interface Operational Without MCLK
– Factory-Trimmed Internal Oscillator for Automatic Rate Detection
– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package
– Thermal and Short-Circuit Protection
– Serial Control Interface Operational Without MCLK
– Factory-Trimmed Internal Oscillator for Automatic Rate Detection
– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package
– Thermal and Short-Circuit Protection
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