Sharp LC-32GD9EK (serv.man11) Service Manual ▷ View online
62
LC-26GA5E
LC-32GA5E
LC-32GD9E
LC-37GD9E
* 4MHz reference frequency input [signal from phase-locked loop (PLL) tuning system] or operating as crystal
oscillator.
* VIF Automatic Gain Control (AGC) detector for gain control operating as a peak sync detector for negative
modulated signals and as a peak white detector for positive modulated signals.
IC 202: COFDM DECODER.
Part number: STV0360C
Sharp code: RH-IXB682WJZZQ
The STV0360C is a COFDM ( codec orthogonal frequency division multiplex) demodulator that performs IF to MPEG-
2 block processing of OFDM carriers. It is intended for digital terrestrial receivers for compressed video, sound
and data services. It implements all the functions from the tuner IF output to the MPEG-2 transport stream input. The
STV0360C integrates an A/D converter that delivers the required performance to handle up to 64 QAM
carriers in a direct IF sampling architecture.
IC204: I2C BUS SELECTOR (TUNER CONTROLLED FROM VCTP OR COFDM DECODER).
Part number: SN74LV4053APWR
Sharp code:
VHILV4053AT-1Y
The SN74LV4053APWR is a high-speed CMOS analog multiplexer/demultiplexer backed by silicon gate CMOS tech-
nology. The multiplexer function includes the selection and mixing of analog and digital signals. The chip include two
independent 3 channels selectors. A digital signal through the control terminal turns on the switch of a corresponding
channel.
KD628WJ (DIGITAL UNIT):
IC4001: DIGITAL PROCESSOR MPEG 1/2 DECODER (Audio/Video).
Part number: STI5516AUCL
Sharp code:
RH-IXB680WJZZQ
The STi5516 is a device that integrates all of the back-end functions required for mainstream set-top boxes . These
include:
*An enhanced ST20 32-bit RISC CPU with a 166MHz clock, 8Kbytes of instruction cache, 8Kbytes of data cache and
8Kbytes of embedded SRAM.
*A 16-bit, 133MHz Shared Memory Interface, with support for 64- and 128-bit confi gurations.
*A programmable External Memory Interface supporting six separately confi gurable banks of SRAM, Flash and
DRAM.
*An MPEG-2 (MP@ML) decoder, including trick modes such as smooth fast-forward and rewind.
*A Graphics/Display unit with fi ve display panes, alpha blending, antialiasing and antifl utter fi lters, subpicture de-
coder, and display compositor with separate OSD (On-Screen Display) controls for TV and VCR outputs.
PAL/NTSC/SECAM encoder.
*Audio subsystem with embedded DSP for all popular audio formats.
*A full range of on-chip peripherals, including fi ve UARTs, six parallel I/O banks, two smart card interfaces, four PWM
channels, teletext serializer, multi-channel IR transmitter/receiver, and a modem analog front-end interface.
IC 4203: 16 Mbit Flash Memory (Program Memory).
Part number: MBM29LV160BE70TN
Sharp code:
RH-IXA964WJN1
IC 4201 & IC 4202: 64Mbit SDRAM (Temporary Data).
Part number: KAS641632H-UC75
Sharp code: RH-IXB076WJZZQ
IC4204: NVM 64Kb-E2PROM FOR DIGITAL PROCESSOR (IC4001).
Part number: BR24L64F
Sharp code:
VHIBR24L64F-1Y
The BR24L64F is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores all data
related to the Digital Module (Channels, User settings, etc.).
IC4003: RESET ICs FOR DIGITAL PROCESSOR (IC4001).
Part number: BU4228G
Sharp code: VHIBU4228G+-1Y
Low voltage detector IC with adjustable output delay. Standard detection voltage = 2.8V.
63
LC-26GA5E
LC-32GA5E
LC-32GD9E
LC-37GD9E
IC4402 & IC4405: OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS.
Part number: SN74LVC573APWR
Sharp code:
VHILVC573AP-1Y
These devices feature 3-state outputs designed specifi cally for driving highly capacitive or relatively low-impedance
loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports,
bidirectional bus drivers, and working registers. In this design additionally are isolating digital processor (IC4001)
from PCMCIA connector.
IC4401: LOW VOLTAGE OCTAL BUS TRANSCEIVER WITH 5V TOLERANT INPUTS AND OUTPUTS.
Part number: TC74LCX245FS
Sharp code: VHICLCX245-2Y
The device is designed for working in 3.3V systems but could be used to interface to 5V supply environment for both
inputs and outputs. The direction of the data transmission is controlled by the level of the DIR
input. The OE input could be used to isolate the device of the busses (PCMCIA and Digital Processor).
IC4404: LOW VOLTAGE BUFFER / LINE DRIVER WITH 5V TOLERANT INPUTS AND OUTPUTS.
Part number: 74LCX244AE
Sharp code:
VHILCX244MT-1Y
The LCX244 contains eight non-inverting buffers with 3-STATE outputs. The device may be employed as a memory
address driver, clock driver and bus-oriented transmitter/receiver. The LCX244 is designed for low voltage
(2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.
64
LC-26GA5E
LC-32GA5E
LC-32GD9E
LC-37GD9E
SiI 9021
SiI-DS-0117
Pin Diagram
144-Pin
TQFP
SiI 9021
(Top View)
Figure 1. Pin Diagram
2. Detailed ICs Information
2.1.2. Block Diagram
SiI 9021
SiI-DS-0117
SiliconImage Confidential
For
Sharp
Internal use Only
Functional Description
SiI 9021
SiI 9021
PanelLink
TMDS
PanelLink
TMDS
Figure 3. Functional Block Diagram
SiI 9021
The SiI 9021 supports two HDMI input ports. Only one port may be active at any time.
2.1. IC1905 (VHISII9021+-1Q)
2.1.1. Pinning
65
LC-26GA5E
LC-32GA5E
LC-32GD9E
LC-37GD9E
2.2. IC3002 (RH-IXB698WJZZQ)
2.2.1. Pin Connections and Short Description
ADVANCE INFORMATION
VCT 69xyP
Volume 1: General Description
Micronas
November 3, 2004; 6251-644-1-1
AI
1-55
3.12.Pin Connections and Short Description
NC = not connected
LV = if not used, leave vacant
OBL = obligatory; connect as described in circuit
diagram
IN = Input Pin
ANA = Analog Pin
OUT = Output Pin
SUPPLY = Supply Pin
VCTP Pin No.
Pin Name
Type
Connection
Short Description
PLQFP
208-1
(If not used)
1
656O6
P4_6
TDOFW
IN/OUT
LV
Digital 656 Bit 6 Output
Port 4, Bit 6 Input/Output
JTAG Interface Data Output (firmw. Controler)
2
656O5
P4_5
TDIFW
IN/OUT
LV
Digital 656 Bit 5 Output
Port 4, Bit 5 Input/Output
JTAG Interface Data Input (firmw. Controler)
3
656O4
P4_4
TMSFW
IN/OUT
LV
Digital 656 Bit 4 Output
Port 4, Bit 4 Input/Output
JTAG Interface Mode Select Input (fw. Contr.)
4
656O3
P4_3
TCLK
IN/OUT
LV
Digital 656 Bit 3 Output
Port 4, Bit 3 Input/Output
JTAG Interface Clock Input (TV Controler)
5
656O2
P4_2
TDO
IN/OUT
LV
Digital 656 Bit 2 Output
Port 4, Bit 2 Input/Output
JTAG Interface Data Output (TV Controler)
6
656O1
P4_1
TDI
IN/OUT
LV
Digital 656 Bit 1 Output
Port 4, Bit 1 Input/Output
JTAG Interface Data Input (TV Controler)
7
656O0
P4_0
TMS
IN/OUT
LV
Digital 656 Bit 0 Output (LSB)
Port 4, Bit 0 Input/Output
JTAG Interface Mode Select Input (TV Contr.)
8
RESETQ
IN/OUT
OBL
Reset Input/Output
9
AIN1R
IN
GND
Analog Audio 1 Input, Right
10
AIN1L
IN
GND
Analog Audio 1 Input, Left
11
AIN2R
IN
GND
Analog Audio 2 Input, Right
12
AIN2L
IN
GND
Analog Audio 2 Input, Left
13
AIN3R
IN
GND
Analog Audio 3 Input, Right
14
AIN3L
IN
GND
Analog Audio 3 Input, Left
15
AIN4R
IN
GND
Analog Audio 4 Input, Right
16
AIN4L
IN
GND
Analog Audio 4 Input, Left
17
VREFAU
ANA
OBL
Reference Voltage, Audio
18
VSUP8.0AU
SUPPLY
OBL
Supply Voltage Analog Audio, 8.0 V
19
GNDA
SUPPLY
OBL
Ground Analog Audio, Platform Ground
20
SGND
ANA
OBL
Analog Signal GND
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