Sharp 32JF-77 (serv.man13) Service Manual ▷ View online
68
32JF-77H
SDA 6000 (IC6001)
• High-speed Synchronous Serial Interface (SSC). Full- and Half-duplex synchronous
up to 16.5 Mbaud
• 3 Independent, HW-supported Multi Master/Slave I
2
C Channels at 400 Kbit/s
• 16-Bit Watchdog Timer (WDT)
• Real Time Clock (RTC)
• On Chip Debug Support (OCDS)
• 4-Channel 8-bit A/D Converter
• 42 Multiple Purpose Ports
• 8 External Interrupts
• 33 Interrupt Nodes
• Real Time Clock (RTC)
• On Chip Debug Support (OCDS)
• 4-Channel 8-bit A/D Converter
• 42 Multiple Purpose Ports
• 8 External Interrupts
• 33 Interrupt Nodes
Display Features
• OSD size from 0 to 2046 (0 to 1023) pixels in horizontal (vertical) direction
• Frame Buffer Based Display
• 2 HW Display Layers
• Support of Double Page Level 2.5 TTX in 100 Hz Systems
• Support of Transparency for both Layers Pixel by Pixel
• User Programmable Pixel Frequency from 10.0 MHz to 50 MHz
• Up to 65536 Displayable Colors in one Frame
• DMA Functionality
• Graphic Accelerator Functions (Draw Lines, Draw and Fill Rectangle, etc.)
• 1, 2, 4 or 8-bit Bitmaps (up to 256 out of 4096 colors)
• 12 bit/16 bit RGB Mode for Display of up to 65535 Colors
• HW-support for Proportional Characters
• HW-support for Italic Characters
• User Definable Character Fonts
• Fast Blanking and Contrast Reduction Output
• Double resolution graphic for interlaced sync rasters (SDA6001 only)
• Frame Buffer Based Display
• 2 HW Display Layers
• Support of Double Page Level 2.5 TTX in 100 Hz Systems
• Support of Transparency for both Layers Pixel by Pixel
• User Programmable Pixel Frequency from 10.0 MHz to 50 MHz
• Up to 65536 Displayable Colors in one Frame
• DMA Functionality
• Graphic Accelerator Functions (Draw Lines, Draw and Fill Rectangle, etc.)
• 1, 2, 4 or 8-bit Bitmaps (up to 256 out of 4096 colors)
• 12 bit/16 bit RGB Mode for Display of up to 65535 Colors
• HW-support for Proportional Characters
• HW-support for Italic Characters
• User Definable Character Fonts
• Fast Blanking and Contrast Reduction Output
• Double resolution graphic for interlaced sync rasters (SDA6001 only)
Acquisition Features
• Two Independent Data Slicers (One Multistandard Slicer + one WSS-only Slicer)
• Parallel Multi-norm Slicing (TTX, VPS, WSS, CC, G+)
• Four Different Framing Codes Available
• Data Caption only Limited by available Memory
• Programmable VBI-buffer
• Full Channel Data Slicing Supported
• Fully Digital Signal Processing
• Noise Measurement and Controlled Noise Compensation
• Attenuation Measurement and Compensation
• Group Delay Measurement and Compensation
• Exact Decoding of Echo Disturbed Signals
• Parallel Multi-norm Slicing (TTX, VPS, WSS, CC, G+)
• Four Different Framing Codes Available
• Data Caption only Limited by available Memory
• Programmable VBI-buffer
• Full Channel Data Slicing Supported
• Fully Digital Signal Processing
• Noise Measurement and Controlled Noise Compensation
• Attenuation Measurement and Compensation
• Group Delay Measurement and Compensation
• Exact Decoding of Echo Disturbed Signals
69
32JF-77H
SDA 6000 (IC6001)
Block Diagram
UEB10716
4-
Channel
ADC
7-bit
USART
ASC
SSC
SPI
GPT1
T2
T3
T4
GPT2
T5
T6
2
C
Ι
RTC
Watchdog
OCDS
JTAG
Port 5
Port 3
Port 2
Port 4
6
15
8
8
D-Sync
3
3 x 6 Bit
DAC
FIFO
SRU
GA
XRAM
Interrupt Controller
PEC
36 nodes (8 ext.)
OSC
(6 MHz)
Internal
RAM
2 Kbyte
16
16
Data
Data
Instr./Data
32
-Cache
D-Cache
16
X-BUS
Instr./Data
Interface
External
Bus
16
Slicer2
Slicer1
ACQ
16
Data
16...21
Addr.
CVBS2
CPU-Core
C166
Ι
16
16
CVBS1
H
V
ROM
Boot
Port 6
7
4
2 Kbyte
XTAL
AMI
70
32JF-77H
SDA 6000 (IC6001)
Pin Assignments
M2
V
DD33-2
UEP11116
P5.3
A3
TMODE
A4
TMS
D2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
128
127
34
126
35
125
36
124
37
123
38
122
39
121
40
120
41
119
42
118
117
44
116
45
115
46
114
47
113
48
112
49
111
50
110
51
109
52
108
107
54
106
55
105
56
104
57
103
58
102
59
101
60
100
61
99
62
98
97
64
96
95
94
93
92
91
90
89
88
87
86
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
33
63
53
43
V
SS33-3
V
SS33-6
V
DDA-4
85
TCK
TDI
TDO
P2.8
P2.9
P2.10
P2.11
P2.12
P2.13
P2.14
P2.15
V
SS33-1
DD33-1
V
P4.5/CS3
P4.4/A20
P4.3/A19
P4.2/A18
P4.1/A17
SS25-1
V
DD25-1
V
P4.0/A16
A8
A7
A6
A5
A10
A11
A12
A9
V
SS33-2
A2
A1
A0
A13
A14/RAS
A15/CAS
DD33-3
V
MEMCLK
CSSDRAM
CLKEN
CSROM
RD
UDQM
LDQM
WR
D15
SS33-4
V
DD33-4
V
D7
D0
D14
D8
D6
D1
SS33-5
V
DD33-5
V
D5
D9
D13
D9
D13
D12
D10
V
DD33-6
D4
D3
D11
RSTIN
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
V
SS33-7
DD33-7
V
SS25-2
V
DD25-2
V
P3.10
P3.11
P3.12
P3.13
P3.15
P5.14
P5.15
P6.0
P6.1
P5.2
P5.1
P5.0
SSA-4
V
CVBS1A
CVBS1B
DDA-3
V
SSA-3
V
CVBS2
DDA-2
V
SSA-2
V
B
G
R
DDA-1
V
SSA-1
V
XTAL2
XTAL1
SS33-8
V
DD33-8
V
BLANK/CORBLA
COR/RSTOUT
HSYNC
VSYNC
P6.6
P6.5
P6.4
P6.3
P6.2
P-MQFP-128-2
71
32JF-77H
SDA9380 (IC6006)
Block Diagram
VSYNC
HSYNC
HSYNC
CONTROL
PLL
CLL
HPROT
VBLO
X1
X2
X2
VREFC
SCL
SDA
TEST
CLKI
PROTECTION
START UP
H-OUT
V-OUT
EW-OUT
AVERAGE
BEAM LIMITER
HD
VD+
VD-
VD-
E/W
φ2
φ2
φ2
φ2
VPROT
SSD
IBEAM
H35K
RESN
SWITCH D/A
BSOIN
H38K
VREFH
VREFN
HSAFE
PW/PH-CORR
CLAMP
CLAMP
CLAMP
BLACK
STRETCH
SATURATION
CONTROL
CUT OFF +
WHITE POINT
OUTPUT
BUFFER
RGB
MATRIX
BRIGHTNESS
CONTROL
DELAY
RGB/YUV 1
RGB 2
3
3
3
3
FBL 2
FBL 1
FBL 1
DCI
ROUT
GOUT
BOUT
GOUT
BOUT
YUV/RGB 0
3
3
3
3
Y
SVM
CLEXT
VDD(A1..4)
VSS(A1..4)
VDD(D1..2)
VSS(D1..2)
VDD(MC)
VSS(MC)
SUBST
PWM
PWM
MATRIX
MATRIX
MEASURE
PULSES
3
2
3
3
3
YUV
YUV
Y
UV
UV
3
3
3
PEAK DRIVE
LIMITER
BLUE STRETCH
CONTRAST
CONTROL
SWITCH
MATRIX
3
YUV
FH1_2
SCP
I²C
PROTON
Click on the first or last page to see other 32JF-77 (serv.man13) service manuals if exist.