Sharp 32JF-77 (serv.man13) Service Manual ▷ View online
64
32JF-77H
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
AVSUP
AVSUP
ANA_IN1+
ANA_IN
−
ANA_IN2+
TESTEN
XTAL_IN
XTAL_OUT
TP
AUD_CL_OUT
NC
NC
D_CTR_I/O_1
D_CTR_I/O_0
ADR_SEL
STANDBYQ
CAPL_M
AHVSUP
CAPL_A
SC1_OUT_L
SC1_OUT_R
VREF1
SC2_OUT_L
SC2_OUT_R
NC
NC
DACM_SUB
NC
DACM_L
DACM_R
VREF2
DACA_L
NC
AVSS
AVSS
MONO_IN
NC
VREFTOP
SC1_IN_R
SC1_IN_L
ASG
NC
SC2_IN_R
SC2_IN_L
ASG
SC3_IN_R
SC3_IN_L
ASG
SC4_IN_R
SC4_IN_L
NC
AGNDC
AHVSS
AHVSS
NC
NC
I2C_CL
I2C_DA
I2S_CL
I2S_WS
I2S_DA_OUT
I2S_DA_IN1
ADR_DA
ADR_WS
ADR_CL
NC
DVSUP
DVSUP
DVSUP
DVSS
DVSS
DVSS
I2S_DA_IN2
NC
I2S_CL3
I2S_WS3
RESETQ
I2S_DA_IN3
NC
DACA_R
MSP 44x0G
MSP4410G (IC303)
Pin Assignments
65
32JF-77H
18W OUTPUT POWER:
R
R
L
= 8
Ω/4Ω; THD = 10%
HIGH EFFICIENCY
WIDE SUPPLY VOLTAGE RANGE (UP TO
WIDE SUPPLY VOLTAGE RANGE (UP TO
±25V)
SPLIT SUPPLY
OVERVOLTAGE PROTECTION
ST-BY AND MUTE FEATURES
SHORT CIRCUIT PROTECTION
THERMAL OVERLOAD PROTECTION
SPLIT SUPPLY
OVERVOLTAGE PROTECTION
ST-BY AND MUTE FEATURES
SHORT CIRCUIT PROTECTION
THERMAL OVERLOAD PROTECTION
DESCRIPTION
The TDA7481 is an audio class-D amplifier as-
sembled in Multiwatt15 package specially de-
signed for high efficiency applications mainly for
TV and Home Stereo sets.
The TDA7481 is an audio class-D amplifier as-
sembled in Multiwatt15 package specially de-
signed for high efficiency applications mainly for
TV and Home Stereo sets.
ORDERING NUMBER: TDA7481
Multiwatt15
TDA7481L (IC501)
Pin Assignments
Pin Description
1
2
3
4
5
6
7
9
10
11
8
+V
CC SIGN
ST-BY/MUTE
IN
-V
CC SIGN
SGN-GND
FREQ
FEEDCAP
N.C.
BOOT
BOOTDIODE
OUT
TAB CONNECTED TO PIN 8
13
14
15
12
-V
CC POW
-V
CC POW
+V
CC POW
VREG
D96AU535A
N.
Name
Function
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
11
12
13
14
15
11
12
13
14
15
OUT
BOOTDIODE
BOOT
NC
FEEDCAP
FREQ
SGN-GND
–V
CC
SIGN
IN
ST-BY/MUTE
+V
CC
SIGN
VREG
+V
CC
POW
-V
CC
POW
-V
CC
POW
PWM OUTPUT
BOOTSTRAP DIODE ANODE
BOOTSTRAP
NOT CONNECTED
FEEDBACK INTEGRATING CAPACITOR
SETTING FREQUENCY RESISTOR
SIGNAL GROUND
SIGNAL NEGATIVE SUPPLY
INPUT
CONTROL STATE PIN
POSITIVE SIGNAL SUPPLY
INTERNAL VOLTAGE REGULATOR
POSITIVE POWER SUPPLY
NEGATIVE POWER SUPPLY (to be connected to pin 13 via CS)
NEGATIVE POWER SUPPLY (to be connected to pin 13 via CS)
BOOTSTRAP DIODE ANODE
BOOTSTRAP
NOT CONNECTED
FEEDBACK INTEGRATING CAPACITOR
SETTING FREQUENCY RESISTOR
SIGNAL GROUND
SIGNAL NEGATIVE SUPPLY
INPUT
CONTROL STATE PIN
POSITIVE SIGNAL SUPPLY
INTERNAL VOLTAGE REGULATOR
POSITIVE POWER SUPPLY
NEGATIVE POWER SUPPLY (to be connected to pin 13 via CS)
NEGATIVE POWER SUPPLY (to be connected to pin 13 via CS)
66
32JF-77H
SYMBOL
PIN
DESCRIPTION
V
ip
1
non-inverting voltage input
V
DDL
2
supply voltage LOW
V
in
3
inverting voltage input
GND
4
ground, substrate
I
om
5
black current measurement
output
output
V
DDH
6
supply voltage HIGH
V
cn
7
cathode transient voltage output
V
oc
8
cathode DC voltage output
V
fb
9
feedback voltage output
Fig.2 Pin configuration.
ndbook, halfpage
MGA057
1
2
3
4
5
6
7
8
9
DDL
V
GND
TDA6111Q
ip
V
in
V
om
I
oc
V
cn
V
fb
V
DDH
V
TDA6111Q (IC850, IC851, IC852)
Block Diagram
Pin Description
Pin Assignments
Fig.1 Block diagram.
handbook, full pagewidth
DIFFERENTIAL
STAGE
MIRROR
MIRROR
CURRENT
SOURCE
MIRROR
MIRROR
TDA6111Q
7 V
supply voltage
input HIGH
feedback
output
6
Vbias
FOLLOWERS
C par
9
non-inverting
input
inverting
input
3
1
4
2
ground
(substrate)
supply voltage
input LOW
7
8
5
cathode
transient
output
transient
output
cathode
DC output
DC output
black current
measurement
output
measurement
output
MGA058
67
32JF-77H
SDA 6000 (IC6001)
Type
Package
SDA 6000 / SDA 6001
P-MQFP-128-2
Teletext Decoder with Embedded 16-bit Controller
M2
M2
Version 3.00
CMOS
P-MQFP-128-2
1.1
Features
General
• Level 1.5, 2.5, 3.5 WST Display Compatible
• Fast External Bus Interface for SDRAM (Up to
• Fast External Bus Interface for SDRAM (Up to
8 MByte) and ROM or Flash-ROM (Up to 2 x
4 MByte)
4 MByte)
• Embedded General Purpose 16 Bit CPU (Also used
as TV-System Controller, C16x Compatible)
• Display Generation Based on Pixel Memory
• Program Code also Executable From External
• Program Code also Executable From External
SDRAM
• Embedded Refresh Controller for External SDRAM
• Enhanced Programmable Low Power Modes
• Single 6 MHz Crystal Oscillator
• Multinorm H/V-Display Synchronization in Master or Slave Mode
• Free Programmable Pixel Clock from 10 MHz to 50 MHz
• Pixel Clock Independent from CPU Clock
• 3
• Enhanced Programmable Low Power Modes
• Single 6 MHz Crystal Oscillator
• Multinorm H/V-Display Synchronization in Master or Slave Mode
• Free Programmable Pixel Clock from 10 MHz to 50 MHz
• Pixel Clock Independent from CPU Clock
• 3
× 6 Bits RGB-DACs On-Chip
• Supply Voltage 2.5 and 3.3 V
• P-MQFP-128 Package
• P-MQFP-128 Package
Microcontroller Features
• 16-bit C166-CPU Kernel (C16x Compatible)
• 60 ns Instruction Cycle Time
• 2 KBytes Dual Ported IRAM
• 2 KBytes XRAM On-chip
• General Purpose Timer Units (GPT1 and GPT2).
• Asynchronous/Synchronous Serial Interface (ASC0) with IrDA Support. Full-duplex
• 60 ns Instruction Cycle Time
• 2 KBytes Dual Ported IRAM
• 2 KBytes XRAM On-chip
• General Purpose Timer Units (GPT1 and GPT2).
• Asynchronous/Synchronous Serial Interface (ASC0) with IrDA Support. Full-duplex
Asynchronous Up To 2 MBaud or Half-duplex Synchronous up to 4.1 MBaud.
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