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VIF1

1

1

30

VIF differential input 1

VIF2

2

2

31

VIF differential input 2

n.c.

−

−

32

not connected

OP1

3

3

1

output port 1; open-collector

FMPLL

4

4

2

FM-PLL for loop filter

DEEM

5

5

3

de-emphasis output for capacitor

AFD

6

6

4

AF decoupling input for capacitor

DGND

7

7

5

digital ground

n.c.

−

−

6

not connected

AUD

8

8

7

audio output

TOP

9

9

8

tuner AGC TakeOver Point (TOP) for resistor adjustment

SDA

10

10

9

I

2

C-bus data input and output

SCL

11

11

10

I

2

C-bus clock input

SIOMAD

12

12

11

sound intercarrier output and MAD select with resistor

n.c.

−

−

12

not connected

n.c.

13

13

13

not connected

n.c.

−

−

14

not connected

TAGC

14

14

15

tuner AGC output

REF

15

15

16

4 MHz crystal or reference signal input

VAGC

16

−

−

VIF-AGC for capacitor

n.c.

−

16

17

not connected

CVBS

17

17

18

composite video output

n.c.

−

−

19

not connected

AGND

18

18

20

analog ground

VPLL

19

19

21

VIF-PLL for loop filter

V

P

20

20

22

supply voltage

AFC

21

21

23

AFC output

OP2

22

22

24

output port 2; open-collector

n.c.

−

−

25

not connected

SIF1

23

23

26

SIF differential input 1 and MAD select with resistor

SIF2

24

24

27

SIF differential input 2 and MAD select with resistor

n.c.

−

−

28

not connected

n.c.

−

−

29

not connected

handbook, halfpage

MHC110

VIF1

VIF2

OP1

FMPLL

DEEM

AFD

DGND

AUD

TOP

SDA

SCL

SIOMAD

SIF2

SIF1

OP2

AFC

VP

VPLL

AGND

CVBS

VAGC

(1)

REF

TAGC

n.c.

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

Fig.3  Pin configuration for SSOP24.

(1) Not connected for TDA9885TS.

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41

AVSUP

AVSUP

ANA_IN1+

ANA_IN

−

ANA_IN2+

TESTEN

XTAL_IN

XTAL_OUT

TP

AUD_CL_OUT

NC

NC

D_CTR_I/O_1

D_CTR_I/O_0

ADR_SEL

STANDBYQ

CAPL_M

AHVSUP

CAPL_A

SC1_OUT_L

SC1_OUT_R

VREF1

SC2_OUT_L

SC2_OUT_R

NC

NC

DACM_SUB

NC

DACM_L

DACM_R

VREF2

DACA_L

NC

AVSS

AVSS

MONO_IN

NC

VREFTOP

SC1_IN_R

SC1_IN_L

ASG

NC

SC2_IN_R

SC2_IN_L

ASG

SC3_IN_R

SC3_IN_L

ASG

SC4_IN_R

SC4_IN_L

NC

AGNDC

AHVSS

AHVSS

NC

NC

I2C_CL

I2C_DA

I2S_CL

I2S_WS

I2S_DA_OUT

I2S_DA_IN1

ADR_DA

ADR_WS

ADR_CL

NC

DVSUP

DVSUP

DVSUP

DVSS

DVSS

DVSS

I2S_DA_IN2

NC

NC

NC

RESETQ

NC

NC

DACA_R

1
2
3
4
5
6
7
8
9

10
11
12
13
14
15
16
17
18
19
20

-V

CC

-V

CC

-V

CC

OUT

BOOTDIODE

BOOT

NC

FEEDCAP

FREQUENCY

SGN-GND

IN

ST-BY-MUTE

NC

+V

CC 

SIGN

VREG

+V

CC

 POW

-V

CC

-V

CC

-V

CC

-V

CC

NEGATIVE SUPPLY.
NEGATIVE SUPPLY.
NEGATIVE SUPPLY.
PWM OUTPUT
BOOTSTRAP DIODE ANODE
BOOTSTRAP CAPACITOR
NOT CONNECTED
FEEDBACK INTEGRATING CAPACITANCE
SETTING FREQUENCY RESISTOR
SIGNAL GROUND
INPUT
ST-BY/ MUTE CONTROL PIN
NOT CONNECTED
POSITIVE SIGNAL SUPPLY
10V INTERNAL REGULATOR
POSITIVE POWER SUPPLY
NEGATIVE SUPPLY (TO BE CONNECTED TO PIN 16 VIA C5)
NEGATIVE SUPPLY
NEGATIVE SUPPLY
NEGATIVE SUPPLY

10W  OUTPUT POWER:
R

L

 = 8

Ω

/4

Ω

; THD = 10%

HIGH EFFICIENCY
NO HEATSINK
SPLIT SUPPLY
OVERVOLTAGE PROTECTION
ST-BY AND MUTE FEATURES
SHORT CIRCUIT PROTECTION
THERMAL OVERLOAD PROTECTION

DESCRIPTION
The TDA7480L is an audio class-D amplifier as-
sembled in Power DIP package specially de-
signed for high efficiency applications mainly for
TV and Home Stereo sets.

ORDERING NUMBER: TDA7480L

PDIP20 (14+3+3)

-V

CC

OUT

BOOTDIODE

N.C.

BOOT

FEEDCAP

FREQ

1

3

2

4

5

6

7

8

9

STBY/MUTE

N.C.

+V

CC SIGN

+V

CC POW

VREG

-V

CC 

-V

CC

20

19

18

17

16

14

15

13

12

D96AU537B

SGN-GND

10

IN

11

-V

CC

-V

CC

-V

CC

-V

CC