Sharp AR-M155 (serv.man3) Service Manual ▷ View online
AR-M150/M155/M155X ELECTRICAL SECTION 13 - 10
C116
820p
820p
1
2
C117
820p
820p
1
2
C118
820p
820p
1
2
C121
0.1u
0.1u
1
2
C115
820p
820p
1
2
C119
0.1u
0.1u
1
2
R92
1.5kJ
1.5kJ
21
R90
0.68J
1W
1W
2
1
R94
30kJ
30kJ
21
R95
30kJ
30kJ
21
R91
1.5kJ
1.5kJ
21
R89
0.68J
1W
1W
2
1
R98
510J
510J
21
R97
1kJ
1kJ
21
R96
2kJ
2kJ
21
R93
1kJ
1kJ
21
IC29
L6219DS or AMM56219
OUT 2A
2
SENSE 2
3
COMP 2
4
OUT 2B
5
GND
6
GND
7
I02
8
I12
9
PHASE 2
10
VREF 2
11
RC 2
12
VSS
13
RC 1
14
VREF 1
15
PHASE 1
16
I11
17
GND
18
GND
19
I01
20
OUT 1B
21
COMP 1
22
SENSE 1
23
VS
24
OUT 1A
1
5V
24VM
5V
5V
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
MM_PH_A
OUT_A-
MM_AI0
MM_PH_B
MM_BI0
MM_BI1
MM_BI1
MM_AI1
OUT_A+
OUT_B-
MMref0
MMref1
MMref2
MMref1
MMref2
OUT_B+
(10-D2)
(2-A3)
(2-A3)
(2-A3)
(2-A3)
(2-A3)
(2-A3)
(2-A3)
(2-A3)
(2-A3)
(5-C1)
(5-C1)
(5-C1)
(5-C1)
(5-C1)
Scanner Motor Driver
(10-D2)
(10-D2)
(10-D2)
(10-D2)
(10-D2)
R107
300J
300J
21
C125 2200p
1
2
R99
7.5kJ
2
1
C126
2200p
1
2
R100 7.5kJ
2
1
C132
2200p
1
2
C136
OPEN
1
2
C130
OPEN
1
2
C127 OPEN
1
2
C137
OPEN
1
2
C135
2200p
1
2
R104 2.4kJ
2
1
R111 2.4kJ
2
1
R101
1kJ
1kJ
21
R115
1kJ
1kJ
21
C134
0.1u
1
2
R108
620J
620J
21
R109
1.2kJ
1.2kJ
21
R110
100J
100J
21
R102
750J
750J
21
R103 1J
2W
2
1
IC31
MTD1361/F
CrA
23
CrB
20
VsA
25
RsA
3
VrefA
24
VrefB
19
RsB
12
VsB
18
In /A
26
In A
27
In /B
17
In B
16
Vmm
22
OUT /A
1
OUT A
4
OUT /B
14
OUT B
11
PG
15
PG
28
R114 1J
2W
2
1
PGND
PGND
PGND
PGND
PGND
24VM
5V
SPMT_2
(SPFMT2)
SPMT_0
SPMT_3
SPMT_1
SPMT_3
SPMT_1
MRPS_1
MRPS_2
MRPS_3
MRPS_2
MRPS_3
(SPFMT0)
(SPFMT3)
(SPFMT1)
(SPFMT3)
(SPFMT1)
(5-C2)
(5-C2)
(5-C2)
(5-C2)
(5-C2)
(4-D3)
(4-D3)
(4-D3)
(4-D3)
(4-D3)
(4-D3)
(4-D3)
(11-D1)
(11-D1)
(11-D1)
(11-E1)
(11-E1)
SPF Motor Driver
D5
MTZ J22B
IC28
TD62064AF
I1
3
NC
4
NC
5
I2
6
NC
10
I3
11
NC
12
NC
13
GND
17
O1
2
O2
7
O3
9
O4
16
COM
1
COM
8
GND
18
I4
14
NC
15
PGND
24VDup
DMT0
/DMT0
DMT1
DMT2
DMT3
/DMT1
/DMT2
/DMT3
(11-B3)
(11-B3)
(11-B3)
(11-B3)
(1-D3)
(1-D3)
(1-D3)
(1-D3)
Duplex Motor Driver
D6
MTZ J22B
IC30
TD62064AF
I1
3
NC
4
NC
5
I2
6
NC
10
I3
11
NC
12
NC
13
GND
17
O1
2
O2
7
O3
9
O4
16
COM
1
COM
8
GND
18
I4
14
NC
15
R338
0J
0J
2
1
R339
0J
0J
2
1
R340
0J
0J
2
1
R341
0J
0J
2
1
PGND
24VSFT
SFTMT0
/SFTMT0
SFTMT1
SFTMT2
/SFTMT1
/SFTMT2
/SFTMT3
SFTMT3
Shifter Motor Driver
(4-B2)
(4-B2)
(4-B2)
(4-B2)
(11-A1)
(11-A1)
(11-A1)
(11-A1)
AR-M150/M155/M155X ELECTRICAL SECTION 13 - 11
(10) OPE PWB
a. Outline
The operation circuit is composed of the LCD control circuit, the key
matrix circuit, the display matrix circuit, and the buzzer circuit, realizing
the U/I functions.
matrix circuit, the display matrix circuit, and the buzzer circuit, realizing
the U/I functions.
b. LCD control circuit
The character LCD (COG) in 2 lines and 16 digits is used. The display
data are sent from the MCU (CPU) to LCD internal registers, control-
ling the LCD.
data are sent from the MCU (CPU) to LCD internal registers, control-
ling the LCD.
c. Key matrix circuit
The SEL signal is sent from the CPU of MCU to the matrix selector IC
(multiplexer) in the operation circuit. The signal detects OFF/ON of the
key, and is sent to the CPU as serial data.
(multiplexer) in the operation circuit. The signal detects OFF/ON of the
key, and is sent to the CPU as serial data.
d. LED matrix circuit
The display is controlled by inputting the serial data signal, the clock
signal, and the latch signal from ASIC to the LED driver in the opera-
tion circuit.
signal, and the latch signal from ASIC to the LED driver in the opera-
tion circuit.
In the LED driver, data are set to the register (8bit) and latched to con-
trol the IC output port, performing matrix-driving of ON/OFF of the LED.
trol the IC output port, performing matrix-driving of ON/OFF of the LED.
(11) Carriage Unit
a. Outline
The carriage unit is provided with the CCD PWB, the inverter PWB, the
lamps, etc. A document is radiated, and image data read by the CCD
are A/D converted to be sent to the ASIC.
lamps, etc. A document is radiated, and image data read by the CCD
are A/D converted to be sent to the ASIC.
b. CCD PWB
The color image sensor uPD8861 (5400 pixels x 3 lines) is used as the
CCD on the CCD PWB to scan images in the resolution of 600dpi/US
letter size in the main scanning direction.
CCD on the CCD PWB to scan images in the resolution of 600dpi/US
letter size in the main scanning direction.
Image data scanned by the CCD are inputted to AFE (AD9826), where
they are A/D-converted to output digital data. The output digital data
are sent to the MCU PWB and to the ASIC. The ASIC performs image
process with the digital data.
they are A/D-converted to output digital data. The output digital data
are sent to the MCU PWB and to the ASIC. The ASIC performs image
process with the digital data.
c. Lamp inverter PWB
The transformer is controlled by the lamp control signal from the MCU
PWB to turn ON/OFF the cool cathode ray tube by the transformer out-
put.
PWB to turn ON/OFF the cool cathode ray tube by the transformer out-
put.
B. DC power circuit
The DC power circuit directly rectifies the AC power and performs
switching-conversion with the DC/DC converter circuit, and rectifies
and smoothes again to generate a DC voltage.
switching-conversion with the DC/DC converter circuit, and rectifies
and smoothes again to generate a DC voltage.
The constant voltage control circuit is of +5VEN. +24V and +12V are of
the non-control system by winding from the +5VEN winding. As shown
in fig (1), +24V, +12V, and +5V are provided with the ON/OFF function
by external signals. +3.3V is outputted from +5VEN to the regulator IC.
the non-control system by winding from the +5VEN winding. As shown
in fig (1), +24V, +12V, and +5V are provided with the ON/OFF function
by external signals. +3.3V is outputted from +5VEN to the regulator IC.
Refer to the block diagram, fig (1).
fig (1) Block diagram
(1) Noise filter circuit
The filter circuit is composed of L and C. It reduces common noises
and normal mode noises generated from the AC line.
and normal mode noises generated from the AC line.
The common noise means that generated in each line for GND. Its
noise component is delivered through C002, C003, and C022 to GND.
noise component is delivered through C002, C003, and C022 to GND.
The normal noise means that overlapped in the AC line or the output
line. It is attenuated by C023, C001, L002, C004, and L003. Refer to fig
(2).
line. It is attenuated by C023, C001, L002, C004, and L003. Refer to fig
(2).
fig (2) Noise filter circuit
(2) Rush current prevention circuit and rectifying/
smoothing circuit
fig (3) Rush current prevention, rectifying/smoothing circuit
Noise filter
circuit
Rush current
prevention circuit
Rectifying/
smoothing
smoothing
circuit
Inverter circuit
(Ringing choke converter system)
Rectifying/
smoothing circuit
(Semiconductor switch)
Rectifying/
smoothing circuit
+12V regulator IC
(with ON/OFF function)
Overcurrent
protection circuit
protection circuit
Control
circuit
circuit
Constant-voltage
detection circuit
detection circuit
(Semiconductor switch)
+3.3V
regulator IC
AR-M150/M155/M155X ELECTRICAL SECTION 13 - 12
Since the AC power is directly rectified, if there were not this rush cur-
rent prevention resistor (TH001), an extremely large rush current
would flow due to a charging current flowing through the smoothing
capacitor C006 when turning on the power.
rent prevention resistor (TH001), an extremely large rush current
would flow due to a charging current flowing through the smoothing
capacitor C006 when turning on the power.
To prevent against this, the rush current prevention resistor TH001 is
provided between the rectifying diode D003 and the smoothing diode
C006, suppressing a rush current.
provided between the rectifying diode D003 and the smoothing diode
C006, suppressing a rush current.
The rectifying/smoothing circuit rectifies a 60Hz AC voltage with the
rectifying circuit, and smoothes it with the smoothing capacitor C006.
rectifying circuit, and smoothes it with the smoothing capacitor C006.
(3) Inverter and control circuit (Ringing choke converter
system)
Fig. (4) Inverter and control circuit
When the power is supplied to this circuit, the DC voltage, Vref, sup-
plied by the rectifying/smoothing circuit is applied through R006 and
R007 to FET (Q001), turning on Q001.
plied by the rectifying/smoothing circuit is applied through R006 and
R007 to FET (Q001), turning on Q001.
When Q001 is turned on, the drain current, I
D
, flows as the waveform B
in Fig. (5) to apply V
DC
to the main winding, N
P
, on the primary side.
At the same time, a voltage is generated in N
C
winding and applied
through R005 and C008b to the gate of Q001. As a result, Q001 is
turned on rapidly.
turned on rapidly.
At the same time with this, C009 is charged through D001, R001, and
D012. When the potential of C009 reaches 0.7V (= V
D012. When the potential of C009 reaches 0.7V (= V
BE
of Q002), Q002
turns on to turn off Q001.
Fig. (5) Ringing choke converter operation waveforms
When Q001 turns off, energy accumulated in the transformer (T001)
flows a current of waveform C in the path indicated with dotted line as
shown in the figure above through D101 and D113 and dissipates to
the secondary output side. When this energy is exhausted, the current
flowing through D101 and D113 turns off. However, the N
flows a current of waveform C in the path indicated with dotted line as
shown in the figure above through D101 and D113 and dissipates to
the secondary output side. When this energy is exhausted, the current
flowing through D101 and D113 turns off. However, the N
S
winding has
a slight remaining energy, which generates a voltage in the base wind-
ing N
ing N
C
and turns on Q001 again to repeat switching operation, supply-
ing a high frequency power to the secondary side.
(4) Overcurrent protection circuit (Primary side)
The ON period extension due to an increased output load is detected,
and the OFF period of Q001 is extended by the control circuit, and
energy accumulated in the primary winding of the transformer T001 is
reduced, providing protection against an overcurrent. Refer to Fig. (4).
and the OFF period of Q001 is extended by the control circuit, and
energy accumulated in the primary winding of the transformer T001 is
reduced, providing protection against an overcurrent. Refer to Fig. (4).
(5) Rectifying/smoothing circuit (+5V)
fig (6) Rectifying/smoothing circuit
The high frequency pulse generated by the inverter circuit is
decreased by the converter transformer, rectified by the high frequency
diode D113, and smoothed by C107 and C108.
decreased by the converter transformer, rectified by the high frequency
diode D113, and smoothed by C107 and C108.
fig (7) +5V rectifying/smoothing circuit voltage waveform
ID
Np
Ns
Nc
Q001
VDS waveform
VDS waveform
Q001
ID waveform
ID waveform
Secondary output side
D706 D113
ID waveform
D706 D113
ID waveform
Voltage waveform
Voltage waveform
AR-M150/M155/M155X CIRCUIT DIAGRAM 14 - 1
[14] CIRCUIT DIAGRAM
1. MCU PWB
MCU PWB (CPU section)
C24
0.1u
C4
12p
R1
1
10kJ
R5
0J
BR20
33J
1 2 3 4
8 7 6 5
R18
11kF
C25
47p
R20
10kF
BR21
33J
1 2 3 4
8 7 6 5
R19
3.3kJ
IC2
HD6412321VF25(H8S/2321)
P35/
P34/
P33/
P32/
P31
P30/
PD7
PD6
PD5
PD4
PD
PD2
PD
PD
PE
PE
PE
PE
PE
PE
P
PE
AVcc
103
Vref
104
P40/AN0
105
P41/AN1
106
P42/AN2
107
P43/AN3
108
P44/AN4
109
P45/AN5
110
P46/AN6/DA0
111
P47/AN7/DA1
112
AVss
113
Vss
114
P17/PO15/TIOCB2/TCLKD
115
P16/PO14/TIOCA2
116
P15/PO13/TIOCB1/TCLKC
117
P14/PO12/TIOCA1
118
P13/PO11/TIOCD0/TCLKB
119
P12/PO10/TIOCC0/TCLKA
120
P11/PO9/TIOCB0/DACK1
121
P10/PO8/TIOCA0/DACK0
122
MD0
123
MD1
124
MD2
125
PG0/CAS
126
PG1/CS3
127
PG2/CS2
128
PG3/CS1
1
PG4/CS0
2
Vss
3
NC
4
VCC
5
PC0/A0
6
PC1/A1
7
PC2/A2
8
PC3/A3
9
Vss
10
PC4/A4
11
PC5/A5
12
PC6/A6
13
PC7/A7
14
PB0/A8
15
PB1/A9
16
PB2/A10
17
PB3/A1
1
18
Vss
19
PB4/A12
20
PB5/A13
21
PB6/A14
22
PB7/A15
23
P
A
0/A16
24
P
A
1/A17
25
P
A
2/A18
26
P
A
3/A19
27
Vss
28
P
A
4/A20/IRQ4
29
P
A
5/A21/IRQ5
30
P
A
6/A22/IRQ6
31
P
A
7/A23/IRQ7
32
P67/
/
CS7
IRQ3
33
P66/
/
CS6
IRQ2
34
Vss
35
Vss
36
P65/IRQ1
37
P64/IRQ0
38
P53/ADTRG
102
P52/SCK2
101
Vss
100
Vss
99
P51/RxD2
98
P50/TxD2
97
PF0/BREQ
96
PF1/BACK
95
PF2/
/W
AIT/BREQO
LCAS
94
PF3/L
WR
93
PF4/HWR
92
PF5/RD
91
PF6/AS
90
VCC
89
PF7/0
88
Vss
87
EXT
AL
86
XT
AL
85
VCC
84
STBY
83
NMI
82
RES
81
WDT
OVF
80
P20/PO0/TIOCA3
79
P21/PO1/YICOB3
78
P22/PO2/TIOCC3
77
P23/PO3/TIOCD3
76
P24/PO4/TIOCA4
75
P25/PO5/TIOCB4
74
P26/PO6/TIOCA5
73
P27/PO7/TIOCB5
72
P63/TEND1
71
P62/DREQ1
70
P61/
/
TEND0
CS5
69
Vss
68
Vss
67
P60/
/
DREQ0
CS4
66
Vss
65
R4
*3
BR22
33J
1 2 3 4
8 7 6 5
C1
*6
R13
10kJ
R2
*2
BR23
33J
1 2 3 4
8 7 6 5
IC4
M51957BFP
NC
8
GND
4
VCC
7
NC
1
IN
2
NC
3
Cd
5
OUT
6
BR24
33J
1 2 3 4
8 7 6 5
R7
*4
C381 22pF
R1
OPEN
C382 OPEN
C383 OPEN
C384 OPEN
X1
HC-49U/S
19.6608MHz
R22
10kJ
R21
33J
C22
0.1u
R8
33J
BR110
33J
1
2
3
4
8
7
6
5
IC1
P2010/PLL701-01
Xin
1
Xout
2
FS0
3
Vss
4
SSon
5 MODOUT
6 SR0
7 VDD
8
R12
10kJ
C3
*5
R3
*1
R6
0J
R10
100J
R337
33J
C23
OPEN
C2
0.1u
R9
33J
C386
OPEN
A0
A5
A2
A4
A1
1
A19
A13
A3
A8
A10
A7
A12
A16
A14
A18
A1
A15
A17
A6
A9
CPUCLK(NC)
/TRANSST
SPFMT0
/SCANSP
SPFMT1
SPFMT2
/SCANST
SPFMT3
/STBY
ES_CMD
RD
/ESS_RDY
/ESC_RDY
HWR
/PRINTST
LWR
ESS_TS
RESETOUT1
NMI
/WDT
OVF
/CS0#
/CS1#
/CS2#
/CS3#
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
/PRINTST
/RESET0
/ASIC_RST
/ES_PAGE
MSU_ST1
SPFMT0
SPFMT2/MIRCNT
(SIN2)
SPFMT1
/TRANSST
(KEYIN)
PMCLK
RTH
SPFMT3
/SCANSP
PSL
/SCANST
(SIN3)
(SIN1)
ESS_TS
/ESC_RDY
ES_CMD
/HWR
/LWR
/ESS_RDY
/RD
SELIN3
SELIN2
SELIN1
/RESET1
/CS3
/CS2
/CS1
/CS0
Spreading Range :
+/- 1.25%
+/- 1.25%
R4(*3)
When IC1 is,
mounted
NOT mounted
OPEN
0J
R3(*1)
OPEN
680J
R7(*4)
22J
OPEN
R2(*2)
0J
OPEN
C3(*5)
C1(*6)
22pF
22pF
15pF
15pF
*R2,R3,C1, and C3 are tentative
(2-D2)
(2-E3)
(2-E3)
(2-E3)
(4-C3)
(4-C2)
(4-C3)
(4-C3)
(2-D1)
(5-B2)
(2-C4)
(8-A2)
(13-B2)
(4-D4)
(4-D4)
(4-C3)
(4-D4)
(5-E3)
(4-D4)
(8-A1)
Reset IC
(4-C2)
(8-A3)
(13-B2)
(2-C1)
(4-C2)
(3-A2)
(4-A2)
(2-C1)
(4-C2)
(3-A2)
(8-A3)
(8-A2)
(8-A2)
(9-B2)
A
A
B
B
C
C
4
3
2
1
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