DOWNLOAD Sharp UP-3500 (serv.man29) Service Manual ↓ Size: 19.97 MB | Pages: 62 in PDF or view online for FREE

Model
UP-3500 (serv.man29)
Pages
62
Size
19.97 MB
Type
PDF
Document
Service Manual
Brand
Device
EPOS / UP3500 Hardware Service Manual
File
up-3500-sm29.pdf
Date
PREV: Sharp UP-3500 (serv.man28) Service Manual

Sharp UP-3500 (serv.man29) Service Manual ▷ View online

UP-3500 (V)
CIRCUIT DIAGRAM
– 43 –
to CPU PWB
to CPU PWB
to CPU PWB
MAC_EEPRO
M
LAN connector
LAN controler
Analog-Signal Pair Line! (TDx)
Analog-Signal Pair Line! (RDx)
modified 07,06,09
(10K to 15K)
modified 07,06,09
modified 07,06,09
modified 07,06,09
modified 07,11,13
MODIFIED 07,10,12
modified 07,11,13
EEP_DIO
EEPCLK
IO_A14
IO_D13
IO_A20
EEP_CS
IO_A6
TD
+
IO_D9
IO_A2
IO_A13
IO_D5
IO_A19
IO_D8
IO_A8
IO_A11
IO_D3
IO_A3
IO_A12
IO_D12
IO_D4
IO_A17
IO_D15
IO_A18
EEP_DIO
IO_A10
EEP_CS
IO_D7
IO_D2
IO_A4
IO_A1
RD+
IO_D11
IO_A16
IO_A15
IO_D14
IO_A7
TD-
EEPCLK
IO_D0
IO_A21
IO_A9
RD-
IO_D6
IO_D1
IO_A5
IO_D10
RESET#
DACK1
IO_A[1:21]
IO_D[0:15]
LANINT#
3.3V
IO_WE1#
IO_RD#
CS4#
3.3V
3.3V
3.3V
VDD_A
3.3V
3.3V
3.3V
VDD_A
VDD_PLL_1.8V
VDD_CORE_1.8V
3.3V
GND-FRAME
3.3V
3.3V
R109
49.9(+-1
%
)
1
2
R381
0 (3216)
1
2
C63
0.1uF
2
1
R118
0
1
2
C44
6.8nF
2
1
R120
(10K
)
C62
0.1uF
2
1
R115
(10K
)
C45
6.8nF
2
1
C61
0.1uF
2
1
C50
10uF 6.3V+-20%X5R
2
1
C47
33pF(50V 5%)
2
1
R110
49.9(+-1%
)
1
2
C66
0.1uF
2
1
C54
0.01uF
2
1
C52
10uF 6.3V+-20%X5R
2
1
C1
100PF
2
1
C49
0.1uF
C53
0.01uF
2
1
U3-1
LAN9118rev.C
18
17
16
15
14
13
12
94
64
63
62
59
58
57
56
53
52
51
50
49
46
45
44
43
40
39
38
37
36
33
32
31
30
29
26
25
24
23
22
21
72
70
92
95
93
9
69
68
67
87
76
98
99
100
71
73
75
84
10
74
82
83
78
79
6
5
A1
A2
A3
A4
A5
A6
A7
CS#
D0
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
D16/[TX_CLK]
D17/[TXD0]
D18/[TXD1]
D19/[TXD2]
D20/[TXD3]
D21/[COL]
D22/[CRS]
D23/[MDC]
D24/[MDIO]
D25/[RX_DV]
D26/[RX_CLK]
D27/[RX_ER]
D28/[RXD3]
D29/[RXD2]
D30/[RXD1]
D31/[TX_EN]
IRQ
PME
RD#
RESET#
WR#
ATEST
EECLK
EECS#
EEDIO,D32/D16#
EXRES1
FIFO_SEL
LED1#/GPIO0
LED2#/GPIO1
LED3#/GPIO2
NC(1)
NC(2)
NC(3)/[RXD0]
NC(4)
RBIAS
SPEED_SEL
TPI-
TPI+
TPO-
TPO+
XTAL1
XTAL2
R385
0
1
2
+
C59
220uF/6.3V(6SVP
220M
X
)
1
2
MAC_EEPROM(93LC46A/SOIC-8)
U4
1
2
3
4
6
7
8
5
CS
SK
DI
DO
NC
NC
VCC
GND
R119
(1.00K) (1/10W 1%)
1
2
C2
47PF
2
1
C3
47PF
2
1
R126
1.00K (1/10W 1%)
C57
0.1uF
2
1
C67
0.1uF
2
1
R123
0
1
2
C51
0.01uF
2
1
R112
49.9(+-1%
)
1
2
R124
12.0K(+-1%
)
1
2
C64
0.1uF
2
1
SI-60002-F
CN7
1
2
3
4
5
6
7
8
9
10
11
12
TCT
TD+
TD-
RD+
RD-
RCT
NC
GND
SH-1
SH-2
H1
H2
R114
10K
1
2
R117
(10K
)
FB3
MMZ1608 (TDK)
1
2
R384
1M
1
2
C65
0.1uF
2
1
R125
(1.00K) (1/10W 1%)
R108
10.0(+-1%
)
1
2
C60
0.1uF
2
1
C43
0.022uF
2
1
R121
15
K
R122
1.00K(+-1%
)
1
2
R116
(10K
)
1
2
C58
0.1uF
2
1
C55
27PF
2
1
C48
33pF(50V 5%)
2
1
X1
25MHz
(D
S
X
840G
A
)
1
2
C69
0.1uF
2
1
R386
0
1
2
R389
10
K
C46
0.01UF
2
1
R382
(10K
)
C56
(0.1uF)
2
1
R113
12.4K (1/10W 1%)
1
2
R111
49.9(+-1
%
)
1
2
+
C79
(220uF/6.3V(6SVP2
2
0
M
X
))
1
2
R394
0 (3216)
1
2
C68
0.1uF
2
1
R383
(10K
)
U3-2
LAN9118rev.C
81
85
89
91
3
65
20
28
35
42
48
55
61
97
7
8 
2
1
66
19
27
34
41
47
54
60
96
77
80
86
88
90
4
11
VDD_A(1)
VDD_A(2)
VDD_A(3)
VDD_A_RB[NC]
VDD_CORE(1)
VDD_CORE(2)
VDD_IO(1)
VDD_IO(2)
VDD_IO(3)
VDD_IO(4)
VDD_IO(5)
VDD_IO(6)
VDD_IO(7)
VDD_IO(8)
VDD_PLL
VDD_REF
VREG
GND_CORE(1
)
GND_CORE(2
)
GND_IO(1
)
GND_IO(2
)
GND_IO(3
)
GND_IO(4
)
GND_IO(5
)
GND_IO(6
)
GND_IO(7
)
GND_IO(8
)
VSS_A(1)
VSS_A(2)
VSS_A(3)
VSS_A(4)
VSS_A_RB[NC]
VSS_PLL
VSS_REF
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
5/16
LAN CONTR
OLER
UP-3500 (V)
CIRCUIT DIAGRAM
– 44 –
MODR#
ST0
ST1
CKDC_KR2#
ST2
CKDC_KR1#
CKDC_KR3#
ST3
CKDC_KR0#
PG4
CKDC5_POFF#
CKDC_P01
CKDC5_STH
KEX
1
CKDC5_KRQ#
PG3
PG5
ST0
CKDC3_STH
CKDC5_SCK
CKDC_KR1#
CKDC5_STOP#
CKDC_P02
ST1
CKDC_P00
CKDC_KR0#
CFSR#
CKDC5_HTS
ST2
PG1
CKDC5_RESET
CKDC_KR2#
CKDC5_KRQ#
PG1
CKDC_SRES#
CKDC3_KRQ#
CKDC5_SCK
CKDC_KR3#
PG2
ST3
CKDC3_SHEN#
PG0
PG0
CKDC5_SRES#
CKDC3_SRES#
PG2
PG6
CKDC5_SHEN#
MODR#
CKDC5_SHEN#
CKDC5_STOP#
KEX
0
CKDC5_HTS
CKDC5_SRES#
CKDC5_STH
BUZZ
PG3
CKDC_P03
CKDC5_SA
CKDC5_SC
CKDC5_SDP
CKDC5_SB
CKDC5_SD
CKDC5_SF
CKDC5_SG
CKDC5_SE
ST3
CKDC_KR2#
KEX
1
CKDC_KR0#
CKDC_KR3#
ST2
CKDC_KR1#
MODR#
KEX
0
ST0
ST1
CKDC_KR2#
CKDC_KR0#
CKDC_KR1#
CKDC_KR3#
CFSR#
POFF#
CKDC5_POFF#
3.3V
CKDC3_KRQ#
CKDC3_SRES#
CKDC_HTS
RESET#
5VB
CKDC3_SHEN#
DONE
CKDC_STOP#
KRQ#
CKDC_SHEN#
CKDC_SCK
BUZZ
CKDC3_SCK
CKDC_P01
CKDC5_RESET
CKDC_P00
CKDC3_STOP#
CKDC_P03
CKDC_P02
CKDC_STH
MODR#
CKDC_SRES#
CKDC3_HTS
CKDC3_STH
5V
3.3V
5V
3.3V
3.3V
5V
3.3V
5VB
5VB
5V
5VB
5V
3.3V
R156
(0)
R140
0
C88
(0.1uF)
R149
(0)
R129
(0)
IC8C
SN74HCT08PW
9
10
8
C82
(33pF)
X2
(32.768kHz)
1
2
R131
0
R146
47K
C83
(33pF)
C75
(470pF)
IC8A
SN74HCT08PW
1
2
3
14
7
RP16
(10Kx4)
3
2
1
4
5
6
7
8
RP3
10Kx4
3 
2 
1
4
5 
6 
7 
8
R130
0
C72
100pF
R155
(47K)
TP1
C85
(33pF)
C74
(18pF)
C189
100pF
R137
47K
R1
47K
C84
(33pF)
R128
(0)
R157
(47K)
R206
(47K)
IC9
(CKDC9)
1
2
3
4
5
6
7
8
9
10
11
12
13
3
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52 
53 
54 
55 
56 
57 
58 
59 
60 
61 
62 
63 
64
SB
SC
SD
SE
SF
SG
P4
P0
P1
P2
P3
MODR
CFSR
KEX0
KEX1
RQ
SKR0
ST0
ST1
ST2
ST3
POFF
STOP
DDIG
DCS
VCC
SCK
HTS
STH
SDISP
BUZZ
DSCK
SRES
DS0
SHEN
IRQ
KR0
KR1
KR2
KR3
RESET
OSC2
OSC1
GND
CL1
CL2
TEST
G0
G1
G2
G3
G4 
G5 
G6 
G7 
G8 
G9
G10 
G11
PO0 
PO1 
PO2 
PO3
SA
RP6
0x4
3
2
1
4
5
6
7
8
R141
(0)
+
C87
(10uF/50V)
C70
100pF
R420
1K
C76
(1000pF)
C78
(100pF)
IC7C
SN74LV08APW
9
10
8
R139
(0)
C77
(100pF)
BZ1
PKM22EPPH4002
1
2
R138
4.7K
R145
(0)
R275
(1K)
D1
1SS355
1
2
IC8D
SN74HCT08PW
12
13
11
RP5
0x4
3
2
1
4
5
6
7
8
RP4
10Kx4
3 
2 
1
4
5 
6 
7 
8
R144
(1M)
RP8
0x4
3
2
1
4
5
6
7
8
R132
0
R142
47k
R136
4.7k
R276
(33)
R418
(47K)
IC7B
SN74LV08APW
4
5
6
IC7A
SN74LV08APW
1
2
3
14
7
C71
330pF
R143
47k
R150
(47K)
RP1
10Kx4
3 
2 
1
4
5 
6 
7 
8
IC7D
SN74LV08APW
12
13
11
R153
33
IC8B
SN74HCT08PW
4
5
6
RP2
(10Kx4)
3 
2 
1
4
5 
6 
7 
8
R148
47K
R151
47K
RP17
(10Kx4)
3
2
1
4
5
6
7
8
RP7
0x4
3
2
1
4
5
6
7
8
C73
(15pF)
X3
(4.19MHz)
2
R127
(0)
R154
(47K)
C86
(470pF)
1
CKDC5V
FPGA
FPGA&CPU
CPU PWB
CPU PWB
INVERTER
modified 07,06,09
(Install to NotInstall)
modified 07,05,11
Not Install
modified 07,05,11
modified 07,05,11
modified 07,05,11
modified 07,06,09 To Install
modified 07,06,09(Not Install to Install)
32.768kHz
Not Install
modified 07,05,11
modified 07,06,09
(NotInstall to Install)
modified 07,06,11
CKDC NEXT ver
modified 07,06,09
modified 07,05,11
modified07,06,09
To Install
modified07,06,09
To Not Install
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
6/16
CKDC-1
UP-3500 (V)
CIRCUIT DIAGRAM
– 45 –
CKDC3_SC
CKDC3_SD
CKDC3_SF
CKDC3_SE
CKDC3_SG
CKDC3_SA
CKDC3_SB
MODR#
KS5
V
_
5
CKDC3_ST0
CKDC3_SCK
CKDC_KR1
CKDC3_
X
2
CKDC3_P11
CKDC_P02
CKDC_P00
RES
E
T
3
V
CKDC3_SHEN#
CKDC3_SE
CKDC3_ST2
CKDC3_SD
CKDC3_P33
CKDC3_FLMD0
RES
E
T
3
V
CKDC3_ST3
RES
E
T
3
V
CKDC3_SA
CKDC3_P13
CKDC3_SRES#
CKDC3_P62
CKDC3_STOP
#
CKDC3_STH
CKDC3_SG
KEX
0
BUZZ
CKDC3_P14
CKDC_KR3
CKDCDB_RXD
CKDC3_ST1
CKDC3_RESET#
CKDC3_
X
1
KEX
1
CKDC3_HTS
CKDC3_P33
CKDC3_P63
CKDC3_RESET#
CKDC3_P16
CKDC3_P10
CKDC3_P12
CKDC_P03
CKDC3_P13
CKDC3_SB
CKDC_KR0
CKDC3_SF
CKDC3_
X
2
CKDCDB_TX
D
CKDC3_
X
1
CKDC3_P61
CKDC5_RESET
CKDC3_FLMD0
CKDC3_SC
CKDC3_P15
CKDC_P01
CKDC3_KRQ#
CKDC_KR2
CKDC3_P60
CKDC3_P14
CKDC3_SDP
CKDC3_SDP
KS5
V
_
5
CKDC3_SCK
CKDC3_HTS
CKDC3_SRES#
CKDC_P03
KEX
1
CKDC3_STH
3.3VB
KEX
0
CKDC3_SHEN#
CKDC_P01
CKDC_KR2#
MODR#
POFF#
CKDC_KR1#
CKDC3_STOP
#
3.3V
ST0
CKDC3_KRQ#
ST3
BUZZ
CKDC_P02
ST2
CKDC_P00
CKDC5_RESET
ST1
CKDC_KR0#
CFSR#
CKDC_KR3#
3.3VB
3.3VB
3.3V
3.3V
3.3V
3.3V
3.3VB
3.3VB
3.3VB
J4
HIF3FC-16PA-2.54DS(HIROSE)
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
R159
47
K
R203
0
R198
10
K
R186
(10
K
)
R176
0
R162
(10K
)
R178
0
IC10
UPD78KF0521GB-UET-A LQFP 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40 
41 
42 
43 
44 
45 
46 
47 
48 
49 
50 
51 
52
P140
P120
P41
P40
RESET#
XT2
XT1
FLMD0
X1
X2
REGC
VSS
VDD
P60
P61
P62
P63
P33
P77
P76
P75
P74
P73
P72
P71
P70
P32
P31
P30
P17
P16
P15
P14
P13
P12/SO10
P11/SI10
P10/SCK10#
AVREF
AVSS
P27 
P26 
P25 
P24 
P23 
P22 
P21 
P20
P130
P03 
P02 
P01 
P00
C91 1uF
R188
47
K
R204
47
K
R187
0
C99
1000pF
R181
0
R180
0
C89
470pF
R185
(10
K
)
R167
47
K
R169
47
K
R207
1K
R164
47
K
C90
100pF
R197
(10K
)
RP18
(10Kx4)
3
2
1
4
5
6
7
8
SW2
SW SLIDE
1
2
3
R196
0
RP11
0x4
3
2
1
4
5
6
7
8
R177
0
C200
(100pF)
R147
1K
C94
1uF
C81
0.1uF
R170
(1M)
C80
100pF
R193
0
R192
10
K
R184
(10
K
)
R182
0
R172
10
K
R210
(0
)
R174
0
TP2
C92
15pF
R189
47
K
R200
0
R393
0
C95
0.1uF
R152
(10
K
)
R211
1K
R205
(1K
)
X4
32.768kHz
1
2
R201
0
R179
0
C93
18pF
R191
10
K
RP19
(10Kx4)
3
2
1
4
5
6
7
8
R190
47
K
+
C96
(10uF/50V)
R161
(10
K
)
R165
47
K
R175
0
R158
47
K
R202
0
D2
1SS
3
5
5
1
2
R199
10
K
R168
47
K
J15
53014
-0210
1
2
1
2
To Standby Switch
CKDC3V
modified 07,05,11
modified 07,05,11
modified
07,06,09
10K to 47K
modified 07,05,11
modified 07,05,11
modified 07,05,11
modified 07,05,11
modified 07,07,23
Not Install
modified 07,08,27
modified 07,06,09 (3.3V to 3.3VB)
modified 07,05,11
modified 07,06,09
(3.3V to 3.3VB)
Not Install
modified 07,07,23
modified 07,06,09
(delete VCCKEY-PullUP(R392))
modified 07,06,09
(delete IC13, RP12, RP13)
modified 07,05,11
modified 07,05,11
modified 07,05,11
modified 07,05,11
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
7/16
CKDC-2
UP-3500 (V)
CIRCUIT DIAGRAM
– 46 –
Intersil ICL 3241
<RS232 ch1>
Intersil ICL 3241
<RS232 ch2>
FPGA
FPGA
modified 07,06,09
modified 07,06,09
MODIFIED 07,10,12
MODIFIED 07,10,12
MODIFIED 07,10,12
MODIFIED 07,10,12
MODIFIED 07,10,12
RS1_SIN
RS1_RI#
RS1_RTS#
RS1_DCD#
RS1_CTS#
RS1_DTR#
RS1_DSR#
RS1_SOUT
RS2_DSR#
RS2_DCD#
RS2_RI#
RS2_DTR#
RS2_SOUT
RS2_SIN
RS2_CTS#
RS2_RTS#
RS1_CTS#
RS1_SOUT
RS1_DTR#
RS1_RTS#
RS1_DSR#
RS1_DCD#
RS1_SIN
RS1_RI#
RS2_SOUT
RS2_DTR#
RS2_DSR#
RS2_SIN
RS2_RTS#
RS2_CTS#
RS2_DCD#
RS2_RI#
FPGA_SIN1
FPGA_CTS2
FPGA_DCD2
FPGA_RTS2
FPGA_RTS1
FPGA_RI1
FPGA_RI2
FPGA_DCD1
FPGA_CTS1
FPGA_SOUT1
FPGA_DTR1
FPGA_DSR2
FPGA_DTR2
FPGA_DSR1
FPGA_SIN2
FPGA_SOUT2
3.3V
5V
5V_2
3
2
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
GND-FRAME
5V
GND-FRAME
5V_2
3
2
GND-FRAME
GND-FRAME
GND-FRAME
+
C101
10uF/50V
1
2
R228
33
R225
33
C118
100pF
R230
33
C115
0.1uF
R411
0
C109
100pF
R427
0 (3216)
1
2
R422
0 (3216)
1
2
CN12
RS232C CN(D-SUB 9Pin)
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
R229
33
C110
100pF
R423
0 (3216)
1
2
R412
0
C111
0.1uF
C105
0.1uF
C113
0.1uF
SP14
(SHORT PIN & SOCKET)
1
3
2
C106
100pF
R224
33
R227
33
C107
100pF
IC14
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
GND
VCC
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
C120
100pF
C100
0.1uF
CN24
RS232C CN(D-SUB 9Pin)
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
+
C112
10uF/50V
1
2
C108
100pF
R223
33
R426
0 (3216)
1
2
C119
100pF
R424
0 (3216)
1
2
F13
T500mA/250V
IC15
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
GND
VCC
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
C102
0.1uF
C104
0.1uF
R222
33
C103
0.1uF
SP9
(SHORT PIN & SOCKET)
1
3
2
C117
100pF
R221
33
C121
100pF
C114
0.1uF
R231
33
C116
0.1uF
RS232 ch1-2
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
8/16
RS232C DRIVER (CH-CH2)
Page of 62
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