Sharp ER-A450S (serv.man5) Service Manual ▷ View online
Pin
No.
SYMBOL
SIGNAL
NAME
IN/
OUT
FUNCTION
32
KR6
KR6
IN
KEY RETURN 6
33
KR7
KR7
IN
KEY RETURN 7
34
AVRF
GND
35
AVDD
VDD
36
/RESET
/RES0
IN
37
XT2
32.768 KHz
38
XT1
39
IC
GND
40
X2
4.19 MHz
41
X1
42
VSS1
GND
43
LDRQ
LDRQ
IN
LORD REQUEST
44
ERC
ERC
IN
EVENT READ CANCEL
45
SHEN
/SHEN
OUT SHIFT ENABLE
46
/RES1
/RESETS
OUT SYSTEM TO RESET
47
ST6
ST6
OUT KEY STROBE 6
48
ST7
ST7
OUT KEY STROBE 7
49
ST8
ST8
OUT KEY STROBE 8
50
ST9
NU
OUT KEY STROBE 9
51
/POFF
/POFF
IN
POWER OFF
52
BUZ
BUZ
OUT BUZZER
53
T0
G1
OUT DISPLAY DIGIT 1
54
T1
G2
OUT DISPLAY DIGIT 2
55
T2
G3
OUT DISPLAY DIGIT 3
56
T3
G4
OUT DISPLAY DIGIT 4
57
T4
G5
OUT DISPLAY DIGIT 5
58
T5
G6
OUT DISPLAY DIGIT 6
59
T6
G7
OUT DISPLAY DIGIT 7
60
T7
G8
OUT DISPLAY DIGIT 8
61
T8
G9
OUT DISPLAY DIGIT 9
62
T9
G10
OUT DISPLAY DIGIT 10
63
T10
NU
OUT DISPLAY DIGIT 11
64
ID
NU
OUT DISPLAY SEGMENT
2-4. TPRC1 (F258024PC)
1) General
TPRC1 is the LSI circuit of the peripheral circuits of the microcom-
puter required for thermal printer control.
puter required for thermal printer control.
Fig. 2-6
The CPU is designed for use with H8/500. The bus I/F, however, is
not restricted to the design concept.
not restricted to the design concept.
The printer is designed mainly for use with PR-58. However, the
thermalhead composition (the dot number and the block number) is
rather flexible.
thermalhead composition (the dot number and the block number) is
rather flexible.
1. Auto cutter (Option)
2. Pulse motor
3. Thermalhead
4. Switch
CG ROM
PHAI
INT
WAIT
RD
WR
D0~7
A0~23
CPU
(H8/500)
(H8/500)
POF,RES
TPRC1
PB RAM
(SRAM)
(SRAM)
Auto cutter Pulse motor
Thermal
head
head
Switch
sensor
sensor
SO
CLOCK
SI
LATCH
ST1~4
HCD
PHUP,PSP,
PST,POP
CTAO,CTBO
PFP,PCRES
XRS,XJS
RVPON,JVPON
RTRM,
P
TJM
BA0~15
BD0~2
BRD
BWR
BRAS
(BRAS)
4 – 9
2) Pin configuration
Fig. 2-7
1
GND
2
GND
3
ST1
4
5
ST2
6
ST3
7
ST4
8
ST5
9
ST6
10
LATCH
11
12
13
14
SI
15
SO
16
CLOCK
17
INHDEC
18
CSEN
19
TEST2
20
21
22
23
24
TEST1
25
D0
26
D1
27
D2
28
D3
29
D4
30
31
32
33
D5
34
D6
35
D7
36
A0
37
A1
38
A2
39
NU
40
16
0
15
9
15
8
R
ES
ET
157
B
R
A
S
15
6
B
R
A
S
15
5
B
D
0
15
4
B
D
1
153
B
D
2
15
2
15
1
15
0
149
B
D
3
148
B
D
4
14
7
14
6
B
D
5
14
5
B
D
6
144
B
D
7
1
4
3
BA0
14
2
14
1
140
13
9
P
H
A
I
13
8
B
A
1
13
7
B
A
2
136
B
A
3
1
3
5
BA4
13
4
B
A
5
13
3
B
A
6
132
13
1
13
0
12
9
B
A
7
128
B
A
8
127
B
A
9
12
6
B
A
1
0
12
5
B
A
1
1
12
4
B
A
1
2
123
P
.P
12
2
12
1
41
42
BA
C
K
43
A3
44
A4
45
A5
46
A6
47
A7
48
A8
49
A9
50
51
52
53
A1
0
54
A1
1
55
A1
2
56
A1
3
57
A1
4
58
A1
5
59
A1
6
60
61
62
63
A1
7
64
A1
8
65
A1
9
66
A2
0
67
A2
1
68
A2
2
69
A2
3
70
71
72
RD
73
WR
74
AS
75
PO
F
76
IN
T
77
WO
78
79
BREQ
80
120
PTJM
119
PTRM
118
BA13
117
BA14
116
BA15
115
BRD
114
BWR
113
CGS
112
111
110
109
JAS
108
JBS
107
JCS
106
JDS
105
RAS
104
RBS
103
102
101
100
99
98
97
RCS
96
RDS
95
CTAO
94
CTBO
93
VHCOM
92
JVPON
91
90
89
88
RVPON
87
PFP
86
PCRES
85
PHUP
84
JPE
83
ROE
82
EBACK
81
EBREQ
GND
GND
GND
GND
VCC
VCC
VCC
VCC
GND
GND
GND
GND
INTI
WI
GN
D
GN
D
GN
D
VC
C
VCC
VCC
GND
GN
D
IN
H
NU
GND
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
GND
GND
GND
GND
GN
D
GN
D
VCC
VCC
VC
C
GND
GN
D
GND
GND
NU
GN
D
4 – 10
3) Block diagram
TPRC1 BLOCK DIAGRAM
Fig. 2-8
4) Pin description
Pin
No.
Signal
name
In/Out
Function
1
GND
—
GND
2
GND
—
GND
3
ST1
O
Head drive strobe signal 1
4
GND
—
GND
5
ST2
O
Head drive strobe signal 2
6
ST3
O
Head drive strobe signal 3
7
ST4
O
Head drive strobe signal 4
8
ST5
O
NU
9
ST6
O
NU
10
LATCH
O
Head latch signal
11
GND
—
GND
12
GND
—
GND
13
GND
—
GND
14
SI
I
Data return line, thermalhead -- TPRC1
15
SO
O
Send data from TPRC1 to thermalhead
Data from PB-RAM or zero data are
outputted at the falling of CLOCK signal.
16
Data from PB-RAM or zero data are
outputted at the falling of CLOCK signal.
16
16
CLOCK
O
Thermalhead CLOCK signal
SO is outputted at the edge of I Ä O,
and is taken at the edge of o Ä I.
SO is outputted at the edge of I Ä O,
and is taken at the edge of o Ä I.
17
INHDEC
I
GND
Pin
No.
Signal
name
In/Out
Function
18
CSEN
I
GND
19
TEST2
I
+5V internal counter timer test pin
20
Vcc
—
+5V
21
Vcc
—
+5V
22
Vcc
—
+5V
23
Vcc
—
+5V
24
TEST1
I
+5V internal counter timer test pin
25
D0
I/O
Data bus 0: Internal register, print buffer
data IO
data IO
26
D1
I/O
Data bus 1: Internal register, print buffer
data IO
data IO
27
D2
I/O
Data bus 2: Internal register, print buffer
data IO
data IO
28
D3
I/O
DAta bus 3: Internal register, print buffer
data IO
data IO
29
D4
I/O
Data bus 4: Internal register, print buffer
data IO
data IO
30
GND
—
GND
31
GND
—
GND
32
GND
—
GND
33
D5
I/O
Data bus 5: Internal register, print buffer
data IO
data IO
MOTOR
CONTROL
HEAD
I/F
MISC.
TEST
CIRCUIT
CUTTER
CONTROL
PB I/F UNIT
SYSTEM
I/F
PORT
PDCTLU
DECODEK UNIT
HEAD CONTROL
TIMER UNIT
MOTOR CONTROL
TIMER UNIT
CUTTER CONTROL
TIMER UNIT
CLOCK
GEN.
IN
T
E
RRUP
T
CI
RC
U
IT
H
O
ST
BU
S
I/
F
U
N
IT
INHBEC
CSEN
CGS
RD,WR
A0~23
D0~7
WO
WI
INT
INTI
PHAI
(
(
Φ)
BD0~7
BA0~15
BRAS,BRAS
BRD,BWR
RES
POF,INH
POP,PHUP,PFP,PCRES
PTRM,PTJM
CLOCK,SO,ST1~5,HCO
SI
EBAK,EPEQ
EBRK,EACK
RVPON,JVPON,
RAS,RBS,RCS,RDS,
JAS,JBD,JCS,JDS
TEST1,TEST2
CTAO,CTBO
4 – 11
Pin
No.
Signal
name
In/Out
Function
34
D6
I/O
Data bus 6: Internal register, print buffer
data IO
data IO
35
D7
I/O
Data bus 7: Internal register, print buffer
data IO
data IO
36
A0
I
Address bus 0
37
A1
I
Address bus 1
38
A2
I
Address bus 2
39
TPRCRQ2
—
Request signal
40
INTI
I
+5V
41
WI
I
+5V
42
BACK
I
BACK
43
A3
I
Address bus 3
44
A4
I
Address bus 4
45
A5
I
Address bus 5
46
A6
I
Address bus 6
47
A7
I
Address bus 7
48
A8
I
Address bus 8
49
A9
I
Address bus 9
50
GND
—
GND
51
GND
—
GND
52
GND
—
GND
53
A10
I
Address bus 10
54
A11
I
Address bus 11
55
A12
I
Address bus 12
56
A13
I
Address bus 13
57
A14
I
Address bus 14
58
A15
I
Address bus 15
59
A16
I
Address bus 16
60
Vcc
—
+5V
61
Vcc
—
+5V
62
Vcc
—
+5V
63
A17
I
Address bus 17
64
A18
I
Address bus 18
65
A19
I
Address bus 19
66
A20
I
Address bus 20
67
A21
I
Address bus 21
68
A22
I
Address bus 22
69
A23
I
Address bus 23
70
GND
—
GND
71
GND
—
GND
72
RD
I
Read strobe signal: Gate enable of data
bus D0 - D7 tri-state buffer
bus D0 - D7 tri-state buffer
73
WR
I
Write strobe signal: Write enable into
the internal register and the print buffer.
the internal register and the print buffer.
74
AS
I
AS
75
POF
I
Power off signal
76
INT
O
Interrupt signal
77
WO
O
Wait request signal to the CPU
78
INH
I
Head drive inhibit
79
BREQ
O
Bus request to CPU
80
—
—
NU
81
EBREQ
I
Bus request from option
82
EBACK
O
Bus acknolege to option
83
RPE
I
Receipt paper empty
Pin
No.
Signal
name
In/Out
Function
84
JPE
I
Journal paper empty
85
PHUP
I
Printer head up
86
PCRES
I
Auto cutter unit reset signal input (Nu)
87
PFP
I
Auto cutter unit FP signal input (Nu)
88
RVPON
O
Receipt side paper feed pulse motor
common power control signal (Nu)
common power control signal (Nu)
89
GND
—
GND
90
GND
—
GND
91
GND
—
GND
92
JVPON
O
Journal side paper feed pulse motor
common power control signal (Nu)
common power control signal (Nu)
93
VHCOM
O
Head drive common power control
94
CTBO
O
Cutter motor control signal (Nu)
95
CTAO
O
Cutter motor control signal (Nu)
96
RDS
O
Receipt side paper feed pulse motor
drive signal, phase D
drive signal, phase D
97
RCS
O
Receipt side paper feed pulse motor
drive signal, phase C
drive signal, phase C
98
GND
—
+5V
99
Vcc
—
+5V
100 Vcc
—
+5V
101 Vcc
—
+5V
102 Vcc
—
+5V
103 Vcc
—
+5V
104 RBS
O
Receipt side paper feed pulse motor
drive signal, phase B
drive signal, phase B
105 RAS
O
Receipt side paper feed pulse motor
drive signal, phase A
drive signal, phase A
106 JDS
O
Journal side paper feed pulse motor
drive signal, phase D
drive signal, phase D
107 JCS
O
Journal side paper feed pulse motor
drive signal, phase C
drive signal, phase C
108 JBS
O
Journal side paper feed pulse motor
drive signal, phase B
drive signal, phase B
109 JAS
O
Journal side paper feed pulse motor
drive signal, phase A
drive signal, phase A
110 GND
—
GND
111 GND
—
GND
112 GND
—
GND
113 CGS
O
NU
114 BWR
O
PB-RAM write strobe signal
115 BRD
O
PB-RAM read strobe signal
116 BA15
O
NU
117 BA14
O
Address 14 for PB-RAM
118 BA13
O
Address 13 for PB-RAM
119 PTRM
I
Receipt motor connector sens signal
120 PTJM
I
Journal motor connector sens signal
121 GND
—
GND
122 GND
—
GND
123 POPI
O
GND
124 BA12
O
Address bus 12 for PB-RAM
125 BA11
O
Address bus 11 for PB-RAM
126 BA10
O
Address bus 10 for PB-RAM
127 BA9
O
Address bus 9 for PB-RAM
128 BA8
O
Address bus 8 for PB-RAM
129 BA7
O
Address bus 7 for PB-RAM
4 – 12
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