Sharp CD-DVD500 (serv.man18) Service Manual ▷ View online
– 79 –
CD-DVD500H
Figure 79 BLOCK DIAGRAM OF IC
IC3504 RH-iX1687GEZZ: DVD Microcomputer (IX1687GE)
Port D
PF7/ø
PF6/AS
PF5/RD
PF4/HWR
PF3/LWR
PF2/LCAS/WAIT/BREQO
PF1/BACK
PFD/BREQ
PF6/AS
PF5/RD
PF4/HWR
PF3/LWR
PF2/LCAS/WAIT/BREQO
PF1/BACK
PFD/BREQ
PG4/CS0
PG3/CS1
PG2/CS2
PG1/CS3
PG0/CAS
PG3/CS1
PG2/CS2
PG1/CS3
PG0/CAS
P67/CS7/IRO3
P66/CS8/IRO2
P66/IRQ3
P64/IRQ0
P63/TEND1
P62/DREQ1
P61/TEND0/CS5
P60/DREQ0/CS4
P66/CS8/IRO2
P66/IRQ3
P64/IRQ0
P63/TEND1
P62/DREQ1
P61/TEND0/CS5
P60/DREQ0/CS4
P10/PO8/TIOCA0/DACK0
P11/PO9/TIOCB0/DACK1
P12/PO10/TIOCC0/TCLKA
P13/PO11/TIOCD0/TCLKB
P14/PO13/TIOCA1
P15/PO13/TIOCB1/TCLKC
P16/PO14/TIOCA2
P17/PO15/TIOCB2/TCLKD
P20/PO0/TIOCA3
P21/PO1/TIOCB3
P22/PO2/TIOCC3/TMRI0
P23/PO3/TIOCD4/TMCI0
P24/PO4/TIOCA4/TMRI1
P24/PO5/TIOCB4/TMCI1
P26/PO6/TIOCA5/TMO0
P27/PO7/TIOCB5/TMO1
Vref
AVcc
AVss
P47/AN7/DA1
P45/AN6/DA0
P45/AN5
P44/AN4
P43/AN3
P42/AN2
P41/AN1
P40/AN0
PA7/A23/IRO7
PA6/A22/IRO6
PA5/A21/IRO5
PA4/A20/IRO4
PA3/A19
PA2/A18
PA1/A17
PA0/A16
PA6/A22/IRO6
PA5/A21/IRO5
PA4/A20/IRO4
PA3/A19
PA2/A18
PA1/A17
PA0/A16
PB7/A15
PB6/A14
PB5/A13
PB4/A12
PB3/A11
PA2/A10
PB1/A9
PB0/A8
PB6/A14
PB5/A13
PB4/A12
PB3/A11
PA2/A10
PB1/A9
PB0/A8
PC7/A7
PC6/A6
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
PC6/A6
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
P35/SCX1
P34/SCX0
P33/RxD1
P32/RxD0
P31/TxD1
P30/TxD0
P34/SCX0
P33/RxD1
P32/RxD0
P31/TxD1
P30/TxD0
P50/TxD2/IRD4
P51/RxD2/IRD5
P52/SCK2/IRQ6
P53/ADTRG/IRQ7
/WAIT/BREQO
P51/RxD2/IRD5
P52/SCK2/IRQ6
P53/ADTRG/IRQ7
/WAIT/BREQO
PO7/O15
PO6/O14
PO5/O13
PO4/O12
PO3/O11
PO2/O10
PO1/O9
PO0/O8
PE7/D7
PE6/D6
PE5/D5
PE4/D4
PE3/D3
PE2/D2
PE1/D1
PE0/D0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC
VCC
VCC
VCC
VCC
MD2
MD1
MD0
EXTAL
XTAL
STBY
RES
WOTOVF(FWE)*
MD1
MD0
EXTAL
XTAL
STBY
RES
WOTOVF(FWE)*
1
NM3
Port E
H8S/2000 CPU
DTC
DMAC
RAM*
2
Interruption controller
Clock
oscillator
Bass controller
Port B
Port A
Inside data bus
Inside address bus
Port C
Port 3
Port 5
WDT
PPG
SCI
D/A converter
A/D converter
RAM
TPU
8 bit timer
Port F
Port G
Port 6
Port 1
Port 2
Port 4
NOTE: *
1
A FWE terminal is applied only to the F-ZTA edition. A WDTOVF terminal function can't be used by the F-ZTA edition.
*
2
A ROM is applied to the master ROM edition, the ZTAT edition, the F-ZTA edition.
CD-DVD500H
– 80 –
1
RST
Input
Hardware reset input terminal. (L: reset, R: normal operation)
2*
MIMD
Input
Microcomputer I/F mode select input terminal. (L: serial, H: I2C bus)
3
MICS
Input
Microcomputer I/F chip select input terminal.
4
MILP
Input
Microcomputer I/F latch pulse input.
5
MIDIO
Input/Output
Microcomputer I/F data input/output terminal.
6
MICK
Input
Microcomputer I/F clock input terminal.
7
MIACK
Output
Microcomputer I/F acknowledge output terminal.
8*
FI0
Input
Flag input terminal 0.
9*
FI1
Input
Flag input terminal 1.
10*
FI2
Input
Flag input terminal 2.
11*
FI3
Input
Flag input terminal 3.
12*
IRQ
Input
Interrupt input terminal.
13
VSS
—
Digital ground terminal.
14
LRCKA
Input
Audio I/F LR clock input terminal A.
15
BCKA
Input
Audio I/F bit clock input terminal A.
16
SDO0
Output
Audio I/F data output terminal 0.
17
SDO1
Output
Audio I/F data output terminal 1.
18
SDO2
Output
Audio I/F data output terminal 2.
19*
SDO3
Output
Audio I/F data output terminal 3.
20
LRCKB
Input
Audio I/F LR clock input terminal B.
21
BCKB
Input
Audio I/F bit clock input terminal B.
22
SDI0
Input
Audio I/F data input terminal 0.
23
SDI1
Input
Audio I/F data input terminal 1.
24
VDD
Input
Digital power supply terminal.
25
LRCKOA
Output
Audio I/F LR clock output terminal A.
26
BCKOA
Output
Audio I/F bit clock output terminal A.
27
TEST0
Input
Test input terminal 0. (L: test, H: normal operation)
28
TEST1
Input
Test input terminal 1. (L: test, H: normal operation)
29*
LRCKOB
Output
Audio I/F LR clock output terminal B.
30*
BCKOB
Output
Audio I/F bit clock output terminal B.
31*
TXO
Output
SPDIF output terminal.
32
TEST2
Input
Test input terminal 2. (L: test, H: normal operation)
33
TEST3
Input
Test input terminal 3. (L: test, H: normal operation)
34
RX
Input
SPDIF input terminal.
35
VSS
—
Digital ground terminal.
36
TSTSUB0
Input
Test sub input terminal 0. (L: test, H: normal operation)
37
FCONT
Output
VCO frequency control output terminal.
38
TSTSUB1
Input
Test sub input terminal 1. (L: test, H: normal operation)
39
TSTSUB2
Input
Test sub input terminal 2. (L: test, H: normal operation)
40
PDO
Output
Phase error signal output terminal.
41
VDDA
Input
Analog power supply terminal.
42*
PLON
Input
Clock select input terminal. (L: external clock, H: VCO clock)
43
AMPI
Input
Amplifier input terminal for LPF.
44
AMPO
Output
Amplifier output terminal for LPF.
45
CKI
Input
External clock input terminal.
46
VSSA
—
Analog ground terminal.
47
CKO
Output
DIR clock output terminal.
48
LOCK
Output
VCO lock detection output terminal.
49
VSS
—
Digital ground terminal.
50*
WR
Output
External SRAM write signal output terminal.
51*
OE
Output
External SRAM output enable signal output terminal.
IC504 RH-iX0443AWZZ: Dolby Decoder (IX0443AW) (1/2)
Terminal Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
– 81 –
CD-DVD500H
52*
CE
Output
External SRAM chip enable signal output terminal.
53
VDD
Input
Digital power supply terminal.
54*
IO7
Input/Output
External SRAM data I/O terminal 7.
55*
IO6
Input/Output
External SRAM data I/O terminal 6.
56*
IO5
Input/Output
External SRAM data I/O terminal 5.
57*
IO4
Input/Output
External SRAM data I/O terminal 4.
58*
IO3
Input/Output
External SRAM data I/O terminal 3.
59*
IO2
Input/Output
External SRAM data I/O terminal 2.
60*
IO1
Input/Output
External SRAM data I/O terminal 1.
61*
IO0
Input/Output
External SRAM data I/O terminal 0.
62
VSS
—
Digital ground terminal.
63*
AD0
Output
External SRAM address output terminal 0.
64*
AD1
Output
External SRAM address output terminal 1.
65*
AD2
Output
External SRAM address output terminal 2.
66*
AD3
Output
External SRAM address output terminal 3.
67*
AD4
Output
External SRAM address output terminal 4.
68*
AD5
Output
External SRAM address output terminal 5.
69*
AD6
Output
External SRAM address output terminal 6.
70*
AD7
Output
External SRAM address output terminal 7.
71
VDD
Input
Digital power supply terminal.
72*
AD8
Output
External SRAM address output terminal 8.
73*
AD9
Output
External SRAM address output terminal 9.
74*
AD10
Output
External SRAM address output terminal 10.
75*
AD11
Output
External SRAM address output terminal 11.
76*
AD12
Output
External SRAM address output terminal 12.
77*
AD13
Output
External SRAM address output terminal 13.
78*
AD14
Output
External SRAM address output terminal 14.
79*
AD15
Output
External SRAM address output terminal 15.
80*
AD16
Output
External SRAM address output terminal 16.
81
VSS
—
Digital ground terminal.
82
PO0
Output
General-purpose output terminal 0.
83*
PO1
Output
General-purpose output terminal 1.
84
PO2
Output
General-purpose output terminal 2.
85*
PO3
Output
General-purpose output terminal 3.
86*
PO4
Output
General-purpose output terminal 4.
87*
PO5
Output
General-purpose output terminal 5.
88*
PO6
Output
General-purpose output terminal 6.
89*
PO7
Output
General-purpose output terminal 7.
90
VDDDL
Input
Power supply terminal for DLL.
91
LPFO
Output
LPF output terminal for DLL.
92*
DLON
Input
DLCKS terminal
DLON terminal
DLL clock setting
"L"
"L"
SCKI input. (DLL circuit off)
93*
DLCKS
Input
"L"
"H"
Quadruple of XI clock
"H"
"L"
Triple of XI clock
"H"
"H"
Sextuple of XI clock
94
SCKO
Output
ASP clock output terminal.
95
VSSDL
—
Ground terminal for DLL.
96
SCKI
Input
External system clock input terminal.
97
VSSX
—
Ground terminal for crystal oscillation circuit.
98
XO
Output
Crystal oscillation output terminal.
99
XI
Input
Crystal oscillation input terminal.
100
VDDX
Input
Power supply terminal for crystal oscillation circuit.
IC504 RH-iX0443AWZZ: Dolby Decoder (IX0443AW) (2/2)
Terminal Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
CD-DVD500H
– 82 –
Figure 82 BLOCK DIAGRAM OF IC
IRQ
SDin
SDOn
LRCK/BCK
RX
LOCK
/RST
MIMD
/MICS
/MILP
MIDIO
/MICK
MIACK
TXO
FIn
POn
IOn
ADn
/CE,/OE,/WR
LPFO
DLON
SCKI
SCKO
ROM
4 kword x 3
RAM
128 word
40 bit
XRAM
4 kword
YRAM
4 kword
CROM
4 kword
ERAM
4 kword
DLL
3
17
8
8
4
DIT
AY
AX
MZ
MY
MX
ALU
MAC
X0,X1,X2
Y0,Y2,Y3
A1
A0
A2
A3
DIR
4
2
I bus
Y bus
X bus
PROGRAM
EXECUTE
CONTROL
PROGRAM
INSTRUCTION
DECODER
INTERRUPT
CONTROL
AUDIO
I/F
TIMER
MICROCOMPUTER
I/F
REGISTER
ROUND OFF/LIMIT
ROUND OFF/LIMIT
ADRESS OPERATION
X2
C POINTER
REGISTER
Y POINTER
REGISTER
X POINTER
REGISTER
BUS
SWITCH
TIMING
EXTERNAL
SRAM I/F
GENERAL-PURPOSE
OUTPUT PORT
FLAG
IC504 RH-iX0443AWZZ: Dolby Decoder (IX0443AW)
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