DOWNLOAD Sharp CD-DVD500 (serv.man18) Service Manual ↓ Size: 181.85 KB | Pages: 19 in PDF or view online for FREE

Model
CD-DVD500 (serv.man18)
Pages
19
Size
181.85 KB
Type
PDF
Document
Service Manual
Brand
Device
Audio / System / Function table of IC
File
cd-dvd500-sm18.pdf
Date

Sharp CD-DVD500 (serv.man18) Service Manual ▷ View online

– 83 –
CD-DVD500H
1
SDOS
Input
SDTO source select pin. (Note 1)
“L”: internal ADC output, “H”: I2C DAUX input
2
I2C
Input
Serial control mode select pin. “L”: 3-wire serial, “H”: I2C bus
3
SMUTE
Input
Software mute pin.  (Note 1)
Software mute is started with “H” and canceled with “L”.
4
BICK
Input
Audio serial data clock pin.
5
LRCK
Input
Input channel clock pin.
6
SDTI1
Input
DAC 1 audio serial data input pin.
7
SDTI2
Input
DAC 2 audio serial data input pin.
8
SDTI3
Input
DAC 3 audio serial data input pin.
9
SDTO
Output
Audio serial data output pin.
10
DAUX
Input
Auxiliary audio serial data input pin.
11
DFS
Input
Double-speed sampling mode pin. (Note 1)
“L”: normal speed, “H”: double speed
12*
N.C.
13
DZFE
Input
Zero input detection function enable pin.
“L”: mode 7 (disable) in parallel mode, selectable with DZFM 2-0 bit in serial mode.
“H”: mode 0 (output from DZF1 with AND of 6 ch)
14
TVDD
Input
Power supply pin for output buffer, 2.7 V - 5.5 V.
15
DVDD
Input
Digital power supply pin, 4.5 V - 5.5 V.
16
DVSS
Digital ground pin, 0 V.
17
PDN
Input
Power down & reset pin. When this pin is switched to “L”, it enters the power down state
and the register is initialized. Reset it with the PDN pin if P/S and CAD 0-1 are changed.
18
TST
Input
Test pin. Connect it to DVSS.
19*
N.C.
20
ADIF
Input
Analog input type select pin. “H”: differential input, “L”: single end input
21
CAD1
Input
Chip address 1 pin.
22
CAD0
Input
Chip address 0 pin.
23
LOUT3
Output
DAC3 L channel analog output pin.
24
ROUT3
Output
DAC3 R channel analog output pin.
25
LOUT2
Output
DAC2 L channel analog output pin.
26
ROUT2
Output
DAC2 R channel analog output pin.
27
LOUT1
Output
DAC1 L channel analog output pin.
28
ROUT1
Output
DAC1 R channel analog output pin.
29
LIN-
Input
L channel analog inversion input pin.
30
LIN+
Input
L channel analog non-inversion pin.
31
RIN-
Input
R channel analog inversion input pin.
32
RIN+
Input
R channel analog non-inversion pin.
33*
DZF2
Output
Zero input detection 2 pin. (Note 2)
If the group 2 input data has been “0” for 8,192 consecutive times or the RSTN bit is “0”, it
changes to “H”.
OVF
Output
Analog input overflow detection pin. (Note 3)
It changes to “H” when the analog input to Lch or Rch overflows.
34
VCOM
Output
Common voltage output pin, AVDD/2
Mount a capacitor of large capacity (approx. 2.2 
µ
F) to remove power source noise.
35
VREFH
Input
Reference voltage input pin, AVDD.
36
AVDD
Input
Analog power supply pin, 4.5 V - 5.5 V.
37
AVSS
Analog ground pin, 0 V.
38*
DZF1
Output
Zero input detection 1 pin. (Note 2)
If the group 1 input data has been “0” for 8,192 consecutive times or the RSTN bit is “0”, it
changes to “H”.
39
MCLK
Input
Master clock input pin.
40
P/S
Input
Parallel/serial select pin.
“L”: serial control mode, “H”: parallel control mode
IC505 RH-iX0454AWZZ: 6-Ch Code IC (AK4527BVQ) (1/2)
Terminal Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
CD-DVD500H
– 84 –
Figure 84 BLOCK DIAGRAM OF IC
IC505 RH-iX0454AWZZ: 6-Ch Code IC (AK4527BVQ) (2/2)
Terminal Name
Pin No.
Input/Output
Function
41
DIF0
Input
Audio data interface format 0 pin. (in parallel control mode)
CSN
Input
Chip select pin. (in 3-wire serial control mode)
Connect it to DVDD in I2C bus control mode.
42
DIF1
Input
Audio data interface format 1 pin. (in parallel control mode)
SCL/CCLK
Input
Control data clock pin. (in serial control mode)
I2C = “L”: CCLK (3-wire serial), I2C = “H”: SCL (I2C bus)
43
LOOP0
Input
Loopback mode 0 pin. (in parallel control mode)
Enables digital loopback from ADC to all DACs.
SDA/CDTI
Input/Output
Control data input pin (in serial control mode)
I2C = “L”: CDTI (3-wire serial), I2C = “H”: SDA (I2C bus)
44
LOOP1
Input
Loopback mode 1 pin. (Note 1)
Input from SDTI1 to all DACs.
Notes:
1. When P/S = “L”, the register and OR are assigned to SDOS, SMUTE, DFS and LOOP1 pins.
2. When P/S = “L” and DZFE = “L”, the groups 1 and 2 are selectable with DZM2-0 bit.
3. This pin changes to OVF pin when OVFE bit is set to “1” in the serial control mode.
4. Do not float any input pins.
ADC
ADC
HPF
Audio
I/F
HPF
DATT
DAC
LPF
DATT
DAC
LPF
DATT
DAC
LPF
DATT
DAC
LPF
DATT
DAC
LPF
DATT
DAC
LPF
LIN+
LIN-
RIN+
RIN-
LOUT1
ROUT1
LOUT2
ROUT2
LOUT3
ROUT3
AK4527B
MCLK
MCLK
LRCK
LRCK
BICK
BICK
DAUX
SDOS
SDTO
SDTI1
SDTI2
SDTI3
SDIN1
SDIN2
SDIN3
SDOUT
Format
Converter
LRCK
BICK
SDIN
SDOUT1
SDOUT2
SDOUT3
AC3
RX1 RX2 RX3 RX4
XTI
XTO
MCKO
LRCK
BICK
SDTO
DIR
AK4112A
– 85 –
CD-DVD500H
IC601  VHiLC75341/-1: Audio Processor (LC75341)
Figure 85 BLOCK DIAGRAM OF IC
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
17
LVref
RVref
CONTROL
CIRCUIT
CONTROL
CIRCUIT
CONTROL
CIRCUIT
LOUT
LBASS
0.1uF
LIN
LSEL0
L4
L3
L2
L1
R1
R2
R3
R4
RSEL0
R1N
RTRE
LTRE
RBASS
0.1uF
ROUT
Yref
VDD
CL
DI
CE
YSS
CCB
INTERFACE
CD
Tuner
Tape
Video
24 23 22 21 20 19 18 17 16 15 14 13
1
2
3
4
5
6
7
8
9
10 11 12
LC75341
DI
CE
VSS
LOUT
LBASS
LTRE
LIN
LSEL0
L4
L3
L2
L1
CL
VDD
VREF
ROUT
RBASS
RTRB
RIN
RSEL0
R4
R3
R2
R1
CD-DVD500H
– 86 –
1*-4*
OUT4-OUT1
Port output.
5
AVDD
Analog positive power supply terminal.
6
SWin
Volume input.
7
GNDS
GND terminal.
8
SRin
Volume input.
9
SLin
Volume input.
10
GNDC
GND terminal.
11
Cin
Volume input.
12
GNDR
GND terminal.
13
Rin
Tone input.
14
GNDL
GND terminal.
15
Lin
Tone input.
16
BYPASSR
Volume input to L/R when bypassed.
17
BYPASSL
Volume input to L/R when bypassed.
18
LTRE
Tone treble frequency adjustment terminal.
19
LBASS3
Tone bass frequency adjustment terminal.
20
LBASS2
Tone bass frequency adjustment terminal.
21
LBASS1
Tone bass frequency adjustment terminal.
22
CR2
Tone output terminal.
23
RBASS2
Tone bass frequency adjustment terminal.
IC602 VHiM62446FP-1: 6-Ch Electronic Volume (M62446FP)
Terminal
Name
Pin
No.
Function
24
RBASS3
Tone bass frequency adjustment terminal.
25
RTRE
Tone treble frequency adjustment terminal.
26
RBASS1
Tone bass frequency adjustment terminal.
27
CR1
L/R volume input.
28
CL2
Tone output terminal.
29
CL1
L/R volume input.
30
AVSS
Analog negative power supply terminal.
31
Lout
L output.
32
Rout
R output.
33
Cout
Volume output.
34
SLout
Volume output.
35
SRout
Volume output.
36
SWout
Volume output.
37
AGND
Analog GND terminal.
38
DGND
Digital GND terminal.
39
LATCH
Latch input terminal.
40
DATA
Data input terminal.
41
CLK
Clock input terminal for data transfer.
42
DVDD
Digital power supply terminal.
Terminal
Name
Pin
No.
Function
Figure 86 BLOCK DIAGRAM OF IC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
33
34
35
36
37
38
39
40
41
42
32
31
30
29
28
27
26
25
24
23
22
OUT4
OUT3
OUT2
OUT1
AVDD
SWin
GNDS
SRin
SLin
GNDC
Cin
GNDR
Rin
GNDL
Lin
BYPASSR
BYPASSL
LTRE
LBASS3
LBASS2
LBASS1
DVDD
CLK
DATA
LATCH
DGND
AGND
SW out
SRout
SLout
Cout
Rout
Lout
AVSS
CL1
CL2
CR1
CR2
RTRE
RBASS3
RBASS2
RBASS1
OUT-
PUT
PORT
MCU
I/F
volume
volume
volume
volume
volume
volume
tone
tone
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
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