Panasonic KX-TCD961GB Service Manual ▷ View online
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KX-TCD961GB
Fig. 29
BLOCK DIA
GRAM RF UNIT (HANDSET)
Doubler
1.89GHz
BPF
TR Switch
RF
Amp
112.32MHz
BPF
BPF=Bandpass Filter
LPF=Low Pass Filter
LPF=Low Pass Filter
Mixer
Phase-Lock-Loop
Tx
Buffer
PA
Switch
P.A.
SAW
BPF
IF
Amp
RSSI
DC
Comp
IF
Amp
Det.
VCO
Buff.
DC Contr.
Rx/Tx
3V
Reg.
3V
Data
LPF
945MHz
1.89GHz
10.368MHz
4V-FILT
SLICE OUT
31
SLICE CTRL
30
RSSI
32
SYS CLOCK
34
PLL ENABLE
22
PLL DATA
21
PLL CLOCK
20
PLL PD
12
Vcc OC
18
RF ON
8
Rx DATA
29
Tx DATA
19
Vcc PA (4V)
5
,
4
PLL PWR DWN
17
Tx/Rx SWITCH
2
PA RAMP
39
RF1
49
NC
42
GND
43
GND
44
GND
45
GND
46
GND
47
GND
48
RF1
49
GND
15
NC
14
NC
13
PLL PD
12
NC
11
GND
10
GND
9
RF ON
8
GND
7
GND
6
Vcc PA
5
Vcc PA
4
GND
3
Tx/Rx SWITCH
2
GND
1
GND
26
GND
27
GND
28
Rx DATA
29
SLICE CTRL
30
SLICE OUT
31
RSSI
32
GND
33
SYS CLOCK
34
GND
35
GND
36
GND
37
GND
38
PA RAMP
39
GND
40
GND
41
GND
25
GND
24
GND
23
PLL ENABLE
22
PLL DATA
21
PLL CLOCK
20
Tx DATA
19
Vcc OC
18
PLL PWR DWN
17
NC
16
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KX-TCD961GB
Fig. 30
BLOCK DIA
GRAM B
ASE-B
AND SECTION (HANDSET)
Battery
IC3
EEPROM
T3
Tr
T5
Buf
T1, T2
Charge
Circuit
Circuit
J4
IC2
Flash
PROM
LCD
Display
Driver
Keyboard
30
84
CE
ADDRESS
KEYBOARD ROWS
KEYBOARD COLUMNS
DATA
32
86
10
23
23
SYS-CLK
Tx-DATA
Rx-DATA
PLLCLK
OE
7
93
WR
RCS
RD
WR
RD
WR
Key Scan
Key In
2
18
47
CS
17
18
20
1
46
RS
19
12
13
X1
D12
5
+3V
+3V
+3.9V
Buzzer
38
6
50
41
45
69
52
40
Ear.
Amp
Amp
DAC
ADC
Clock
+Data
Recov
+Data
Recov
Gaus
Filter
RSSI
ADC
ADC
Microprocessor
Clock
Gen.
Gen.
BMC
IC1
BBIC
39
27/26
4
3
3
49
SLICE OUT
RSSI
10.368MHz
22
21
21
PLLDATA
PLLLENABLE
PLLLENABLE
5
PLLPD
4
RFON
PA-RAMP
PA-RAMP
24
Tx/Rx-SW
CHARGE SW.
D7
On
RESET
SERIAL DATA
INPUT/OUT
INPUT/OUT
SERIAL DATA
SERIAL DATA
SER. CLOCK
RF CLK
SER. CLOCK
CHARGE
CONTACTS
CONTACTS
66
65
58
Mic.
Earpiece
+
+
PON
VBAT2
LD02-
CTRL
CTRL
RSTN
BUZZER
CHARGE
PASUP
61
63
J3
J6
J8
J8
Mic.
Amp
Amp
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KX-TCD961GB
1. THE BASE-BAND SECTION (SEE BLOCK DIAGRAM Fig. 30)
1.1 INTRODUCTION
The base-band section consists of a base-band integrated circuit (BBIC), a Flash PROM, an EEPROM, an LCD
Display, a Microphone, an Earpiece, and power supply/battery management circuits.
1.2 THE BASE-BAND INTEGRATED CIRCUIT (BBIC)
The National SC14404 BBIC (IC1) is a CMOS device designed to handle all the audio, signal and data processing
needed in a DECT handset. It contains two microprocessors - one general purpose - while the other “burst mode
controller” takes care of DECT specific physical layer and radio section control.
The BBIC also contains the ADPCM transcoders, a low power 14 bit codec (ADC/DAC), various other ADC’s, DAC’s
and timers, a UART for data communication with RF unit, a gaussian filter for the DECT GFSK modulation method,
clock and data recovery circuits, a clock oscillator circuit, a battery management circuit, and a pair of gain
controllable amplifiers for the microphone and earpiece.
Fig.31
+3V +3V
Circuit Diagram
CIRCUIT OPERATION (HANDSET)
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KX-TCD961GB
1.3 FLASH PROM (SEE Fig. 31)
The 2 Mbit Flash PROM IC2 contains the operational firmware for the BBIC’s general purpose microprocessor.
It is interfaced to the BBIC using address lines AD0 to AD17, data lines DAB0 to DAB7, and the chip
select (IC1 pin 84), read (IC1 pin 86), and write (IC1 pin 93) control lines.
1.4 EEPROM (SEE Fig. 31)
The electrically erasable PROM IC3 is used to store all the temporary operating parameters for the handset.
It used a two-line serial data interface with the BBIC(TP82), with bi-directional data on IC3 pin 5,
and a 45 kHz clock on pin 6 (TP83).
1.5 LCD DISPLAY, AND DISPLAY DRIVER (SEE Fig. 32)
The LCD display also receives data via a serial interface. Serial data is sent to LCD display on pin 3 (TP70).
The RS signal (pin 1, TP67) is used by the BBIC to send either commands or data.
Fig. 32
Circuit Diagram
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