Panasonic KX-TCD951GB / KX-TCD955GC Service Manual ▷ View online
61
KX-TCD951GB/KX-TCD955GC
3.1.2 Base Unit EEPPROM adjustment parameters.
This section describes the EEPROM parameters needed for adjustment. When programming the EEPROM to default
settings none of these settings are overwritten. Only if the value FFh is found in one of these parameters, the parameter will
be programmed to default setting. Note that adjustment parameters are not allowed to be equal to 0xFF, if so they will
be reprogrammed by the default programming.
settings none of these settings are overwritten. Only if the value FFh is found in one of these parameters, the parameter will
be programmed to default setting. Note that adjustment parameters are not allowed to be equal to 0xFF, if so they will
be reprogrammed by the default programming.
Address
Name
Description
10
Frequency
Crystal frequency
16
BMC. Vol Flt M
Modulation
19
BMC. Lsr Mic Gain
Load speaker and mic gain
32-33
Dsp Dtmf Gain
Gain of DTMF tones
3A
BSUI Config
Configuration of base station
3B-3C
Dsp Signal Limit
PSTN line signal limit
3F
Country Code
Country code to be sent to TAM module.
40
Quad Tune
DA converter output for Quadrature.
7b
LI. Flags
Various line interface flags.
82
Tam Flags
Various Tam module configuration flags.
036B..0371
FF
0372
06
0373
09
0376
03
0377
0B
037B
E0
037C
64
038A
0E
038B
00
038C
19
038E
06
038F..03DF
FF
Free_Block_0b to
Free_Block_7f
Free_Block_7f
Free Block
03E0..0407
FF
Enable to
RingMinTimeout
RingMinTimeout
FSK data
62
KX-TCD951GB/KX-TCD955GC
1. Scope
The purpose of this document is to describe the layout of the EEPROM (IC4) for the handset.
The EEPROM (IC4) contains hardware, software, and user specific parameters. Some parameters must be set during
production of the handset / base unit and some are set by the user when configuring the handset or during normal use of
the phone, e.g. redial stack.
production of the handset / base unit and some are set by the user when configuring the handset or during normal use of
the phone, e.g. redial stack.
EEPROM LAYOUT (HANDSET)
2. Introduction
All hardware specific parameters must be setup before the handset or base unit leave the factory. As some of these
parameters are vital for the operation of the hardware, a set of default parameters must be programmed before the actual
hardware fine tuning can be initiated. This document lists all default parameters with a short description.
parameters are vital for the operation of the hardware, a set of default parameters must be programmed before the actual
hardware fine tuning can be initiated. This document lists all default parameters with a short description.
In the tables below values in a range that are similar are not repeated; i.e. Address 00 to 01 contains the value 00 simply
means that the value 00 is repeated in all addressee in the range.
means that the value 00 is repeated in all addressee in the range.
3. EEPROM (IC4) Layout
3.1.1 Handset EEPROM layout.
Address
Default value
Name
Description
General Setup
00-01
00
PIN
PIN code for handset
02
7D
BuzzerVolumeAdjust
Buzzer volume attenuation parameter (1= full
attenuation, 7d = no attenuation)
attenuation, 7d = no attenuation)
04
80
Quadrature adjustment
Sets tuning voltage for the quad-detector
(not used on SC14404)
(not used on SC14404)
05
06
InbandAttenuation
Number of steps to add to MinAudioVolume,
MedAudioVolume, and MaxAudioVolume during
generation of in-band tones.
MedAudioVolume, and MaxAudioVolume during
generation of in-band tones.
06
19
RangeWarningTreshold
Treshold for rangewarningcounter.
counts down 6 steps/sec from 0x1E. Desides where to
give rangewarning.
give rangewarning.
Range 0x1E-0x00
07-0B
FF
Unused
Free block
0C
1E
MACconnTime
MAC connection time-out value for loosing connection.
0D
1E
PplockedTime
Time-out value for keeping locked to base without
receiving RFPI from base.
receiving RFPI from base.
0E
62
AcceptableRssi
Maximum RSSI level for accepting a channel for bearer
setup.
setup.
0F
06
RssiMargien
Maximum increase of RSSI level before transmission.
10
3C
LowQualityLevel
Signal quality level at which handover is initiated (CRC
error count).
error count).
11
07
LockMode
Bit pattern defining which PP modes are allowed:
Bit 0: Normal paging mode (receive every 16 frame)
Bit 1: Lower CPU clock to 1/16
Bit 2: Enter sleep mode during scanning.
Bit 3: 10.368 MHz CPU clock
Bit 0: Normal paging mode (receive every 16 frame)
Bit 1: Lower CPU clock to 1/16
Bit 2: Enter sleep mode during scanning.
Bit 3: 10.368 MHz CPU clock
12-14
00 10 00
RssiCompensation
Rssi compensation table:
Byte 1: Offset to be subtracted from ADC-value
Byte 2: Factor for compensation (0x10 equals 1.0)
Byte 3: Reserved
Reference is –150dBm
Byte 1: Offset to be subtracted from ADC-value
Byte 2: Factor for compensation (0x10 equals 1.0)
Byte 3: Reserved
Reference is –150dBm
15-44
FF
Unused
Free block
45
FF
Unused
Free block
46
08
BandGapReg2
Bit 3-0 Bandgap register for Battery management
47
00
DspSideTone (LSB)
DspSideTone_lsb
(0xFFFF Equals 0x2000)
48
1E
DspSideTone (MSB)
DspSideTone_msb
(0xFFFF Equals 0x2000)
63
KX-TCD951GB/KX-TCD955GC
49
B4
EMC (LSB)
Equipment Manufacturer Code
4A
00
EMC (MSB)
Equipment Manufacturer Code
BMC control variables
4B
80
Frequency
Default adjustment value for the crystal.
4C
2F
BMC.SyncCfg
RC0: S_err[3..0],INV_RDI,INV_TDO,SenseA,PP/Fpn
Bit 7..4 : S_err[3..0]. Max. number of allowed in
unmasked
S-fields bits.
00000 = 0 errors allowed
00001 = 1 error allowed
....
11111 = 15 errors allowed
Bit 3: inv_RDI. 1=invert incoming data on RDI pin
Bit 2: inv_TDO. 1=invert outgoing data on TDO pin
Bit 1: SenseA. If 1 B-field data is not written if CRC
error.
Bit 7..4 : S_err[3..0]. Max. number of allowed in
unmasked
S-fields bits.
00000 = 0 errors allowed
00001 = 1 error allowed
....
11111 = 15 errors allowed
Bit 3: inv_RDI. 1=invert incoming data on RDI pin
Bit 2: inv_TDO. 1=invert outgoing data on TDO pin
Bit 1: SenseA. If 1 B-field data is not written if CRC
error.
Bit 0: PP/Fpn. 1=PP mode
4D
00
BMC.MaskSlide
RC1: Slide[3..0], Mask[3..0]
Bit 7..4: Masking 1111= S[8..15]
Bit 3..0: Slide error measurement : 0000=none of
S[8..15]
Bit 7..4: Masking 1111= S[8..15]
Bit 3..0: Slide error measurement : 0000=none of
S[8..15]
4E
12
BMC.CM_Vol
RC2:
Bit 7: CM5. Test bit. 0=normal mode
Bit 6: CM6. Test bit. 0=normal mode
Bit 5..0: Vol[5..0]. Voltage level of Gaussian output on
TDO pin.
00000 = -6 dB
10000 = 0 dB
11111 = +6dB
Bit 7: CM5. Test bit. 0=normal mode
Bit 6: CM6. Test bit. 0=normal mode
Bit 5..0: Vol[5..0]. Voltage level of Gaussian output on
TDO pin.
00000 = -6 dB
10000 = 0 dB
11111 = +6dB
4F
FF
BMC.Comparator
RC3: Comparator Level. Valid range is 0..3fh or ffh.
Bit 7: 0 (overruled by software)
Bit 6: TM_ANA. Test bit - 0=normal mode
Bit 5..0: DAC output
Specifying FF will cause the software not to set
RC3.DON causing the DAC not to be active i.e. not to
be used. In case the DAC is not used the CMPREF
level must be supplied externally.
Bit 7: 0 (overruled by software)
Bit 6: TM_ANA. Test bit - 0=normal mode
Bit 5..0: DAC output
Specifying FF will cause the software not to set
RC3.DON causing the DAC not to be active i.e. not to
be used. In case the DAC is not used the CMPREF
level must be supplied externally.
50
5F
BMC.AdpWin
RC4: DPLL[2..0],ADP,WIN[3..0]
Bit 7..5: dpll tuning bits. "100" for best performance ?
Bit 4 : ADP. Adjust Phase bit
Bit 3..0 : WIN[3..0]. S-field bit window.
Bit 7..5: dpll tuning bits. "100" for best performance ?
Bit 4 : ADP. Adjust Phase bit
Bit 3..0 : WIN[3..0]. S-field bit window.
51
41
BMC.RC5
RC5:
Bit 7 : ENCoff, encryption on=?, off= .
Bit 6 : SenseS, if 1 and no S-field is detected no A/B
field data is written
Bit 5 : Ron. Test-bit. 0=normal mode
Bit 4 : Mutelevel. B_BTFM instruction will replace data
with the value of this bit
Bit 3 : SCoff . Scrambling of A+B fields 0=on, 1=off.
Bit 2 : DOFr. If CMPREF voltage is retrieved from ext.
sample & hold PD1 is used to synchronise.
DOFr determines when synchronisation takes
place.
Bit 7 : ENCoff, encryption on=?, off= .
Bit 6 : SenseS, if 1 and no S-field is detected no A/B
field data is written
Bit 5 : Ron. Test-bit. 0=normal mode
Bit 4 : Mutelevel. B_BTFM instruction will replace data
with the value of this bit
Bit 3 : SCoff . Scrambling of A+B fields 0=on, 1=off.
Bit 2 : DOFr. If CMPREF voltage is retrieved from ext.
sample & hold PD1 is used to synchronise.
DOFr determines when synchronisation takes
place.
64
KX-TCD951GB/KX-TCD955GC
Bit 1,0: M[1..0] . TDO output type
00 Digital
01 Gaussian,
10 Power Down,
11=Mid level (1.25V)
00 Digital
01 Gaussian,
10 Power Down,
11=Mid level (1.25V)
CODEC Control
52
FF
BMC.AnalogCtrl
BMC analogue power-up control word. This value is
written to the CODEC_PD_reg register.
written to the CODEC_PD_reg register.
53
00
BMC.TestByte1
Codec Gain Control and side-tone control. The lower
6 bits of this parameter is written to the
CODEC_GAIN_CTRL_reg.
Bit 7: S, 1=side tone off (software implementation)
Bit 6 : SINen. Speaker configuration.
0=differential,
1=single ended
Bit 5..4 : BUZatt[1..0] buzzer course gain
00 = -2dB
01 = -17dB
1x = -32 dB
Bit 3 : BUZMODE. 0=audio mode, 1=buzzer mode
Bit 2 : MUTin. 0= normal operation, 1=mute MIC inputs
Bit 1..0: M[1..0]. Microphone configuration
00 = normal differential or single
ended
11 = MIC+/MIC- disabled
6 bits of this parameter is written to the
CODEC_GAIN_CTRL_reg.
Bit 7: S, 1=side tone off (software implementation)
Bit 6 : SINen. Speaker configuration.
0=differential,
1=single ended
Bit 5..4 : BUZatt[1..0] buzzer course gain
00 = -2dB
01 = -17dB
1x = -32 dB
Bit 3 : BUZMODE. 0=audio mode, 1=buzzer mode
Bit 2 : MUTin. 0= normal operation, 1=mute MIC inputs
Bit 1..0: M[1..0]. Microphone configuration
00 = normal differential or single
ended
11 = MIC+/MIC- disabled
54
AA
BMC.LsrMicGain
Codec Gain. This parameter is written to the
CODEC_GAIN_reg.
Bit 7..4 : Loud speaker gain in steps of 1dB
0000 = +3dB
Bit 3..0 :Mic gain in steps of 2dB
0000 = +14dB
Max. gain in both directions equals 0x0F
CODEC_GAIN_reg.
Bit 7..4 : Loud speaker gain in steps of 1dB
0000 = +3dB
Bit 3..0 :Mic gain in steps of 2dB
0000 = +14dB
Max. gain in both directions equals 0x0F
55
03
BMC.Vref
Codec Mode. Bits 0..5 of this parameter is written to the
CODE_MODE_reg (check MSJ !)
Bit 7 : Not used
Bit 6 : Not used
Bit 5..0 : 000000
xxxxxx00
CODE_MODE_reg (check MSJ !)
Bit 7 : Not used
Bit 6 : Not used
Bit 5..0 : 000000
xxxxxx00
56
38
BMC.TestByte3
Codec Bandgap
Bit 7..6 : - reserved ??-
Bit 5..4 : VREF[1..0]. 11 = maximum level ????
Bit 0..3 : BG[3..0].
Bit 7..6 : - reserved ??-
Bit 5..4 : VREF[1..0]. 11 = maximum level ????
Bit 0..3 : BG[3..0].
57
00
BMC.TestByte4
00000000
58-59
00
BMC.InitInstruc
Bmc init instruction (not used)
5A
6C
BMC_3161Offset
DC offset RECDAT
5B
09
BMC.LMX3161 TX
BMC/LMX3161 TX control (89 for no inversion)
5C
91
BMC.LMX3161 RX
BMC/LMX3161 RXcontrol (11 for no inversion)
5D
08
BMC.MuteCtrl
Mute control.
Bit 0: 0=always 3dB reduce (ignore bit 1),
1=enable 6dB reduce
Bit 1: 0=reduce 6dB first-time then 3dB,
1=reduce 6dB always
Bit 4: 0=increase 3dB, 1=increase 6dB
Bit 7: 0=no action, 1=250 ms with no errors required in
order to un-mute.
Bit 0: 0=always 3dB reduce (ignore bit 1),
1=enable 6dB reduce
Bit 1: 0=reduce 6dB first-time then 3dB,
1=reduce 6dB always
Bit 4: 0=increase 3dB, 1=increase 6dB
Bit 7: 0=no action, 1=250 ms with no errors required in
order to un-mute.
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