Panasonic DP-8020E / 8020P* / 8016P (serv.man2) Service Manual ▷ View online
9
DEC 2006
Ver. 1.0
DP-8020E/8020P*/8016P
2.2.
SPC PC Board (Scanner and Printer Circuit)
1. System Configuration
The SPC PC Board controls all mechanical drivers for the Scanner and Printer.
The 16-bit CPU consist of Gate Array, F-ROM for Programming and SRAM for Work area.
The 16-bit CPU consist of Gate Array, F-ROM for Programming and SRAM for Work area.
2. SC PC Board Interface
The Serial and Parallel Communication Ports used to interface the following devices.
• Serial Interface
SPCRXD: Sends data to SC PCB
SPCTXD: Receives data from SC PCB
IICSDA: Sends and Receives data for Program Updating
IICSCL: Sends and Receives data clock for Program Updating
SPCTXD: Receives data from SC PCB
IICSDA: Sends and Receives data for Program Updating
IICSCL: Sends and Receives data clock for Program Updating
• Parallel Interface for Scanner
pSENTIM: Main Scan Synchronous Signal
pVREQ: Sub Scan Synchronous Signal
nSREQ: Scan Enable Signal
nSACK: Request Shading Signal
pVREQ: Sub Scan Synchronous Signal
nSREQ: Scan Enable Signal
nSACK: Request Shading Signal
• Parallel Interface for Printer
nPRDY: Print Ready
nVRDY: Request Print Ready
nPACK: Ready for Paper Feed
nATT : Printer Status Signal
nDUPACK: Ready for Duplex Paper Feed
nPVSYNC: Vertical Synchronous Signal
pPRNT: Print Data
pBD_A: Line Synchronous Data
pSPCRST: Reset Signal
nPRGDWN: Program Download Signal
nVRDY: Request Print Ready
nPACK: Ready for Paper Feed
nATT : Printer Status Signal
nDUPACK: Ready for Duplex Paper Feed
nPVSYNC: Vertical Synchronous Signal
pPRNT: Print Data
pBD_A: Line Synchronous Data
pSPCRST: Reset Signal
nPRGDWN: Program Download Signal
CPU
IC2
IC2
M30802
GATE ARRAY
IC6
DZAL000349
FLASH ROM
IC3
MX29F400BTC
(512kB)
SRAM
IC4
LC35256
(32kB)
SRAM
IC5
LC35256
(32kB)
A0~7
18,19
18,19
A0~19
D0~15
A1~18
A1~15
A1~15
D0~15
D0~15
D0~7
D8~15
nRD
nWRL
nWRH
nCS0
nCS1
nCS2
nWRL
nWRH
nCS0
nCS1
nCS2
nCS3
nRD
nWRL
nWRH
nWRL
nWRH
nCS
nOE
nWE
nWE
nCE
nOE
nWE
nWE
nCE
nOE
nWE
nWE
nCE
10
DEC 2006
Ver. 1.0
DP-8020E/8020P*/8016P
3. Reset Circuit
This Circuit is controlled by the Reset of IC9 (PST575E) and pSPCRST Signal from the SC PCB.
If the 5 VDC Power Supply Voltage drops below 3.9 VDC, this circuit generates a Reset Signal. If the
pSPCRST signal from the SC PCB is Low, this Circuit also generates a Reset Signal.
If the 5 VDC Power Supply Voltage drops below 3.9 VDC, this circuit generates a Reset Signal. If the
pSPCRST signal from the SC PCB is Low, this Circuit also generates a Reset Signal.
IC9
PST575E
pSPCRST
IC2
M30802
R57
C62
R60
Q7
5V
3. 9V
td
td
td =12.5ms
+5V
11
DEC 2006
Ver. 1.0
DP-8020E/8020P*/8016P
4. Fuser Control Circuit
The DP-8020E/8020P*/8016P Fuser is controlled by the Thermistor and the Fuser Lamp.
CN721
1
IC2
+
-
R
R
C
D
R
R
IC
CN721
2
R
C
Q
Q
Q
R
R
R
D
IC5
CN704
4
R
QA
QA
R
CN702
19
R
R
R
R
C
R
Q
CN702
21
22
CN702
+24V
D
12
DEC 2006
Ver. 1.0
DP-8020E/8020P*/8016P
5. LSU Control Circuit
Consist of Laser and Polygon Motor Control Circuits.
IC6
GATE ARRAY
CN701
pSH_A
pLDEN
nHSYNC
BDCNT
IC1
CPU
CPU
DA1
+
-
SPC
LSU
Laser Control
L+5V
+24VHL
IC8
L+5V
R
R
Q
Q
R
R
R
IC
C
C
C
R
R
R
Q
R
R
R
D
3
5
4
6
8
1
2
IC6
GATE ARRAY
IC2
CPU
pPMCNT
pPMRDY
nPMCLK
+5V
R
R
Q
Q
CN701
LSU
+24VHL
13
12
10
11
9
PM
Polygon
Motor
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