Panasonic CF-Y5LWVYZBM Service Manual ▷ View online
SA_DQ61
SA_DQ18
SA_DQ7
SA_DQ60
SA_DQ17
SA_DQ6
SA_DQ55
SA_DQ16
SA_DQ5
SA_DQ54
SA_DQ11
SA_DQ4
SA_DQ53
SA_DQ10
SA_DQ59
SA_DQ52
SA_DQ9
SA_DQ58
SB_MA13
SA_DQ47
SA_DQ8
SA_DQ57
SB_MA11
SA_DQ46
SA_DQ3
SA_DQ56
SB_MA8
SA_DQ44
SA_DQ2
SA_DQ51
SB_MA6
SA_DQ45
SA_DQ1
SA_DQ50
SB_MA4
SA_DQ39
SA_DQ0
SA_DQ49
SB_MA2
SA_DQ38
SA_DQ48
SB_MA0
SA_DQ37
SA_DQ43
SA_DQ36
SA_DQ42
SA_DQ31
SA_DQ41
SB_MA10
SA_DQ30
SA_DQ40
SB_MA12
SA_DQ29
SA_DQ35
SB_MA9
SA_DQ28
SA_DQ34
SB_MA7
SA_DQ23
SA_DQ33
SB_MA5
SA_DQ22
SA_DQ32
SB_MA3
SA_DQ21
SA_DQ27
SB_MA1
SA_DQ20
SA_DQ26
SA_DQ15
SA_DQ25
SA_DQ14
SA_DQ62
SA_DQ24
SA_DQ13
SA_DQ63
SA_DQ19
SA_DQ12
DDRTHRM
23.B6
;23.D6
;23.D6
C
1
3
8
1
u
1
0
V
1.
6X
0.
8
CF1
NTCG163JF103HT
C
1
3
3
1
u
1
0
V
1.
6X
0.
8
GND
C
1
3
7
0
.
1
u
1
6
V
1.
0X
0.
5
C
1
4
0
1
u
1
0
V
1.
6X
0.
8
VB18
GND
VB18
C
1
3
0
1
u
1
0
V
1.
6X
0.
8
C
1
4
1
1
u
1
0
V
1.
6X
0.
8
C
1
3
1
1
u
1
0
V
1.
6X
0.
8
C
1
3
4
0
.
1
u
1
6
V
1.
0X
0.
5
C
1
3
2
1
u
1
0
V
1.
6X
0.
8
C
1
3
9
1
u
1
0
V
1.
6X
0.
8
C
1
3
5
0
.
1
u
1
6
V
1.
0X
0.
5
C
1
3
6
0
.
1
u
1
6
V
1.
0X
0.
5
GND
C
1
2
6
1
0
p
5
0
V
C
1
2
7
0
.
1
u
1
6
V
1.
0X
0.
5
GND
GND
SA_DQS[6]
3.D2;8.A7
GND
SB_BS#1
3.D5;8.I8
SM_ODT2
4.D4;8.G5
SA_DQS#[2]
3.D3;8.A8
SMBCLK
9.G3;9.J7;10.I3;21.K4
38.H7
38.H7
MEMREF
SA_DM[2]
3.D2;8.A7
GND
SA_DM[3]
3.D2;8.A7
SA_DQS[1]
3.D2;8.A7
SM_CKE3
4.D3;8.K7
SA_DQS[3]
3.D2;8.A7
SB_RAS#
3.D7;8.G6
SA_DM[5]
3.D2;8.A7
SA_DQ[0-63]
3.A1;8.A1
SA_DQS#[7]
3.D3;8.A8
SA_DM[0]
3.D2;8.A7
SA_DQS#[1]
3.D3;8.A8
SB_BS#2
3.D6;8.K7
CN2
1747919-1
K1MMH2B00003
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
125 126
127 128
129 130
131 132
133 134
135 136
137 138
139 140
141 142
143 144
145 146
147 148
149 150
151 152
153 154
155 156
157 158
159 160
161 162
163 164
165 166
167 168
169 170
171 172
SA_DQS[4]
3.D2;8.A7
SA_DM[7]
3.D2;8.A7
SM_ODT3
4.D4;8.G5
SA_DM[6]
3.D2;8.A7
SM_CS#3
4.D3;8.G5
SB_BS#0
3.D5;8.I8
SA_DQS[2]
3.D2;8.A7
SA_DQS#[6]
3.D3;8.A8
VC3
SA_DQS[7]
3.D2;8.A7
SB_WE#
3.D7;8.G6
SB_MA[0-13]
3.D6;A4;8.I6
SA_DM[4]
3.D2;8.A7
SA_DQS#[4]
3.D3;8.A8
SA_DQS#[3]
3.D3;8.A8
SB_CAS#
3.D6;8.G6
SA_DQS#[0]
3.D3;8.A8
VB18
SA_DM[1]
3.D2;8.A7
VB18
GND
SA_DQS[5]
3.D2;8.A7
SA_DQS#[5]
3.D3;8.A8
SMBDATA
9.F3;9.J7;10.I3;21.K4
38.H7
38.H7
SM_CLK_DDR2
4.D2
SM_CKE2
4.D3;8.K7
SM_CLK_DDR#2
4.D2
SB_MA[0-13]
3.D6;D4;8.I6
SA_DQS[0]
3.D2;8.A7
SM_CS#2
4.D3;8.G5
C129
F1H0J1050022
1
2
3
4
C
1
2
8
0
.
1
u
1
6
V
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Schematic Diagrams
Main 7 Micro DIMM Bank 2/3
Main 7 Micro DIMM Bank 2/3
SA_RDQ[9]
SA_DQ[41]
SA_RDQ[3]
SA_DQ[36]
SA_RDQ[61]
SA_DQ[47]
SA_RDQ[50]
SA_RDQ[10]
SA_DQ[24]
SA_DQ[35]
SA_RDQ[2]
SA_DQ[46]
SA_RDQ[60]
SA_RDQ[49]
SA_RDQ[11]
SA_DQ[34]
SA_RDQ[23]
SA_DQ[45]
SA_RDQ[1]
SA_RDQ[59]
SA_RDQ[48]
SA_RMA[3]
SA_DQ[33]
SA_RDQ[12]
SA_DQ[44]
SA_RDQ[22]
SA_RDQ[0]
SA_RDQ[58]
SA_DQ[55]
SA_RMA[2]
SA_DQ[32]
SA_RDQ[13]
SA_RDQ[21]
SA_DQ[7]
SA_DQ[60]
SA_RDQ[57]
SA_DQ[54]
SA_RMA[1]
SA_RDQ[24]
SA_RDQ[14]
SA_DQ[6]
SA_RDQ[20]
SA_DQ[59]
SA_RMA[5]
SA_DQ[53]
SA_RDQ[56]
SA_RMA[7]
SA_RDQ[25]
SA_DQ[5]
SA_RDQ[15]
SA_DQ[58]
SA_RDQ[19]
SA_DQ[52]
SA_DQ[63]
SA_DQ[4]
SA_RDQ[26]
SA_DQ[15]
SA_DQ[40]
SA_DQ[51]
SA_RDQ[18]
SA_DQ[62]
SA_DQ[3]
SA_DQ[14]
SA_RDQ[27]
SA_DQ[50]
SA_RDQ[32]
SA_DQ[61]
SA_RDQ[17]
SA_DQ[2]
SA_DQ[49]
SA_RDQ[28]
SA_RDQ[33]
SA_DQ[57]
SA_RDQ[16]
SA_DQ[10]
SA_DQ[1]
SA_DQ[48]
SA_RDQ[29]
SA_RDQ[34]
SA_DQ[23]
SA_DQ[9]
SA_DQ[13]
SA_DQ[0]
SA_RDQ[47]
SA_RDQ[30]
SA_DQ[22]
SA_RDQ[35]
SA_DQ[12]
SA_DQ[26]
SA_RDQ[46]
SA_DQ[21]
SA_RDQ[31]
SA_RDQ[36]
SA_DQ[11]
SA_DQ[25]
SA_DQ[20]
SA_RDQ[45]
SA_DQ[31]
SA_DQ[56]
SA_RDQ[37]
SA_DQ[8]
SA_DQ[19]
SA_DQ[30]
SA_RDQ[44]
SA_RDQ[55]
SA_RDQ[38]
SA_RDQ[7]
SA_DQ[18]
SA_RMA[4]
SA_DQ[29]
SA_RDQ[43]
SA_RDQ[54]
SA_RDQ[39]
SA_DQ[17]
SA_RDQ[6]
SA_DQ[28]
SA_RDQ[42]
SA_RDQ[53]
SA_DQ[39]
SA_RMA[6]
SA_DQ[16]
SA_DQ[27]
SA_RDQ[5]
SA_RDQ[63]
SA_DQ[43]
SA_RDQ[41]
SA_DQ[38]
SA_RDQ[52]
SA_RDQ[8]
SA_RDQ[4]
SA_DQ[42]
SA_RDQ[62]
SA_DQ[37]
SA_RDQ[40]
SA_RDQ[51]
SA_RMA[0]
SA_RMA[8]
SA_RMA[9]
SA_RMA[10]
SA_RMA[11]
SA_RMA[12]
SA_RMA[13]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[4]
SA_DM[3]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_RDM[0]
SA_RDM[1]
SA_RDM[2]
SA_RDM[3]
SA_RDM[4]
SA_RDM[5]
SA_RDM[6]
SA_RDM[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_RDQS[0]
SA_RDQS[1]
SA_RDQS[2]
SA_RDQS[3]
SA_RDQS[4]
SA_RDQS[5]
SA_RDQS[6]
SA_RDQS[7]
SA_RDQS#[6]
SA_DQS#[0]
SA_RDQS#[7]
SA_RDQS#[3]
SA_RDQS#[0]
SA_RDQS#[2]
SA_DQS#[5]
SA_RDQS#[5]
SA_RDQS#[4]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[1]
SA_RDQS#[1]
SA_DQS#[7]
SA_DQS#[6]
SA_MA[6]
SA_MA[0]
SA_MA[4]
SA_MA[12]
SA_MA[10]
SA_MA[5]
SA_MA[8]
SA_MA[3]
SA_MA[13]
SA_MA[7]
SA_MA[1]
SA_MA[2]
SA_MA[9]
SA_MA[11]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[9]
SA_MA[8]
SA_MA[12]
SA_MA[10]
SA_MA[11]
SA_MA[13]
SB_MA[11]
SB_MA[10]
SB_MA[1]
SB_MA[8]
SB_MA[12]
SB_MA[0]
SB_MA[4]
SB_MA[2]
SB_MA[7]
SB_MA[3]
SB_MA[6]
SB_MA[5]
SB_MA[13]
SB_MA[9]
R157
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
R122
10
SA_CAS#
3.D1;G5
GND
R110
10
SA_RDQS[0-7]
6.A4;6.A8;6.D4;6.D8
6.F4;6.F8;6.H4;6.H8
6.F4;6.F8;6.H4;6.H8
R112
10
R159
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
SM_CKE0
4.D3;K6
SM_CS#1
4.D3;G5
SA_DQS#[0-7]
3.D3;7.A2;7.D3;7.A3
7.D4;7.D6;7.D7;7.A7
7.D8
7.D4;7.D6;7.D7;7.A7
7.D8
SA_RDQS#[0-7]
6.A4;6.A8;6.D4;6.D8
6.F4;6.F8;6.H4;6.H8
6.F4;6.F8;6.H4;6.H8
SA_RBS#0
6.A1;6.A5;6.D1;6.D5
6.F1;6.F5;6.H1;6.H5
6.F1;6.F5;6.H1;6.H5
VC09
SA_WE#
3.D5;G6
R107
10
R117
10
SA_DQS[0-7]
3.D2;7.A2;7.D3;7.A3
7.D4;7.D6;7.D7;7.A7
7.D8
7.D4;7.D6;7.D7;7.A7
7.D8
R104
10
GND
R156
0
R155
0
R150
0
R149
0
R148
0
R154
0
R153
0
R152
0
R151
0
R147
0
R146
0
R145
0
R119
10
SA_RDM[0-7]
6.A4;6.A7;6.A3;6.D4
6.D7;6.D3;6.F4;6.F7
6.F3;6.H4;6.H7;6.H3
6.D7;6.D3;6.F4;6.F7
6.F3;6.H4;6.H7;6.H3
SM_RCS#0
6.A3;6.D3;6.F3;6.H3
R144
0
R143
0
R142
0
R141
0
R140
0
R139
0
R138
0
SM_CKE0
4.D3;F4
R137
0
SA_RMA[0-13]
6.A1
R109
10
R136
0
R135
0
R134
0
SM_CKE1
4.D3;F4
R133
0
R132
0
R131
0
R102
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R130
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R121
10
C
1
4
8
0
.
1
u
1
6
V
1.
0X
0.
5
R101
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R128
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R100
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
VC09
R129
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R99
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SB_BS#1
3.D5;7.D5
R127
D1HG1008A001
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SB_BS#2
3.D6;7.D5
SA_BS#2
3.D1;F3
SB_BS#0
3.D5;7.A5
SA_BS#1
3.D1;F3
SM_CKE3
4.D3;7.D4
SM_CKE2
4.D3;7.A4
R163
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
SA_BS#0
3.D1;F3
C
1
4
6
0
.
1
u
1
6
V
1.
0X
0.
5
R116
10
R114
10
SA_MA[0-13]
3.D4;F1
SA_BS#0
3.D1;G8
R162
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
R111
10
GND
SA_MA[0-13]
3.D4;F6
SB_MA[0-13]
3.D6;7.A4;7.D4
R161
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
VC09
R115
10
SM_RODT0
6.A4;6.D4;6.F4;6.H4
GND
VC09
C
1
4
7
0
.
1
u
1
6
V
1.
0X
0.
5
SA_RCAS#
6.A3;6.A7;6.D3;6.D7
6.F3;6.F7;6.H3;6.H7
6.F3;6.F7;6.H3;6.H7
C
1
4
3
0
.
1
u
1
6
V
1.
0X
0.
5
GND
VC09
SB_WE#
3.D7;7.A6
SB_RAS#
3.D7;7.D5
SB_CAS#
3.D6;7.A5
R158
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
SA_CAS#
3.D1;F3
SA_WE#
3.D5;F3
SA_RAS#
3.D5;F3
R103
10
SM_ODT3
4.D4;7.A6
SM_ODT2
4.D4;7.D6
SM_ODT1
4.D4;F4
SM_CKE1
4.D3;K7
SM_CS#3
4.D3;7.A5
SM_CS#2
4.D3;7.D5
SM_CS#1
4.D3;F4
R106
10
SM_RCKE0
6.A3;6.D3;6.F3;6.H3
SM_ODT0
4.D4;F4
C
1
4
5
0
.
1
u
1
6
V
1.
0X
0.
5
R160
D1HA56080001
56
1
2
6
7
3
4
5
8
9
1
0
GND
SA_RAS#
3.D5;G6
VC09
SA_DM[0-7]
3.D2;7.D2;7.A3;7.D3
7.A4;7.A6;7.A7;7.D7
7.A8
7.A4;7.A6;7.A7;7.D7
7.A8
R113
10
R126
10
SA_BS#2
3.D1;K7
SA_RBS#1
6.A1;6.A5;6.D1;6.D5
6.F1;6.F5;6.H1;6.H5
6.F1;6.F5;6.H1;6.H5
SM_ODT1
4.D4;G5
VC09
C
1
4
2
0
.
1
u
1
6
V
1.
0X
0.
5
SA_BS#1
3.D1;G8
R118
10
SA_RRAS#
6.A3;6.A7;6.D3;6.D7
6.F3;6.F7;6.H3;6.H7
6.F3;6.F7;6.H3;6.H7
SM_ODT0
4.D4;G5
R120
10
R123
10
SM_CS#0
4.D3;F4
R124
10
SA_RDQ[0-63]
6.A1
SA_RWE#
6.A3;6.A7;6.D3;6.D7
6.F3;6.F7;6.H3;6.H7
6.F3;6.F7;6.H3;6.H7
SM_CS#0
4.D3;G4
R125
10
C
1
4
4
0
.
1
u
1
6
V
1.
0X
0.
5
R105
10
R108
10
SA_RBS#2
6.A1;6.A5;6.D1;6.D5
6.F1;6.F5;6.H1;6.H5
6.F1;6.F5;6.H1;6.H5
SA_DQ[0-63]
3.A1;7.A1
SM_RCS#1
6.A7;6.D7;6.F7;6.H7
SM_RCKE1
6.A7;6.D7;6.F7;6.H7
SM_RODT1
6.A8;6.D8;6.F8;6.H8
DDR
DDR
<5.08mm
Zo=55
<19.05mm
<30.48mm
<25.4mm
<90.17mm
VC09
See Pakage
length table
length table
Y0
MA[13:0],BS[2:0],RAS#,CAS#,WE#
COMMAND SIGNALS
GMCH
56
0
DDR
DDR
DDR
DDR
DDR
DDR
<5.08mm
DIMM
GMCH
Zo=55
56
VC09
See Pakage
length table
length table
DIMM
OnBoard
<38.1mm
Y1
12.7mm<Y1<114.3mm
<25.4mm
12.7mm<Y0<165.1mm
<6.35mm
Y1
Y0
See Pakage
length table
length table
10
DIMM
DDR
DDR
GMCH
Zo=55
DQ,DM
<114.3mm
DQS,DQS#
<85.1mm
<93.98mm
<3.8mm
Y1
<13.97mm
Y0
<5.08mm
See Pakage
length table
length table
10
DIMM
DDR
DDR
GMCH
<10.2mm
Zo=55
/Zdiff=85
10
<22.225mm
<32.4mm
<152.4mm
< 5.08mm
< 95.25mm
Max.93.98mm
< 67.31mm
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Schematic Diagrams
Main 8 DDR2 Term
Main 8 DDR2 Term
Thermal
Pad
Pad
*R187
1k
1.0 x 0.5
1/16W
CLK_LANPCI
18.B2
STPCPU#
10.I5;38.H8
C156
F1H0J1050022
F1H0J1050022
1u
1
2
3
4
VC15PLL_SRCCPU
C
P
U
_
B
C
L
K
2
.
G
5
R188 1M
1.0 x 0.5
C
1
5
4
0
.
0
1
u
2
5
V
1.
0X
0.
5
VC3
MCRDCLKREQ#
G3;21.G3;38.D2
VC3PLL_LCD
S
R
C
C
L
K
_
M
C
H
4
.
E
5
C
1
5
1
0
.
0
1
u
2
5
V
1.
0X
0.
5
R169
1
1.6 x 0.8
S
R
C
C
L
K
_
I
C
H
#
1
0
.
H
3
V
C
3
P
L
L
_
R
E
F
M
C
H
_
B
C
L
K
3
.
E
7
V
C
3
P
L
L
_
C
P
U
C
P
U
_
B
C
L
K
#
2
.
G
5
C149
F1J0J4750019
4.7u
1
2
3
4
C158
F1H0J1050022
F1H0J1050022
1u
1
2
3
4
JS15
R167
1
1.6 x 0.8
S
R
C
C
L
K
_
M
C
H
#
4
.
E
5
VC3PLL_PCI
JS16
SMBCLK
7.D8;G3;10.I3;21.K4
38.H7
38.H7
CLK_FWHPCI
22.G3
VC3PLL_PCI
VC15PLL_SRCCPU
VC15
X
1
H
0
J
1
4
3
5
0
0
0
5
8
N
X
5
0
3
2
G
A
-
1
4
.
3
1
8
1
8
M
H
Z
1
2
1
VC3PLL_48
GND
D
R
E
F
S
S
C
L
K
4
.
E
5
I
T
P
_
B
C
L
K
1
1
.
B
6
VC3PLL_REF
VC3
M
C
H
_
B
C
L
K
#
3
.
E
7
V
C
3
P
L
L
_
L
C
D
D
R
E
F
C
L
K
4
.
E
5
SRCCLK_MCRD
21.G3
R
1
8
9
0
1.
0
x
0.
5
GND
GND
C150
F1J0J4750019
4.7u
1
2
3
4
V
C
1
5
P
L
L
_
S
R
C
C
P
U
VC3PLL_CPU
I
T
P
_
B
C
L
K
0
1
.
B
6
CLK_ICHPCI
10.C5;10.E8
MCH_CLKREQ#
4.B6;K7;38.D2
GND
SRCCLK_MCRD#
21.G3
R168
1
1.6 x 0.8
SMBDATA
7.A8;F3;10.I3;21.K4
38.H7
38.H7
V
C
3
P
L
L
_
4
8
GND
V
C
1
5
P
L
L
_
S
R
C
C
P
U
GND
C
1
5
9
2
2
p
5
0
V
1.
0X
0.
5
D
R
E
F
C
L
K
#
4
.
E
5
VC3
C
1
5
2
0
.
0
1
u
2
5
V
1.
0X
0.
5
SATACLKREQ#
K7;10.L6;38.G8
S
R
C
C
L
K
_
I
C
H
1
0
.
H
3
M
C
R
D
C
L
K
R
E
Q
#
K
8
;
2
1
.
G
3
;
3
8
.
D
2
R
1
9
1
3
3
1.
0
x
0.
5
R196
10k
RS4N-103-J-2
1
2
3
4
5
6
7
8
C155
F1H0J1050022
F1H0J1050022
1u
1
2
3
4
SATACLKREQ#
E4;10.L6;38.G8
D
R
E
F
S
S
C
L
K
#
4
.
E
5
C
L
K
_
I
C
H
4
8
1
0
.
E
7
;
1
0
.
L
4
MCH_CLKREQ#
4.B6;E4;38.D2
CLK_TPMPCI
22.E3
C157
F1H0J1050022
F1H0J1050022
1u
1
2
3
4
CLK_ECPCI
23.G3
R166
1
1.6 x 0.8
S
M
B
C
L
K
7
.
D
8
;
J
7
;
1
0
.
I
3
;
2
1
.
K
4
3
8
.
H
7
GND
C
1
5
3
0
.
0
1
u
2
5
V
1.
0X
0.
5
CLK_CBPCI
16.B5
*
R
1
9
0
1
k
1.
0
x
0.
5
S
M
B
D
A
T
A
7
.
A
8
;
J
7
;
1
0
.
I
3
;
2
1
.
K
4
3
8
.
H
7
CLK_ICH14
10.E7;10.L4
STPPCI#
10.I4;38.H8
VC3
C
1
6
0
2
2
p
5
0
V
1.
0X
0.
5
IC13
C0JBZZ000388
1
VTT_PWRGD#/PD
2
VDD48
3
F
S
L
A
/
U
S
B
_
4
8
M
H
z
4
G
N
D
5
2
7
M
H
z
F
I
X
/
D
O
T
T
_
9
6
M
H
z
6
2
7
M
H
z
S
S
/
D
O
T
C
_
9
6
M
H
z
7
V
D
D
2
7
8
V
D
D
L
C
D
3
.
3
9
G
N
D
1
0
V
D
D
L
C
D
1
.
5
1
1
L
C
D
C
L
K
_
S
S
T
/
S
R
C
C
L
K
T
0
1
2
L
C
D
C
L
K
_
S
S
C
/
S
R
C
C
L
K
C
0
1
3
S
R
C
C
L
K
T
1
1
4
S
R
C
C
L
K
C
1
1
5
S
R
C
C
L
K
T
2
1
6
S
R
C
C
L
K
C
2
17
G
N
D
S
R
C
18
S
R
C
C
L
K
T
3
19
SRCCLKC3
20
CLKREQE#
21
GNDSRC
22
SRCCLKT4
23
SRCCLKC4
24
GNDSRC
25
VDDSRC1.5
26
SRCCLKC5
27
SRCCLKT5
28
SRCCLKC6
29
SRCCLKT6
30
SRCCLKC7
31
SRCCLKT7
32
GNDSRC
3
3
VDDSRC3.3
3
4
CLKREQD#
3
5
C
L
K
R
E
Q
C
#
3
6
C
P
U
C
L
K
C
2
_
I
T
P
3
7
C
P
U
C
L
K
T
2
_
I
T
P
3
8
V
D
D
C
P
U
1
.
5
3
9
G
N
D
C
P
U
4
0
C
P
U
C
L
K
C
1
4
1
C
P
U
C
L
K
T
1
4
2
V
D
D
C
P
U
4
3
C
P
U
C
L
K
C
0
4
4
C
P
U
C
L
K
T
0
4
5
S
C
L
K
4
6
S
D
A
T
A
4
7
V
D
D
R
E
F
4
8
X
2
49
X
1
50
G
N
D
51 TEST_SEL/REF1
52 SEL_27MHz/REF0
53 CPU_STOP#
54 PCICLK4
55 CLKREQB#
56 CLKREQA#
57 PCICLK0
58 PCICLK1
59 PCICLK2
60 VDDPCI
61 GND
62 PCICLK3/TEST_MODE
63 SEL_LCDCLK#/PCICLK_F1
64 PCI/SRC_STOP#
52 SEL_27MHz/REF0
53 CPU_STOP#
54 PCICLK4
55 CLKREQB#
56 CLKREQA#
57 PCICLK0
58 PCICLK1
59 PCICLK2
60 VDDPCI
61 GND
62 PCICLK3/TEST_MODE
63 SEL_LCDCLK#/PCICLK_F1
64 PCI/SRC_STOP#
R197
10k
RS4N-103-J-2
1
2
3
4
5
6
7
8
R
1
9
2
0
1.
0
x
0.
5
R
1
9
3
0
1.
0
x
0.
5
R
1
9
4
0
1.
0
x
0.
5
R
1
9
5
0
1.
0
x
0.
5
R179
33
1.0 x 0.5
1/16W
R180
33
1.0 x 0.5
1/16W
R181
33
1.0 x 0.5
1/16W
R182
33
1.0 x 0.5
1/16W
R183
33
1.0 x 0.5
1/16W
R184
33
1.0 x 0.5
1/16W
R185
33
1.0 x 0.5
1/16W
R186
33
1.0 x 0.5
1/16W
TP54
TP56
TP57
TP58
TP59
T
P
5
5
CLK_EN#
J7;10.I8;33.A3
CLK_EN#
E6;10.I8;33.A3
R170
10k
RS4N-103-J-2
1
2
3
4
5
6
7
8
TP110
TP111
A
B
C
FSA CPU SRC PCI REF USB DOT
1 166.66 100.00 33.33 14.318 48.00 96.00
0 133.33 100.00 33.33 14.318 48.00 96.00
1 166.66 100.00 33.33 14.318 48.00 96.00
0 133.33 100.00 33.33 14.318 48.00 96.00
3.3V
1.5V
. P4 CFG2 P4 CFG1 P4 CFG0 P9 FSLA
CPU R59/R62 R58/R61 R57/R60 R190/R187
LV (011) R62 R58 R57 R190
ULV(001) R62 R61 R57 R187
ULV(001) R62 R61 R57 R187
051216 R167
1005
1005
1608
051216 R168
1005
1005
1608
051216 R166
1005
1005
1608
051216 R169
1005
1005
1608
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Schematic Diagrams
Main 9 Clock Generator
Main 9 Clock Generator
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