Panasonic KX-UDT111RU (serv.man3) Service Manual ▷ View online
53
KX-UDT111RU
15 Appendix Information of Schematic Diagram
Note:
1. DC voltage measurements are taken with an oscilloscope or a tester with a ground.
1. The schematic diagrams and circuit board may be modified at any time with the development of new technology.
1. The schematic diagrams and circuit board may be modified at any time with the development of new technology.
54
KX-UDT111RU
16 Exploded View and Replacement Parts List
16.1. IC Data
16.1.1. IC1(APU)
Pin No.
Terminal Name
I/O Setting
Pull-up/down
Processing
Contents of Control
Remark
1
DOUBCAPP2
-
-
DOUBCAPP2
-
2
DOUBCAPN1
-
-
DOUBCAPN1
-
3
DOUBCAPP1
-
-
DOUBCAPP1
-
4
DOUT3V0
-
-
[ 3.0v ]
Power supply
5
DOUT4V5
-
-
GND
-
6
DOUT2V5/DCIN0/LIN0
A.I
-
VBG (BandgapTune)
Vandgap tune
7
LEDSINK2/DCIN1
A.I
-
CHG_CUR
for charge current calculation
8
DCIN2
A.I
-
NC
-
9
DCIN3/LIN1
A.I
-
VBAT_MON
Vbat monitor signal
10
LEDSINK1/PWM1
D.O
-
CHG_CTRL
for charge amount calculation
11
VREF
-
-
VREF
-
12
VCCA
-
-
[ VCCA ]
Power supply
13
MIN
A.I
-
MIC-
Microphone signal negative
14
MIP
A.I
-
MIC+
Microphone signal positive
15
HSMIN
A.I
-
HEADSET_MIC-
Headset Microphone signal negative
16
HSMIP
A.I
-
HEADSET_MIC+
Headset Microphone signal positive
17
MPWR
-
-
MIC BIAS
Power supply to Microphone
18
SPOUTP
A.O
-
Speakerphone_SP+
Speakerphone signal positive
19
VCCPA
-
-
[ VCCPA ]
Power supply
20
SPOUTN
A.O
-
Speakerphone_SP-
Speakerphone signal negative
21
HSSPOUTP
A.O
-
RECEIVER+
Receiver signal positive
22
LOUT
A.O
-
RECEIVER-
Receiver signal negative
23
PWM0
D.O
-
VIB_CTRL
Vibration control signal
24
DCINS
A.I
-
CHG_DET
Charage Detect signal
25
XOUT
-
-
XOUT
connect to crystal (13.824MHz)
26
XIN
-
-
XIN
connect to crystal (13.824MHz)
27
VDD_APU
-
-
[ VDD_APU ]
Power supply
28
VBAT_APU
-
-
[ VBAT_APU ]
Power supply
29
VDD_IF
-
-
[ VDD_IF ]
Power supply
30
VCC_FE_IF
-
-
[ VCC_FE_IF ]
Power supply
31
VCC_PA
-
-
VCC_PA
Power supply
32
BAL_OUT2
-
-
BAL_OUT2
Balun output
33
BAL_OUT1
-
-
BAL_OUT1
Balun output
34
TX_SW
-
-
TX_SW
RF TX Data
35
ANT1
-
-
ANT1
Antenna 1 signal
36
GND_RF
-
-
GND_RF
-
37
ANT2
-
-
ANT2
Antenna 2 signal
38
TEST
-
-
Not in use (open)
-
39
RX_SW
-
-
RX_SW
RF RX Data
40
LNA_INN
-
-
LNA_INN
RF RX Data to Low noise Amplifier
41
LNA_INP
-
-
LNA_INP
RF RX Data to Low noise Amplifier
55
KX-UDT111RU
42
ATST_N
-
-
ATST_N
-
43
ATST_P/EXT_LNA
-
-
ATST_P/EXT_LNA
-
44
RSTN
D.O
-
(RSTN)
Reset
45
VCC_VCO
-
-
[ VBAT ]
Power supply
46
ON_OFF
D.I
-
PWR-Key_Input
Power on signal
47
ON_OFF_OUT
D.O
-
PWR-Key_Output
Power on signal
48
IF_T_DATA
-
-
IF_T_DATA
Signal to DPU
49
IF_MLSE
-
-
IF_MLSE
Signal to DPU
50
IF_RX1
-
-
IF_RX1
Signal to DPU
51
IF_NPORST
-
-
IF_NPORST
Signal to DPU
52
IF_NARES
-
-
IF_NARES
Signal to DPU
53
IF_INT_ANA
-
-
IF_INT_ANA
Signal to DPU
54
IF_EN_DA
-
-
IF_EN_DA
Signal to DPU
55
IF_EN_AD
-
-
IF_EN_AD
Signal to DPU
56
IF_DATA_DA
-
-
IF_DATA_DA
Signal to DPU
57
IF_DATA_AD
-
-
IF_DATA_AD
Signal to DPU
58
IF_CLK_PLL
-
-
IF_CLK_PLL
Signal to DPU
59
IF_CLK_IF
-
-
IF_CLK_IF
Signal to DPU
60
IF_CDC_DIR
-
-
IF_CDC_DIR
Signal to DPU
61
IF_CDC_DAT_DA
-
-
IF_CDC_DAT_DA
Signal to DPU
62
IF_CDC_DAT_AD
-
-
IF_CDC_DAT_AD
Signal to DPU
63
IF_BAT_OK
-
-
IF_BAT_OK
Signal to DPU
64
VDD_ADIF
-
-
[ VDDCORE ]
Power supply
65
VDDCORE
-
-
[ VDDCORE ]
Power supply
66
COREOUT
-
-
[ COREOUT ]
Power supply
67
VBAT
-
-
[ VBAT ]
Power supply
68
DOUBCAPN2
-
-
DOUBCAPN2
-
69
GND
-
-
GND
-
Pin No.
Terminal Name
I/O Setting
Pull-up/down
Processing
Contents of Control
Remark
56
KX-UDT111RU
16.1.2. IC100 (DPU)
Pin No.
Terminal Name
I/O Setting
Pull-up/down
Processing
Contents of Control
Remark
1
GPIO[17]
D.I
-
Flash-DataIn
Flash ROM Data input
2
VDDIO
-
-
[ 3.0v ]
Power supply
3
GND
-
-
GND
-
4
EBI[36]/ADD[15]
D.O
-
A14
Address BUS to SRAM
5
EBI[37]/ADD[16]
D.O
-
A15
Address BUS to SRAM
6
EBI[38]/ADD[17]
D.O
-
A16
Address BUS to SRAM
7
VDDEBI
-
-
[ 3.0v ]
Power supply
8
EBI[39]/ADD[18]
D.O
-
A17
Address BUS to SRAM
9
EBI[40]/ADD[19]
D.O
-
NC (A18)
-
10
EBI[41]/ADD[20]
D.O
-
NC
-
11
VDDIO
-
-
[ 3.0v ]
Power supply
12
GPIO[18]
D.O
-
Flash-DataOut
Flash ROM Data output
13
GPIO[19]
D.O
-
Flash-CLK
Flash ROM control signal
14
GPIO[20]
D.O
-
Flash-CS/
Flash ROM control signal
15
GPIO[21]
D.O
-
LCD-BL1
LCD BackLight control signal
16
GPIO[22]
D.O
-
LCD-BL2
LCD BackLight control signal
17
GPIO[23]
D.O
-
CP-ON
LCD BackLight control signal
18
GPIO[24]
D.O
-
NC
-
19
GPIO[25]
D.O
-
LCD_RESET/
LCD control signal
20
GPIO[26]
D.I
Pull-up (Built-in)
URX
For maintenance
21
VDDC
-
-
[ VDD Core]
Power supply
22
VDDC
-
-
[ VDD Core]
Power supply
23
EBI[42]/ADD[21]
D.O
-
NC
-
24
EBI[43]/ADD[22]
D.O
-
NC
-
25
EBI[44]/CS2
D.O
-
NC
-
26
VDDEBI
-
-
[ 3.0v ]
Power supply
27
EBI[45]/WAIT
D.I
Pull-up (Built-in)
NC
-
28
EBI[46]/CLK_BURST
D.O
-
NC
-
29
EBI[47]/ADV
D.O
-
NC
-
30
GND
-
-
GND
-
31
GND
-
-
GND
-
32
N.C.
-
-
NC
-
33
VDDINT
-
-
[ VDD Core ]
Power supply
34
IF_BAT_OK
-
-
IF_BAT_OK
Signal to APU
35
IF_CDC_DAT_AD
-
-
IF_CDC_DAT_AD
Signal to APU
36
IF_CDC_DAT_DA
-
-
IF_CDC_DAT_DA
Signal to APU
37
IF_CDC_DIR
-
-
IF_CDC_DIR
Signal to APU
38
IF_CLK_IF
-
-
IF_CLK_IF
Signal to APU
39
IF_CLK_O
-
-
NC
-
40
IF_CLK_PLL
-
-
IF_CLK_PLL
Signal to APU
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