Panasonic KX-UDT111RU (serv.man3) Service Manual ▷ View online
5
KX-UDT111RU
3 Specifications
RF Specifications
6
KX-UDT111RU
4 Technical Descriptions
4.1.
Block Diagram
RF
BAT +
VB
AT
AT
BAT -
CH
G -
CH
G
+
Po
we
r
Sup
ply
for
ply
for
Backlig
ht
Key
（26）
（26）
（Triangle Matrix）
LCD_Backlight
Key_Backlight
Vib_Motor
M
MI
C
C
RE
CE
IVE
R
HE
ADS
E
T
JA
C
C
K
SP
EA
KER
EA
KER
＋
－
＋
－
＋
－
3
ｖ
ｖ
13
.824
.824
MH
ｚ
ｚ
4
ｖ
ｖ
BBIC
(APU
)
AN
T
A
P
U-DPU
I/F
KB
IO
1
～
IO
1
～
8
MI
P
P
MI
N
N
HSSPO
UT
P
P
LO
U
U
T
HSMIP
HEAD
SET
_DET
SPO
UT
P
P
SPOU
T
N
V
ib
_
CTRL
CP_
O
FF
L
CD_B
L
1
LCD_
BL
2
2
DOUBO
U
T
C
H
G_
CTRL
CTRL
CHG_
D
ET
BAT
CHG_
CUR
Serial F
las
h Memo
ry
16MB
it
Nu
mo
ny
x
1.8
” TFT C
olor L
CD
128
x1
x1
60do
t
t
（Tru
ly /Dr-
ly /Dr-
IC：HX835
3)
RF
Ci
rc
rc
ui
t
SR
AM
4MB
it
it
C
ypr
es
s
BB
IC
IC
(D
PU)
PU)
SP
I
I
add
re
s
s
/d
ata
bus
SP
I
I
RF I/F
Uart
U
a
rt I/F
J
T
AG
I/
F
Ni-MH
JT
AG
C
harge
Circuit
BELL_LED(Green)
BE
LL
_
LL
_
G
R
EEN
BELL_LED
（ Red）
BE
LL
_
LL
_
R
ED
7
KX-UDT111RU
4.2.
Circuit Operations
4.2.1.
Outline
Handset consists of the following ICs as shown in Block Diagram (Handset).
• BBIC (Base Band IC): IC100
- All data signals (forming/analyzing ACK or CMD signal)
- All interfaces (ex: Key, Detector Circuit, Charge, LCD, LED, SRAM, Flash ROM)
- All interfaces (ex: Key, Detector Circuit, Charge, LCD, LED, SRAM, Flash ROM)
• SRAM: IC101
- Application data and code are temporarily stored.
• Flash ROM (substitute EEPROM): IC102
- Adjustment data, program data and temporary user data are stored.
• RF IC: IC1
- PLL Oscillator
- Detector
- Compress/Expander
- Amplifier for reception
- Amplifier for transmission
- Detector
- Compress/Expander
- Amplifier for reception
- Amplifier for transmission
4.2.2.
Power Supply Circuit / Reset Circuit
The power supply of each IC is as follows.
The Power On Reset is designed to guarantee power-on of the system only when 1.8v and 3.0v voltages exist.
The Power On Reset is designed to guarantee power-on of the system only when 1.8v and 3.0v voltages exist.
4.2.3.
Reset Circuit
The reset signal is generated with IC1(44Pin).
8
KX-UDT111RU
4.2.4.
Clock Circuit
4.2.5.
Bus Access
The SRAM is used with an async mode.
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