Panasonic KX-TDA0158CE Service Manual ▷ View online
5
KX-TDA0158CE
4 Technical Descriptions
4.1.
Block Diagram
4.1.1.
Main Board
FP
G
A
IC
103
FLA
S
H
R
O
M
(3
2
M
b
it)
IC
101
AD
2
3
-A
D
1
DA
B
1
5
-DA
B
0
RE
S
E
T
FP
G
A
BBI
C
IC
100
R
F
o
u
t/i
n
R
F
M
odul
e
IC
8
0
0
R
SSI
,R
XD
A
AN
T
1
AN
T
2
A
n
tenna 1
A
n
te
nna 2
D
800
(A
nt
enna S
w
it
c
h
)
X
100
(10.
368M
H
z
)
IC
201
2.
5V
R
eg.
D1
R8
V
D3
R2
V
LD
O
1
LD
O
2
A
d
d
ress/
D
a
ta
B
u
s
F-
R
S
T
D3
R2
V
DC/
DC
C
onv
er
te
r I
C
IC
203 5.
5V
D5
R5
V
RF
_
V
P
C
M
I/F
FS
C
0
FS
C
1
PC
M
I
/F
D1
R2
V
X
101
(16.
384M
H
z
)
S
RAM
(2
M
b
it)
IC
102
AC
S0
AC
S1
UT
X
URX
C
N
101
T
e
s
t m
ode
s
o
ft
w
ar
e D
.L.
c
onnec
to
r
Re
d
PA[
0
]
RF
_
V
AC
S2
AC
S2
/C
S
1
D1
R2
V
D1
R8
V
D3R2V
D3
R2
V
D3
R2
V
Q
200
Q
210
S
P
I I/F
C
N
102
SPI
i
/f
c
o
nnec
to
r
SPI
D
O
SPI
C
L
K
SPI
D
I
C
N
103
(10p
in
)
Q
201
C
231,
232,
233
1.
0F
×
3
/C
E
D
C
/D
C
out
put
vo
lt
age c
ont
ro
l
C
N
100
P
D
R
1
[3
:0
]
S
tar
t-
up
c
ont
ro
l
ci
rc
u
it
ADP
CM
Tr
an
sco
d
e
r
IC
1
0
7
Ec
h
o
can
cel
le
r
IC
1
0
6
PA[
1
]
R
F
o
u
t/i
n
R
F
M
odul
e
IC
8
0
1
Tx
D
A
SK
SO
LE
P2
[2
]
D3
R2
V
G
reen
Q
701
D3
R2
V
P2
[5
]
RF
_
V
PA_
V
PA_
V
GA2R5V
nC
S
DA
T
A
DCL
K
ASD
I
VC
C
GN
D
H
T
ran
s.
T
100
+
D3
R2
V
-
D3
R2
V
L
H
T
ran
s.
T
101
+
D3
R2
V
-
L
H
T
ran
s.
T
102
+
D3
R2
V
-
L
H
T
ran
s.
T
103
+
D3
R2
V
-
L
+
PAO
N
RF
CL
K
RX
DS
G
P
D
R
0
[3
:0
]
PD
X1
[3
:0
]
PD
X0
[3
:0
]
Q
211
SC
L
K
Q
700
S
W
100
D
IP SW
(6bi
t)
IC
204
2.
5V
R
eg.
G
A
2R
5V
IC
200
1.
2V
R
eg.
IC
202
2.
18V
R
eg.
PA_
V
KX-TD
A0158CE :
BLOCK DIA
GRAM
6
KX-TDA0158CE
4.2.
Hardware Description
4.2.1.
Function Description
KX-TDA0158CE is the Cell Station (CS) for TDE series. CS converts voice data from PBX to radio signal and transmits to DECT
Portable Station (PS). Conversely CS converts radio signal from PS to voice data and transmits to PBX.
This unit is composed of 2 different PCBs. One is the Control Board to handle voice data and control data from PBX.
The other is the RF module to transmit and receive RF signal.
Portable Station (PS). Conversely CS converts radio signal from PS to voice data and transmits to PBX.
This unit is composed of 2 different PCBs. One is the Control Board to handle voice data and control data from PBX.
The other is the RF module to transmit and receive RF signal.
4.2.2.
BUS Access Circuit
The BBIC (IC100) has built-in MPU. This BBIC processes control command from PBX and PS.
Application software is stored in 32Mbit Flash Memory (IC101). This Flash Memory is so called Dual Operation type Flash. It is
possible to write data onto this Flash Memory in active status so that this Flash Memory is used as EEPROM. Some calibration
data such as RSSI and clock are stored in the Flash Memory.
2Mbit SRAM is used as the work area. CN101 is the communication port for service purpose. CN101 is connected to the serial
port of the BBIC.
SW100 is 6bits DIP switch to set the operating modes of CS.
Application software is stored in 32Mbit Flash Memory (IC101). This Flash Memory is so called Dual Operation type Flash. It is
possible to write data onto this Flash Memory in active status so that this Flash Memory is used as EEPROM. Some calibration
data such as RSSI and clock are stored in the Flash Memory.
2Mbit SRAM is used as the work area. CN101 is the communication port for service purpose. CN101 is connected to the serial
port of the BBIC.
SW100 is 6bits DIP switch to set the operating modes of CS.
7
KX-TDA0158CE
4.2.3.
Line Interface
This circuit handles data communication from DHLC(DLC) card to CS. CS is connected to DHLC(DLC) card by 4 adjacent ports.
The signal from DHLC(DLC) card is provided to CN100, and provided to comparator (IC108-115) via filter and pulse transformer
(T100-103). These digital data is transferred to FPGA (IC103)
The signal from DHLC(DLC) card is provided to CN100, and provided to comparator (IC108-115) via filter and pulse transformer
(T100-103). These digital data is transferred to FPGA (IC103)
Note:
The GND of CS(KX-TDA0158CE) is not common to the GND of the PBX itself, care must be taken when using a measuring
device such as an oscilloscope. (Make sure to use the measuring device with its frame ground open.)
device such as an oscilloscope. (Make sure to use the measuring device with its frame ground open.)
SYNC (5bit)
:Synchronization bit
MAN (3bit)
:Frame header detection
Cch (1bit)
:Control channel
Dch (2bit)
:Data channel
B1ch, B2ch (8bit) :Bearer channel
8
KX-TDA0158CE
4.2.4.
FPGA
FPGA (IC103) has the following features.
(1) Voice data transmission
Extracts voice data from digital data and provides to BBIC.
(2) Superframe detection, delay compensation
Detects super frame synchronization signal and compensates time difference of delay caused by the different cable length
(1) Voice data transmission
Extracts voice data from digital data and provides to BBIC.
(2) Superframe detection, delay compensation
Detects super frame synchronization signal and compensates time difference of delay caused by the different cable length
from DHLC(DLC) card, then provides to PSYNC pin of BBIC.
(3) Address decoder, internal registers
Address decoder to generate chip select signal for other ICs and internal registers to set FPGA operation.
Address decoder to generate chip select signal for other ICs and internal registers to set FPGA operation.
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