DOWNLOAD Panasonic KX-TDA0158CE Service Manual ↓ Size: 2.28 MB | Pages: 51 in PDF or view online for FREE

Model
KX-TDA0158CE
Pages
51
Size
2.28 MB
Type
PDF
Document
Service Manual
Brand
Device
PBX / 8-CHANNEL CELL STATION UNIT FOR DECT PORTABLE STATION
File
kx-tda0158ce.pdf
Date
PREV: Panasonic KX-TDA0156CE (serv.man4) Service Manual / Supplement

Panasonic KX-TDA0158CE Service Manual ▷ View online

37
KX-TDA0158CE
13 Exploded View and Replacement Parts List
13.1. IC Data
13.1.1. IC100 (BBIC)
Pin 
No.
Terminal Name
I/O setting
Pull-up/down 
Processing
Contents of Control
Remark
1
VDDIO
-
-
3.2V power supply for I/O
-
2
VSS
-
-
Ground
-
3
AD8
I/O
-
AD7
Address bus
4
AD9
I/O
-
AD8
Address bus
5
AD10
I/O
-
AD9
Address bus
6
AD11
I/O
-
AD10
Address bus
7
AD12
I/O
-
AD11
Address bus
8
AD13
I/O
-
AD12
Address bus
9
AD14
I/O
-
AD13
Address bus
10
P3[7]/PD7
O
-
SYSEL
0:SYEN for RF A
11
P3[1]/PD1
O
-
RESET_B
0:Reset for RF B
12
P3[5]/PD5
O
-
ANT1
1:ANT1 active
13
P3[4]/PD4
O
-
ANT2
1:ANT2 active
14
P3[3]/PD3
O
-
Not in use (open)
-
15
P3[2]/PD2
O
-
RESET_A
0:Reset for RF A
16
VDD
-
-
1.8V power for digital
-
17
VSS
-
-
Digital ground
-
18
RFCLK
O
-
RFCLK
10.368MHz(burst)
19
VDDRF
-
-
1.8V power for RFCLK,  oscillator
-
20
VSSRF
-
-
"Ground for RFCLK,  oscillator
-
21
Xtal1
I
-
Connect to Xtal
oscillating circuit (10.368MHz)
22
CAP
I
-
Oscillator tuning
-
23
AVS
-
-
Ground
-
24
AVD
-
-
1.8V power for analog
-
25
RSSI
I
-
RSSI
6bit ADC input
26
RDI
I
-
RDI
RF RX data
27
CMPREF
I
-
Not in use (Ground)
-
28
TDO
O
-
TDO
RF TX data
29
AD15
I/O
-
AD14
Address bus
30
AD16
I/O
-
AD15
Address bus
31
AD17
I/O
-
AD16
Address bus
32
AD18
I/O
-
AD17
Address bus
33
AD19
I/O
-
AD18
Address bus
34
AD20
I/O
-
AD19
Address bus
35
AD21
I/O
-
AD20
Address bus
36
AD22
I/O
-
AD21
Address bus
37
AD23
I/O
-
AD22
Address bus
38
LE
O
-
LE
RF PLL control signal
39
SO
O
-
SO
RF PLL control signal
40
SK
O
-
SK
RF PLL control signal
41
DAC/ADC2
I/O
-
Not in use (Pull down)
-
42
P3[6]/PD6
O
-
RFSEL
0:Select RF A
43
RDN
O
-
Read Enable
0:Read
38
KX-TDA0158CE
44
WRN
O
-
Write Enable
0:Write
45
MI/READY
I/O
Pull-up(Built in)
Ready(Not in use (Pull down)
-
46
SCLK
O
-
Bus clock (to E.C.(IC106))
10.368MHz
47
UTX/P0[0]
O
-
TX
for maintenance
48
URX/P0[1]
I
Pull-up(Built in)
RX
for maintenance
49
JTIO/P0[2]
I/O
Pull-up(Built in)
JTAG
for maintenance
50
PCM_FSC1/P0[3]
O
-
PCM_F1
PCM i/f, 1:Active
51
PCM_FSC0/P0[4]
O
-
PCM_F0
PCM i/f, 1:Active
52
PCM_CLK/P0[5]
O
-
PCM_CK
PCM i/f, 2.048MHz Clock
53
PCM_DOUT/P0[6]
O
-
PCM_UP
PCM i/f, Output Data
54
PCM_DIN/P0[7]
O
-
PCM_DN
PCM i/f, Input Data
55
VDDIO
-
-
3.2V power supply for I/O
-
56
VSS
-
-
Ground
-
57
DREQ0n/INT0n/P1[0]
O
-
PSYNC
Superframe timing
58
DACK0n/INT1n/P1[1]
O
-
FINT_N
0:Interrupt from FPGA
59
ACS1/DREQ1n/INT2n/P1[2]
O
-
ACS1(SRAM chip select)
0:Select
60
ACS0
O
-
ACS0(Flash ROM chip select)
0:Select
61
ACS2/DACK1n/INT3n/P1[3]
O
-
ACS2(FPGA chip select)
0:Select
62
HOLDn/INT4n/P1[4]
I
-
EC_IRQ
0:Interrupt from E.C.
63
VDDE/HOLDACKn/INT5n/P1[5]
I
-
ICHK_MODE
0:Checker Mode
64
BE1n
O
-
High byte enable
0:Enable
65
BE0n
O
-
Low byte enable
0:Enable
66
SCL2/P3[0]
O
-
SFFH
PSYNC output control
67
SDA2
O
-
Not in use (Pull-up)
-
68
DAB0
I/O
-
DAB0
Data bus
69
DAB8
I/O
-
DAB8
Data bus
70
DAB1
I/O
-
DAB1
Data bus
71
DAB9
I/O
-
DAB9
Data bus
72
DAB2
I/O
-
DAB2
Data bus
73
DAB10
I/O
-
DAB10
Data bus
74
DAB3
I/O
-
DAB3
Data bus
75
DAB11
I/O
-
DAB11
Data bus
76
VSS
-
-
Ground
-
77
VDD
-
-
1.8V power for digital
-
78
VDDIO
-
-
3.2V power supply for I/O
-
79
P2[0]/PWM0/SPIDI
I
-
SPIDI
Test purpose only
80
P2[1]/PWM1/SPICLK
O
-
SPICLK
Test purpose only
81
P2[2]/ADC0/CLK100
O
-
F_RST
0:Reset for FPGA
82
P2[3]/ADC1
O
-
SPC_PW
1:Charge ON
83
P2[4]/SCL1
O
-
FTC_PW(Not in use (open)
-
84
P2[5]/SDA1
O
-
DC_LIM
Output voltage control
85
DAB4
I/O
-
DAB4
Data bus
86
DAB12
I/O
-
DAB12
Data bus
87
DAB5
I/O
-
DAB5
Data bus
88
DAB13
I/O
-
DAB13
Data bus
89
DAB6
I/O
-
DAB6
Data bus
90
DAB14
I/O
-
DAB14
Data bus
91
DAB7
I/O
-
DAB7
Data bus
92
DAB15
I/O
-
DAB15
Data bus
93
P2[7]/DC_CTL
O
-
SPIDO
Test purpose only
94
DC_I
I
-
Not in use (Pull down)
-
95
P1[6]/PON/INT6n
I
-
Power on
Pull up
96
P1[7]/CHARGE/INT7n
I
-
Not in use (Ground)
-
97
P2[6]/stop_charge
O
-
Not in use (open)
Output:0
98
VBAT3/RINGING
I
-
Connect to Ground
-
99
DC_stab
O
-
Not in use (open)
-
100
DC_sense
I
-
Not in use (Ground)
-
101
AVS_sense
I
-
Not in use (Ground)
-
102
ADC3
I
-
Not in use (Pull down)
-
103
LD01_sense
I
-
3V power supply monitor
0.9V
104
LD01_CTRL
O
-
3V power supply control
0:3V power supply ON
105
LD02_CTRL
O
-
1.8V power supply control
0:1.8V power supply ON
106
VBAT2
I
-
3.4V
-
107
VBAT1
I
-
Not in use (Ground)
-
108
AVS2
-
-
Ground
Analog ground for BMC and DAC
109
AVD2
-
-
1.8V power supply
Analog supply for BMC and DAC
Pin 
No.
Terminal Name
I/O setting
Pull-up/down 
Processing
Contents of Control
Remark
39
KX-TDA0158CE
110
LSR+/REF
O
-
Not in use (open)
-
111
LSR-/REF
O
-
Audio signal output
-
112
LSR_HS/CIDIN-
O
-
Not in use (open)
-
113
VREF_HS/CIDOUT
O
-
Not in use (open)
-
114
MIC-
I
Pull-down(Built in) Not in use (open)
-
115
VREF-
O
-
Not in use (Ground)
-
116
VBUF
O
-
Voltage reference
1.5V
117
AGND
O
-
Signal ground
0.9V
118
MIC+
I
-
Not in use (open)
-
119
VREF+/CIDIN+
O
-
Not in use (open)
-
120
RSTn
I/O
-
Reset input
0:Reset
121
AD0/EXT_MEMORY
I
Pull-down(Built in) EXT_MEMORY select(Pull up)
-
122
AD1
I/O
-
AD0
Address bus
123
AD2
I/O
-
AD1
Address bus
124
AD3
I/O
-
AD2
Address bus
125
AD4
I/O
-
AD3
Address bus
126
AD5
I/O
-
AD4
Address bus
127
AD6
I/O
-
AD5
Address bus
128
AD7
I/O
-
AD6
Address bus
Pin 
No.
Terminal Name
I/O setting
Pull-up/down 
Processing
Contents of Control
Remark
40
KX-TDA0158CE
13.1.2. IC103 (FPGA)
Pin 
No.
Terminal Name
I/O setting
Pull-up/down 
Processing
Contents of Control
Remark
1
reserve
in
pullup
Extended configuration 
signal(ASDO/out)
-
2
reserve
in
pullup
Extended configuration 
signal(nCSO/out)
-
3
reserve
in
pullup
Config CRC error 
signal(CRC_ERROR/out)
-
4
reserve
in
pullup
User configuration clock(CLKUSR/
out)
-
5
NC4M_O
out
pullup
ECi/f  CLOCK output
-
6
NF0_O
out
pullup
ECi/f  FH output
-
7
VCCIO
-
-
IO power 3.3V
-
8
RIN_O
tri
-
EC i/f receive data PCM output
-
9
GND
-
-
Digital  GNG
-
10
SIN_O
tri
-
EC i/f transmit data PCM output
-
11
TEST0
tri
-
Debug signal
-
12
TEST1
-
-
Debug signal
-
13
ROUT_I
in
pullup
EC i/f receive data PCM input
-
14
SOUT_I
in
pullup
EC i/f transmit data PCM input
-
15
reserve
in
pullup
Reserved
-
16
TDO
out
-
JTAG TDO
-
17
TMS
in
-
JTAG TMS
-
18
TCK
in
-
JTAG TCK
-
19
TDI
in
-
JTAG TDI
-
20
DATA0
in
-
Configuration data input
-
21
DCLK
out
-
Configuration clock output
-
22
nCE
in
-
Configuration chip enable
-
23
NC4M_I
in
ECi/f  CLOCK input
-
24
NF0_I
in
ECi/f  FH input
-
25
GND
-
-
Digital GND
-
26
nCONFIG
in
-
Configuration control
-
27
(CLK2)
-
-
Reserved (connect to GND)
-
28
(CLK3)
-
-
Reserved (connect to GND)
-
29
VCCIO
-
-
IO power 3.3V
-
30
CD_PCMCLK
tri
-
Debug signal
-
31
CD_FSYNC
tri
-
Debug signal
-
32
VCCINT
-
-
CORE power 1.2V
-
33
CD_PCMOUT
tri
-
Debug signal
-
34
CD_PCMIN
in
pullup
Debug signal
-
35
CD_AUSEL
tri
-
Debug signal
-
36
GND
-
-
Digital GNG
-
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