DOWNLOAD Panasonic KX-NT136RU Service Manual ↓ Size: 2.33 MB | Pages: 68 in PDF or view online for FREE

Model
KX-NT136RU
Pages
68
Size
2.33 MB
Type
PDF
Document
Service Manual
Brand
Device
PBX / IP PROPRIETARY TELEPHONE
File
kx-nt136ru.pdf
Date
PREV: Panasonic KX-NS8290CE (serv.man3) Service Manual / Supplement

Panasonic KX-NT136RU Service Manual ▷ View online

Pin
No.
Terminal Name
I/O Setting
Pull-up
Processing
Contents of Control
Remark
21
M/nS
I
-
Master/slave select input. When M/S
is high the device is the master
master
22
MCLK
I
-
Master clock input.
Input 32.768MHz
23
nRESET
I
-
Codec device reset.
24
VSS
-
-
Internal substrate connection.
25
AVSS3
-
-
Analog ground for 8
Ωspeaker driver.
26
SPOUTP
O
-
Inverting analog output from 8 ohm
speaker amplifier
27
AVDD3
-
-
Analog power supply for 8
Ωspeaker
driver.
28
SPOUTM
O
-
Noninverting analog output from 8ohm
speaker amplifier
29
AVSS3
-
-
Analog ground for 8
Ωspeaker driver.
30
CIINM
I
-
Caller ID amplifier analog inverting
input
31
CIINP
I
-
Caller ID amplifier analog noninverting
input
32
AVSS1
-
-
Analog ground. Connect to AVSS2
33
AVDD1
-
-
Analog power supply.
34
MCINM
I
-
Microphone amplifier analog inverting
input
35
MCINP
I
-
Microphone amplifier analog
noninverting input
36
MCBIAS
O
-
MCBIAS provides a bias voltage and
current to operate Electret
microphones. 2.5 V.
37
LCDOUT
O
-
4-bit DAC output voltage
Not in use
38
HSOUTM
O
-
Inverting handset output.
39
HSOUTP
O
-
Noninverting handset output.
40
HSINM
I
-
Handset amplifier analog inverting
input.
41
HSINP
I
-
Handset amplifier analog noninverting
input.
42
FILT2
O
-
Reference filter node.
43
FILT1
O
-
Reference filter node.
44
LNINP
I
-
Line-port amplifier analog noninverting
input
45
LNINM
I
-
Line-port amplifier analog inverting
input
46
LNOUTM
O
-
Inverting line-port output.
Not in use
47
LNOUTP
O
-
Noninverting line-port output.
Not in use
48
VCOM
O
-
VCOM provides a reference voltage of
1.5 V.
33
KX-NT136RU
10.3. IC12
Pin
No.
Terminal Name I/O Setting
Pull-up
Processing
Contents of Control
Remark
1
P1LED2
I/O
Built-in
Port1 LED2 indicator
2
P1LED1
I/O
Built-in
Port1 LED1 indicator
3
P1LED0
I/O
Built-in
Port1 LED0 indicator
4
P2LED2
I/O
Built-in
Port2 LED2 indicator
5
P2LED1
I/O
Built-in
Port2 LED1 indicator
6
P2LED0
I/O
Built-in
Port2 LED0 indicator
7
DGND
-
-
Digital Ground
8
VDDIO
-
-
Digital VDD
9
NC
I
Built-in(down) No connection
10
NC
I
Built-in(down) No connection
11
NC
I
Built-in
No connection
12
ADVFC
I
Built-in
Switch flow control
1:advertise switch flow
13
P2ANEN
I
Built-in
Auto negotiation on port 2
1:enable
14
P2SPD
I
Built-in(down) Force port2 to 10Base-T
0:enable
15
P2DPX
I
Built-in(down) Port2 default to half duplex mode
0:enable
16
P2FFC
I
Built-in(down) Port2 flow enable is determined by auto
negotiation result
0:enable
17
NC
O
Built-in
No connection
18
NC
I
Built-in(down) No connection
19
NC
I
Built-in(down) No connection
20
P2LED3
O
Built-in(down) Port2 LED3 indicator
21
DGND
-
-
Digital Ground
22
VDDC
-
-
1.8V digital core VDD
23
LEDSEL1
I
Built-in(down) LED display mode select
24
NC
O
-
No connection
25
P1LED3
O
Built-in(down) Port1 LED3 indicator
26
NC
O
-
No connection
27
HWPOVR
I
Built-in(down) Hardware pin overwrite
0:pin configs are overwritten
by the EEPROM
28
P2MDIXDIS
I
Built-in(down) Port2 auto MDI/MDI-X
0:enable
29
P2MDIX
I
Built-in(down) Port2 MDI/MDI-X (without auto)
0:MDI
30
P1ANEN
I
Built-in
Auto negotiation on port 1
1:enable
31
P1SPD
I
Built-in(down) Force port1 to 10Base-T
0:enable
32
P1DPX
I
Built-in(down) Port1 default to half duplex mode
0:enable
34
KX-NT136RU
Pin
No.
Terminal Name
I/O Setting
Pull-up
Processing
Contents of Control
Remark
33
P1FFC
I
Built-in(down) Port1 flow enable is determined by auto
negotiation result
0:enable
34
NC
I
Built-in(down) No connection
35
NC
I
Built-in(down) No connection
36
PWRDN
I
Built-in
Chip power down
0:active
37
AGND
-
-
Analog ground
38
VDDA
-
-
1.8V analog VDD
39
AGND
-
-
Analog ground
40
MUX1
I
-
Factory test pin
Float for normal operation
41
MUX2
I
-
Factory test pin
Float for normal operation
42
AGND
-
-
Analog ground
43
VDDA
-
-
1.8V analog VDD
44
FXSD1
I
-
Fiber signal/factory test pin
45
RXP1
I/O
-
Physical receive or transmit
+differential
46
RXM1
I/O
-
Physical receive or transmit
-differential
47
AGND
-
-
Analog ground
48
TXP1
I/O
-
Physical transmit or receive
+differential
49
TXM1
I/O
-
Physical transmit or receive
-differential
50
VDDATX
-
-
3.3V analog VDD
51
VDDARX
-
-
3.3V analog VDD
52
RXM2
I/O
-
Physical receive or transmit
+differential
53
RXP2
I/O
-
Physical receive or transmit
-differential
54
AGND
-
-
Analog ground
55
TXM2
I/O
-
Physical transmit or receive
-differential
56
TXP2
I/O
-
Physical transmit or receive
+differential
57
VDDA
-
-
1.8V analog VDD
58
AGND
-
-
Analog ground
59
TEST1
I
-
Factory test pin
Float for normal
60
TEST2
I
Built-in
Factory test pin
Float or pull up for normal
61
ISET
O
-
Physical transmit output currrent
Pull down with 3.01K
62
AGND
-
-
Analog ground
63
VDDAP
-
-
1.8V analog VDD for PLL
64
AGND
-
-
Analog ground
65
X1
I
-
25MHz clock in
66
X2
O
-
25MHz clock out
67
RST_N
I
Built-in
Hardware reset pin
0:active
68
BPEN
I
Built-in(down) Half duplex backpressure
1:enable
69
SMAC
I
Built-in(down) Special MAC mode
0:disable
70
LEDSEL0
I
Built-in(down) LED display mode select
71
SMTXEN
I
Built-in(down) Switch MII transmit enable
72
SMTXD3
I
Built-in(down) Switch MII transmit data bit 3
73
SMTXD2
I
Built-in(down) Switch MII transmit data bit 2
74
SMTXD1
I
Built-in(down) Switch MII transmit data bit 1
75
SMTXD0
I
Built-in(down) Switch MII transmit data bit 0
76
SMTXER
I
Built-in(down) Switch MII transmit error
77
SMTXC
I/O
Built-in(down) Switch MII transmit clock
78
DGND
-
-
Digital Ground
79
VDDIO
-
-
Digital VDD
80
SMRXC
I/O
Built-in(down) Switch MII receive clock
81
SMRXDV
O
-
Switch MII receive data valid
82
SMRXD3
I/O
Built-in(down) Switch MII receive data bit 3
83
SMRXD2
I/O
Built-in(down) Switch MII receive data bit 2
84
SMRXD1
I/O
Built-in(down) Switch MII receive data bit 1
85
SMRXD0
I/O
Built-in(down) Switch MII receive data bit 0
86
SCOL
I/O
Built-in(down) Switch MII collision detect
87
SCRS
I/O
Built-in(down) Switch MII carrier sense
88
SCONF1
I
Built-in(down) Switch MII interface configuration
PHY mode MII
89
SCONF0
I
Built-in(down) Switch MII interface configuration
(SCONF1=0 SCONF0=1)
90
DGND
-
-
Digital Ground
91
VDDC
-
-
1.8V Digital VDD
92
PRSEL1
I
Built-in(down) Priority select
93
PRSEL0
I
Built-in(down) Priority select
94
MDC
I
Built-in
MII management interface CLK in
95
MDIO
I/O
Built-in
MII management interface data
input/output
96
SPIQ
O
Built-in
SPI slave mode: serial data output
35
KX-NT136RU
Pin
No.
Terminal Name I/O Setting
Pull-up
Processing
Contents of Control
Remark
97
SCL
I/O
Built-in
SPI slave mode: clock input
98
SDA
I/O
Built-in
SPI slave mode: serial data input
99
SPIS_N
I/O
Built-in
SPI slave mode: chip select
0:active
100
PS1
I
Built-in(down) Serial bus configuration pins
SPI slave mode
101
PS0
I
Built-in(down) Serial bus configuration pins
(PS1=1 PS0=0)
102
PV31
I
Built-in
Port3 VLAN mask bits
1:port1 may transmit packets
received on port3
103
PV32
I
Built-in
Port3 VLAN mask bits
1:port2 may transmit packets
received on port3
104
PV21
I
Built-in
Port2 VLAN mask bits
1:port1 may transmit packets
received on port2
105
PV23
I
Built-in
Port2 VLAN mask bits
1:port3 may transmit packets
received on port2
106
DGND
-
-
Digital Ground
107
VDDIO
-
-
Digital VDD
108
PV12
I
Built-in
Port1 VLAN mask bits
1:port2 may transmit packets
received on port1
109
PV13
I
Built-in
Port1 VLAN mask bits
1:port3 may transmit packets
received on port1
110
P3_1PEN
I
Built-in(down) Enable 802.1p priority classification on
port3 ingress
1:enable
111
P2_1PEN
I
Built-in(down) Enable 802.1p priority classification on
port2 ingress
1:enable
112
P1_1PEN
I
Built-in(down) Enable 802.1p priority classification on
port1 ingress
1:enable
113
P3_TXQ2
I
Built-in(down) Select transmit queue split on port3
1:split
114
P2_TXQ2
I
Built-in(down) Select transmit queue split on port2
1:split
115
P1_TXQ2
I
Built-in(down) Select transmit queue split on port1
1:split
116
P3_PP
I
Built-in(down) Select port based priority on port3 ingress 1:high
117
P2_PP
I
Built-in(down) Select port based priority on port2 ingress 0:low
118
P1_PP
I
Built-in(down) Select port based priority on port1 ingress 0:low
119
P3_TAGINS
I
Built-in(down) Enable tag insertion on port3 egress
0:disable
120
P2_TAGINS
I
Built-in(down) Enable tag insertion on port2 egress
0:disable
121
P1_TAGINS
I
Built-in(down) Enable tag insertion on port1 egress
0:disable
122
DGND
-
-
Digital Ground
123
VDDC
-
-
1.8V Digital VDD
124
P3_TAGRM
I
Built-in(down) Enable tag removal on port3 egress
0:disable
125
P2_TAGRM
I
Built-in(down) Enable tag removal on port2 egress
0:disable
126
P1_TAGRM
I
Built-in(down) Enable tag removal on port1 egress
0:disable
127
TESTEN
I
Built-in(down) Scan test enable
128
SCANEN
I
Built-in(down) Scan test Scan Mux Enable
36
KX-NT136RU
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