DOWNLOAD Panasonic KX-NS500 / KX-NS520 / KX-NS500RU / KX-NS520RU (serv.man2) Service Manual ↓ Size: 13.72 MB | Pages: 110 in PDF or view online for FREE

Model
KX-NS500 KX-NS520 KX-NS500RU KX-NS520RU (serv.man2)
Pages
110
Size
13.72 MB
Type
PDF
Document
Service Manual / Supplement
Brand
Device
PBX / HYBRID IP-PBX
File
kx-ns500-kx-ns520-kx-ns500ru-kx-ns520ru-sm2.pdf
Date

Panasonic KX-NS500 / KX-NS520 / KX-NS500RU / KX-NS520RU (serv.man2) Service Manual / Supplement ▷ View online

21
2.2.6.
No.6
+
-
+
-
+
-
+
-
C
E
B
A
D
F
3
6
4
2
5
8
7
11
10
9
G
H
12
PT_TXA[0]
SIGN5570
PT_TXA[1]
PT_RXA[0]
PT_RXA[1]
PT_RXB[0]
PT_RXB[1]
JK300A
NC
8
7
6
5
4
3
2
1
IC300B
NC
4
GND
8
VCC
+3.3V
IC300A
NC
4
GND
8
VCC
R323
10k
NC
IC300B
NC
5
6
7
R324
5.1k
NC
IC300A
NC
3
2
1
C308
0.01u
16
NC
IC300B
NC
3
2
1
R325
10k
NC
DG
IC300A
NC
5
6
7
DG
R318A
1.5k
NC
R312A
270
NC
T300A
NC
1
2
4
5
6
7
10
9
8
R306A
22k
NC
R303A
100k
NC
C303A
1u
16
NC
R308A
10k
NC
R309A
10k
NC
R317A
1.5k
NC
R307A
56
NC
+3.3V
DG
R305A
22k
NC
R316A
910
NC
R300A
1M
NC
R310A
8.2
NC
+40V
ZNR301A
NC
DG
ZNR300A
NC
R314A
22
NC
R315A
910
NC
R301A
150k
NC
R304A
22k
NC
R302A
10k
NC
1
2
3
45
6
7
8
C301A
1u
10
NC
C300A
1u
50
NC
R311A
22
NC
+3.3V
FG
Q300A
NC
B
E
C
R319A
2.2k
NC
R322A
2.2k
NC
PT_POWA
PT_CURA
PT_TXA[1]
PT_TXA[0]
PT_TXB[1]
PT_TXB[0]
PT_RXA[0]
PT_RXA[1]
C307A
0.1u
50
NC
+3.3V
DG
+3.3V
DG
C308A
0.1u
50
NC
DG
PT_RXB[1]
PT_RXB[0]
R608
22.1k
R602
47k
C608
22u
6.3
C601
10u
25
+3.3V
C606
3300p
50
R605
33k
R604
10k
L600
2.2u
C605
1u
16
Q600
5
4
3
C604
NC
C600
0.47u
50
C609
22u
6.3
R609
10k
D600
5.13
CN601
1
2
3
Q600
2
6
1
R601
2.2k
CN600
1
2
3
4
5
6
7
8
9
10
R607
73.2k
R606
10k
CF601
CF600
R600
1k
C602
10u
25
Q601
1
S1
2
S2
3
S3
4
G
5
D1
6
D2
7
D3
8
D4
PG
C610
10u
25
DG
R612
10k
+3.3V
D602
NC
DG
FAN_ALM
IC601
1
NC
2
A
3
GND
5
VCC
4
Y
DC_ALM
AC_ALM
IC602
1
NC
2
A
3
GND
5
VCC
4
Y
DG
+3.3V
R613
10k
R616
2.2k
R614
10k
+3.3V
R615
2.2k
C612
1000p
50
C613
1000p
50
DG
C615
0.1u
50
C616
0.1u
50
+15V
PG
PG
PG
PG
DG
+40V
C304A
1000p
50
NC
C305A
1000p
50
NC
U303A
NC
2
6
1
U303A
NC
5
3
4
C302A
1u
16
NC
R313A
22
NC
U300AB
NC
2
6
1
U300AB
NC
5
3
4
U301A
NC
2
6
1
U301A
NC
5
3
4
U302A
NC
2
6
1
U302A
NC
5
3
4
C306A
0.1u
16
NC
U301B
NC
5
3
4
R314B
22
NC
R309B
10k
NC
U302B
NC
2
6
1
C302B
1u
16
NC
C304B
1000p
50
NC
R302B
10k
NC
1
2
3
45
6
7
8
T300B
NC
1
2
4
5
6
7
10
9
8
C305B
1000p
50
NC
R313B
22
NC
U302B
NC
5
3
4
R317B
1.5k
NC
R310B
8.2
NC
C306B
0.1u
16
NC
R305B
22k
NC
FG
R312B
270
NC
R301B
150k
NC
R307B
56
NC
+40V
PT_POWB
C300B
1u
50
NC
C303B
1u
16
NC
C301B
1u
10
NC
PT_CURB
+3.3V
DG
R316B
910
NC
R311B
22
NC
U303B
NC
2
6
1
Q300B
NC
B
E
C
R308B
10k
NC
R318B
1.5k
NC
DG
R300B
1M
NC
+3.3V
R306B
22k
NC
U301B
NC
2
6
1
R315B
910
NC
ZNR301B
NC
R319B
2.2k
NC
U303B
NC
5
3
4
R304B
22k
NC
ZNR300B
NC
DG
R303B
100k
NC
R322B
2.2k
NC
D300B
NC
D300A
NC
D301A
NC
D301B
NC
C614
0.1u
50
C611
0.1u
50
R603
47k
C603
0.1u
50
NC
C607
0.1u
50
R611
62
NC
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
+3.3V
+15V
D303
NC
+40V
PG
+40V_OP
DG
R621
0
R622
0
PG
DG
R636
0
DG
C619
0.1u
100
C620
0.1u
100
IC600
1
EN
2
VFB
3
VREG5
4
SS
5
GND1
6
SW
7
VBST
8
VIN
9
GND2
+40V
+15V
+3.3V
+3.3V
+3.3V
R323A
1k
R324A
1k
R323B
1k
R324B
1k
+3.3V
R640
0
R641
0
R642
0
PG
R643
0
PG
PG
R623
NC
PG
+40V_OP
F600
125
2
C630
NC
PG
F601
125
2
J601
NC
J602
NC
FG3
R333B
0
NC
R332B
0
NC
R331B
NC
R330B
NC
C621
100p
100
C622
100p
100
C623
0.1u
50
DG
R637
0
C617
1u
100
C618
1u
100
R619
220
A
B
Power
FAN
300
600
DPT I/F
Low Active
Nomal:Low
Alarm:Open
1
1
KX-NS520 MOTHER BOARD No.6
22
2.2.7.
No.7
C
E
B
A
D
F
3
6
4
2
5
8
7
11
10
9
G
H
12
nSLIC_INT[4]
nSLIC_INT[5]
nSLIC_INT[6]
nSLIC_INT[7]
nSLIC_INT[0]
nSLIC_INT[1]
nSLIC_INT[2]
nSLIC_INT[3]
nSLIC_CS[0]
nSLIC_CS[1]
nSLIC_CS[2]
nSLIC_CS[3]
nSLIC_CS[4]
nSLIC_CS[5]
nSLIC_CS[6]
nSLIC_CS[7]
LDHW[0]
HW_CLK[0]
L_D[0]
L_D[1]
L_D[2]
L_D[3]
L_D[4]
L_D[5]
L_D[6]
L_D[7]
L_A[1]
L_A[2]
L_A[3]
L_A[4]
L_A[5]
L_A[6]
L_A[7]
L_A[8]
L_A[9]
L_A[20]
L_A[21]
L_A[22]
CO_ID[0]
CO_ID[1]
CO_ID[2]
CO_ID[3]
CO_EID[0]
HW_FH[1]
L_A[0]
L_A[1]
L_A[2]
L_A[3]
L_A[4]
L_A[5]
L_A[6]
L_A[7]
L_A[8]
L_A[9]
L_A[10]
L_A[11]
L_A[20]
L_A[21]
L_A[22]
L_D[0]
L_D[1]
L_D[2]
L_D[3]
L_D[4]
L_D[5]
L_D[6]
L_D[7]
nPLD_INT[1]
nPLD_INT[1]
DHW0_IN
nINT_EXT_OP[0]
nINT_EXT_OP[1]
PR_SET
nCS_CO_OP[1]
L_D[0-7]
L_A[0-22]
BUF_EXT_D[0-7]
L_A[7]
L_A[6]
L_A[5]
L_A[4]
L_A[10]
L_A[8]
L_A[11]
L_A[9]
L_A[3]
L_A[2]
L_A[1]
L_A[0]
BUF_EXT_D[3]
BUF_EXT_D[2]
BUF_EXT_D[1]
BUF_EXT_D[0]
BUF_CO_D[4]
BUF_CO_D[5]
BUF_CO_D[6]
BUF_CO_D[7]
HW_FH1_IN
nINT_CO[1]
nINT_CO[1]
HW_CLK[2-6]
HW_CLK[2]
HW_CLK[3]
HW_CLK[4]
HW_CLK[5]
HW_CLK[6]
nHW_FH[2-6]
nHW_FH[2]
nHW_FH[3]
nHW_FH[4]
nHW_FH[5]
nHW_FH[6]
LDHW[2]
LDHW[3]
LDHW[4]
LUHW[2]
LUHW[3]
LUHW[4]
PT_TXA[0]
PT_TXA[1]
PT_RXA[0]
PT_RXA[1]
PT_RXB[0]
PT_RXB[1]
PT_TXB[0]
PT_TXB[1]
LDHW[2]
HW_CLK[2]
HW_CLK[3]
nHW_FH[2]
nHW_FH[3]
HW_CLK[6]
HW_CLK[5]
nHW_FH[4]
DHW1_IN
DHW1_IN
DHW1_IN
L_D[3]
L_D[2]
L_D[1]
L_D[0]
L_D[7]
L_D[6]
L_D[5]
L_D[4]
BUF_CO_D[0]
BUF_CO_D[1]
BUF_CO_D[2]
BUF_CO_D[3]
BUF_CO_D[4]
BUF_CO_D[5]
BUF_CO_D[6]
BUF_CO_D[7]
L_D[3]
L_D[2]
L_D[1]
L_D[0]
L_D[7]
L_D[6]
L_D[5]
L_D[4]
nEXT_PLD_WAIT
INT0
DC_ALM
RLY_RESET
RLY_RESET
CO_ID[1]
CO_ID[0]
CO_ID[2]
CO_ID[3]
CO_ID[0]
CO_ID[1]
CO_ID[2]
CO_ID[3]
CO_EID[0]
CO_EID[1]
CO_EID[2]
CO_EID[3]
nACK_DSPG[0]
nACK_DSPG[1]
nACK_DSPG[2]
nHALT
nHALT
RING_SYNC
L_A[0]
L_A[2]
L_A[4]
L_A[6]
L_A[1]
L_A[3]
L_A[5]
L_A[7]
L_A[8]
L_A[10]
L_A[20]
L_A[22]
L_A[9]
L_A[11]
L_A[21]
L_D[6]
L_D[4]
L_D[2]
L_D[0]
L_D[7]
L_D[5]
L_D[3]
L_D[1]
LUHW[2]
nREAD
nREAD
FAN_ALM
BUF_CO_D[0]
BUF_CO_D[1]
BUF_CO_D[2]
BUF_CO_D[3]
BUF_CO_D[4]
BUF_CO_D[5]
BUF_CO_D[6]
BUF_CO_D[7]
BUF_EXT_D[0]
BUF_EXT_D[1]
BUF_EXT_D[2]
BUF_EXT_D[3]
BUF_EXT_D[4]
BUF_EXT_D[5]
BUF_EXT_D[6]
BUF_EXT_D[7]
BUF_EXT_D[4]
BUF_EXT_D[5]
BUF_EXT_D[6]
BUF_EXT_D[7]
BUF_EXT_D[0]
BUF_EXT_D[1]
BUF_EXT_D[2]
BUF_EXT_D[3]
L_A[0]
L_A[1]
L_A[2]
L_A[3]
BUF_CO_D[3]
BUF_CO_D[2]
BUF_CO_D[1]
BUF_CO_D[0]
LDHW[4]
LDHW[3]
nHW_FH[5]
HW_CLK[4]
nHW_FH[6]
LUHW[3]
LUHW[4]
BUF_EXT_D[4]
BUF_EXT_D[5]
BUF_EXT_D[6]
BUF_EXT_D[7]
L_A[7]
L_A[6]
L_A[5]
L_A[4]
L_A[9]
L_A[8]
L_A[10]
HW_CLK[2]
HW_CLK[3]
HW_CLK[4]
HW_CLK[5]
HW_CLK[6]
nCS_CO_OP[0]
nCS_EXT_OP[0]
nCS_EXT_OP[1]
nCS_EXT_OP[1]
nRST_CO
CO_EID[3]
CO_EID[2]
CO_EID[1]
CO_EID[0]
CO_EID[1]
CO_EID[2]
CO_EID[3]
nCS_BASE
nCS_BASE
nWRITE
nWRITE
nWRITE
nINT_BASE_CO
nCO_PLD_WAIT
nCO_PLD_WAIT
nCO_PLD_WAIT
nINT_CO[0]
nRST_EXT_OP[1]
nRST_EXT_OP[0]
nRST_CO_OP[1]
nRST_CO_OP[1]
nRST_CO_OP[0]
NETREF
L_A[0]
nACK_DSPG[0]
nACK_DSPG[1]
nACK_DSPG[2]
HW_CLK1_IN
HW_FH0_IN
DG
D404
D401
R400
330
+3.3V
D400
1
2
3
+15V
R402
10k
RL200C
1
12
Q402
R404
270
R411
10k
DG
RL200B
1
12
Q405
R409
100k
+3.3V
RL200A
1
12
R401
10k
Q403
Q400
B
C
E
R410
2.7k
R405
10k
Q401
D402
DG
DG
D403
1
2
3
R408
330
R403
270
R406
10k
nSLIC_CS[0-7]
nSLIC_INT[0-7]
R494
33
R499
33
R504
33
R521
33
R515
33
R514
33
R513
33
R512
33
R477
33
R472
33
+3.3V
R471
4.7k
R523
10k
R522
10k
+3.3V
R516
33
R492
33
SLIC_CLK[1]
LDHW[0]
HW_FH[0]
HW_CLK[0]
SLIC_DOUT
R520
33
SLIC_DIN
SLIC_CLK[0]
R488
33
R486
33
R484
33
nCS_DSPG[0]
nCS_DSPG[1]
nCS_DSPG[2]
R493
33
DSPG_INT[0]
DSPG_INT[1]
DSPG_INT[2]
+3.3V
R490
33
+3.3V
R470
4.7k
R475
33
R476
33
R474
4.7k
FAN_ALM
R501
33
R508
33
R509
33
R485
33
HW_FH[1]
HW_CLK[1]
LDHW[1]
PT_CURA
PT_POWA
PT_POWB
PT_CURB
R560
10
R558
10
R557
10
R569
10
R570
10
R571
10
R572
10
R551
10
PNERJ2GEJ100X
R552
10
PNERJ2GEJ100X
R554
10
PNERJ2GEJ100X
DG
R555
10
R463
10k
+3.3V
R462
10k
R568
10
R503
33
+3.3V
R454
10
R455
10
R456
10
R457
10
R458
10
R459
10
R431
10
R432
10
R433
10
R434
10
R435
10
R436
10
+3.3V
DG
+40V_OP
+3.3V
+15V
R445
10
R446
10
R447
10
R448
10
R449
10
R450
10
R451
10
NC
R452
10
R419
10
R418
10
R423
10
R426
10
R422
10
R424
10
R425
10
PT_TXA[0-1]
PT_RXA[0-1]
PT_RXB[0-1]
PT_TXB[0-1]
LUHW[0]
LUHW[1]
R489
33
nRST_SLIC
B400
NC
1
2
3
DG
DG
R412
10k
Q406
R413
330
IC402
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
11
B8
12
B7
13
B6
14
B5
15
B4
16
B3
17
B2
18
B1
19
*OE
IC402
10
GND
20
VCC
R466
10
1
2
3
45
6
7
8
R465
10
1
2
3
45
6
7
8
R468
10
1
2
3
45
6
7
8
IC403
10
GND
20
VCC
IC403
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
11
B8
12
B7
13
B6
14
B5
15
B4
16
B3
17
B2
18
B1
19
*OE
R467
10
1
2
3
45
6
7
8
nRST_CO
C403
0.1u
10
DG
+3.3V
+3.3V
C400
0.1u
10
DG
+15V
R567
10
1
2
3
45
6
7
8
R566
10
1
2
3
45
6
7
8
R565
10
1
2
3
45
6
7
8
R564
10
1
2
3
45
6
7
8
R563
10
1
2
3
45
6
7
8
R562
10
1
2
3
45
6
7
8
R561
10
1
2
3
45
6
7
8
R547
10
1
2
3
45
6
7
8
R548
EXB28V100JX
10
1
2
3
45
6
7
8
R549
EXB28V100JX
10
1
2
3
45
6
7
8
R550
EXB28V100JX
10
1
2
3
45
6
7
8
R556
10
1
2
3
45
6
7
8
R559
10
1
2
3
45
6
7
8
AC_ALM
DC_ALM
R420
10
1
2
3
45
6
7
8
R440
10
1
2
3
45
6
7
8
R500
33
R533
10k
1
2
3
45
6
7
8
R469
10k
1
2
3
4
5
6
7
8
R480
33
1
2
3
4
5
6
7
8
R442
10
1
2
3
45
6
7
8
R444
10
1
2
3
45
6
7
8
R430
10
1
2
3
45
6
7
8
R437
10
1
2
3
45
6
7
8
+3.3V
DG
R529
NC
R532
NC
R531
NC
R530
NC
R537
R535
NC
R536
DG
R534
nACK_DSPG[0-2]
DG
DG
DG
R506
33
R507
33
R461
10
NC
R497
33
R460
10
R487
33
+3.3V
+3.3V
R573
10k
1
2
3
45
6
7
8
R574
10k
1
2
3
45
6
7
8
R543
10k
1
2
3
45
6
7
8
R544
10k
1
2
3
45
6
7
8
R545
10k
1
2
3
45
6
7
8
R546
10k
1
2
3
45
6
7
8
BAT
R542
10k
+3.3V
+3.3V
R575
10k
R576
10k
R464
2.2k
DG
DG
R415
2.2k
R414
10k
+3.3V
R417
10k
+3.3V
R416
10k
RL200D
1
12
L_D[0-7]
L_A[0-22]
nREAD
nWRITE
CN400
1
CN400
2
CN400
3
CN400
4
CN400
5
CN400
6
CN400
7
CN400
8
CN400
9
CN400
10
CN400
11
CN400
12
CN400
13
CN400
14
CN400
15
CN400
16
CN400
17
CN400
18
CN400
19
CN400
20
CN400
21
CN400
22
CN400
23
CN400
24
CN400
25
CN400
26
CN400
27
CN400
28
CN400
29
0
0
4
N
C
0
3
0
0
4
N
C3
1
CN400
32
CN400
33
CN400
34
CN400
35
CN400
36
CN400
37
CN400
38
CN400
39
CN400
40
CN400
41
CN400
42
CN400
43
CN400
44
CN400
45
CN400
46
CN400
47
CN400
48
CN400
49
CN400
50
CN400
51
CN400
52
CN400
53
CN400
54
CN400
55
CN400
56
CN400
57
CN400
58
CN400
59
CN400
60
CN401
1
CN401
2
CN401
3
CN401
4
CN401
5
CN401
6
CN401
7
CN401
8
CN401
9
CN401
10
CN401
11
CN401
12
CN401
13
CN401
14
CN401
15
CN401
16
CN401
17
CN401
18
CN401
19
CN401
20
CN401
21
CN401
22
CN401
23
CN401
24
CN401
25
CN401
26
CN401
27
CN401
28
CN401
29
1
0
4
N
C
0
3
1
0
4
N
C3
1
CN401
32
CN401
33
CN401
34
CN401
35
CN401
36
CN401
37
CN401
38
CN401
39
CN401
40
CN401
41
CN401
42
CN401
43
CN401
44
CN401
45
CN401
46
CN401
47
CN401
48
CN401
49
CN401
50
CN401
51
CN401
52
CN401
53
CN401
54
CN401
55
CN401
56
CN401
57
CN401
58
CN401
59
CN401
60
R580
10k
1
2
3
45
6
7
8
R581
10k
1
2
3
45
6
7
8
+3.3V
R583
10k
1
2
3
45
6
7
8
R582
10k
1
2
3
45
6
7
8
+3.3V
R421
10
1
2
3
4
5
6
7
8
R439
10
1
2
3
4
5
6
7
8
R438
10
R453
10
R427
10
1
2
3
4
5
6
7
8
R441
10
1
2
3
4
5
6
7
8
R429
10
1
2
3
4
5
6
7
8
R443
10
1
2
3
4
5
6
7
8
R428
10
DG
C426
NC
C427
NC
C428
NC
C429
NC
C430
NC
C431
NC
DG
C432
NC
DG
C433
NC
DG
DG
R585
2.2k
DG
R584
2.2k
R586
2.2k
DG
DG
R589
10k
NC
+3.3V
R588
10k
NC
+3.3V
R591
10k
NC
R592
10k
NC
R593
10k
NC
R594
10k
NC
+3.3V
+3.3V
+3.3V
R596
10k
NC
R595
10k
NC
R510
10k
R502
10k
R496
10k
R511
10k
C435
1u
25
DG
R587
2.2k
C401
1000p
25
NC
C436
10u
25
C437
10u
6.3
DG
C439
10u
6.3
DG
C438
10u
25
DG
C440
2.2u
50
C441
NC
DG
C442
1000p
25
DG
C443
1000p
25
DG
C444
1000p
25
DG
C445
1000p
25
DG
C446
10u
25
DG
C447
10u
25
DG
C448
10u
6.3
DG
C449
2.2u
50
C450
10u
25
DG
C455
10u
6.3
DG
R598
1k
ERJ2GEJ102X
NC
L401
L402
L403
L501
L502
L503
SLIC_DHW
SLIC_UHW
R712
10
NC
R711
10
LDHW[0]
LDHW[1]
R713
10
R714
10
NC
HW_FH[1]
SLIC_HW_FH
R715
10
R716
10
NC
HW_FH[0]
HW_CLK[1]
SLIC_HW_CLK
R718
10
NC
HW_CLK[0]
R719
10
NC
LUHW[0]
LDHW[0]
CN402
41
CN402
3
CN402
57
CN402
13
CN402
62
CN402
12
CN402
30
CN402
20
CN402
29
CN402
61
CN402
11
CN402
22
CN402
69
CN402
55
CN402
24
CN402
6
CN402
15
CN402
70
CN402
72
CN402
48
CN402
60
CN402
21
CN402
14
CN402
67
CN402
37
CN402
64
CN402
10
CN402
53
CN402
42
CN402
2
CN402
28
CN402
9
CN402
74
CN402
47
CN402
80
CN402
49
CN402
58
CN402
18
CN402
25
CN402
4
CN402
71
CN402
8
CN402
38
CN402
36
CN402
77
CN402
46
CN402
32
CN402
33
CN402
45
CN402
68
CN402
27
CN402
78
CN402
39
CN402
31
CN402
44
CN402
40
CN402
1
CN402
59
CN402
17
CN402
19
CN402
56
CN402
50
CN402
63
2
0
4
N
C
6
2
2
0
4
N
C6
6
CN402
51
CN402
54
CN402
43
CN402
23
CN402
7
CN402
5
CN402
65
CN402
35
CN402
52
CN402
16
CN402
75
CN402
73
CN402
76
CN402
34
CN402
79
R473
10k
@NC
+3.3V
C457
180p
25
C456
2200p
50
R717
120
C470
0.1u
10
DG
+2.5VD
C471
0.1u
10
C477
0.1u
10
C475
0.1u
10
C472
0.1u
10
C467
0.1u
10
C476
0.1u
10
DG
C473
0.1u
10
C468
0.1u
10
C478
0.1u
10
DG
C474
0.1u
10
C469
0.1u
10
DG
DG
DG
R710
10
R700
1M
DG
+3.3V
R702
10k
NC
C466
0.1u
10
R709
0
+2.5VD
DG
C461 2.2u
6.3
C465
0.1u
10
C464
0.1u
10
IC700
1
ON/OFF
2
VSS
4
VIN
5
VOUT
3
SSC
C462 2.2u
6.3
DG
+3.3V
TP_+2.5VD
C463
0.1u
10
IC401
A5
NRD_I
A4
NWR_I
B2
HW4M2_I
K3
HW8K1_I
L4
HWDI1_I
K6
HWCK1_O
K7
HWFH1_O
K9
HWDO1_O
K8
NRST_DSP_O
E10
CARDEID3_I
B10
NCS_EXT1_O
D9
NCS_EXT2_O
A9
CARDID0_I
B9
CARDID1_I
A8
CARDID2_I
C8
CARDID3_I
C9
CARDEID0_I
D7
DIR_COT_O
B8
DIR_EXT_O
D6
NINT_EXT3_I
C6
NWAIT1_O
B5
NIRQ2_O
C4
NCS_DSP0_O
B4
NCS_DSP1_O
C3
NCS_DSP2_O
D5
NINT_EXT1_I
D3
NINT_EXT2_I
J5
LA22_I
G3
LA9_I
H3
LA8_I
F4
LA7_I
F2
LA6_I
E1
LA5_I
G2
LA4_I
F1
LA3_I
H2
LA2_I
G1
LA1_I
J2
LA0_I
H1
LD7_IO
K2
LD6_IO
J1
LD5_IO
L2
LD4_IO
M2
LD1_IO
L3
LD0_IO
K10
CARDEID1_I
F9
CARDEID2_I
D8
NINT_EXT4_I
C7
NINT_EXT5_I
B7
NINT_EXT0_I
C5
NCS_COT0_O
B6
NCS_PLD_I
F3
NCS_COT1_O
E2
NCS_COT2_O
E3
NCS1_I
G4
LA20_I
H4
LA21_I
K1
LD3_IO
L1
LD2_IO
IC401
M4
NIRQ_EX4_I
K4
RST_EX2_O
M5
RST_EX3_O
M6
CNT_DLC1_O
L6
CNT_DLC2_O
M7
CNT_DLC3_O
L7
CNT_RSYNC_O
M8
NRST_SLIC_O
L8
SCLK0_O
M9
S_CS0_O
L9
NIRQ_SL0_I
L10
NHALT_O
M10
S_CS1_O
J11
SDI_I
H10
SDO_O
H11
HWCK2_O
G10
HWFH2_O
H12
HWDO2_O
F10
SCLK1_O
F12
S_CS4_O
G9
NIRQ_SL4_I
E12
S_CS5_O
F11
NIRQ_SL5_I
D12
S_CS6_O
E11
NIRQ_SL6_I
C12
S_CS7_O
D11
NIRQ_SL7_I
C11
NIRQ_EX1_I
A7
FAN_STT_I
A6
NWAIT_EX_I
C2
HWDI2_I
D2
NIRQ_EX0_I
M11
NIRQ_SL1_I
J12
S_CS2_O
L12
NIRQ_SL2_I
L11
S_CS3_O
J10
NIRQ_SL3_I
B11
NIRQ_EX2_I
B12
RST_EX0_O
D10
RST_EX1_O
C10
CNT_PF0_O
A11
CNT_PF1_O
B3
NWAIT2_O
A3
NIRQ0_O
A2
NIRQ1_O
J3
HW4M1_I
B1
HW8K2_I
K5
NIRQ_EX3_I
L5
CNT_DLC0_O
IC401
G11
XO
G12
XI
D1
NRESET_I
M1
TEST1_I
M12
TEST2_I
A1
TEST0_I
IC401
G6
GND2
E6
GND1
G8
GND4
G7
GND3
F7
GND6
F6
GND5
F8
GND7
H7
GND9
H6
GND8
E7
GND10
A10
VDDIO1
C1
VDDIO2
K11
VDDIO3
K12
VDDIO4
M3
VDDIO5
E4
VDDCORE1
D4
VDDCORE2
E9
VDDCORE3
J4
VDDCORE4
J9
VDDCORE5
R701
1k
X400
24M
@NC
1
2
4
3
R720
10
R721
10
R722
10
R723
10
R724
10
R725
10
C458 10p 50
C459 10p 50
+3.3V
DG
C460
0.1u
10
@NC
R726
0
R727
0
R728
0
R729
0
R553
1k
PNERJ2GEJ102X
R706
0
R705
10k
R707
0
R704
10k
R708
0
R703
10k
DG
+3.3V
(CO)
(EXT)
NS500/520:0x0001
NS300/320:0x0010
NS700/720:0x0011
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
A[4]
A[5]
A[6]
A[7]
A[3]
A[2]
A[1]
A[0]
LDHW[2]
HW_CLK[2]
nHW_FH[2]
LUHW[2]
HW_CLK[3]
nHW_FH[3]
A[7]
A[6]
A[5]
A[4]
A[10]
A[8]
A[0]
A[1]
A[2]
A[3]
A[9]
D[0]
D[7]
D[1]
D[6]
D[2]
D[5]
D[3]
D[4]
A[9]
A[8]            A[10]
A[11]
nRST[1]
nINT[1]
nRST[0]
nINT[0]
nCS[1]
nREAD
nCS[0]
nWRITE
nWAIT
nHALT
RING_SYNC
nCS[1]
 nCS[0]
nREAD   nWRITE
nWAIT
nRST[0]
nRST[1]
nINT[0]
nINT[1]
NETREF
HW_CLK[5]
HW_CLK[6]
nHW_FH[6]
nHW_FH[4]
LDHW[4]
LDHW[3]
HW_CLK[4]
nHW_FH[5]
LUHW[4]
LUHW[3]
+15V
+15V
DG
PT_RXB0
LUHW0
+3.3VB
nRD
nRESET
nWAIT
N.C.
N.C.
DG
PT_RXA0
PT_RXB1      PT_RXA1
PT_TXB0      PT_TXA0
PT_TXB1      PT_TXA1
DG                     DG
LDHW0
LUHW1
LUHW2
LUHW3
LUHW4
LDHW1
LDHW2
LDHW3
LDHW4
nHW_FH1
nHW_FH0
nHW_FH3
nHW_FH2
nHW_FH5
nHW_FH4
nHW_FH6
HW_CLK0
HW_CLK2
HW_CLK1
HW_CLK4
HW_CLK3
HW_CLK5
HW_CLK6
NETREF
DG
DG
nAC_ALM
nDC_ALM
nWR
nCS
DG                     DG
INT0                INT1
DATA[0]
DATA[1]
DATA[2]
DATA[3]
DATA[4]
DATA[5]
DATA[6]
DATA[7]             A[0]
A[1]                   A[2]
A[3]                   A[4]
A[5]                   A[6]
A[7]                   A[8]
A[9]
A[10]
A[11]                 A[20]
A[21]                 A[22]
DG                     DG
1
1
1
1
1
1
1
KX-NS520 MOTHER BOARD No.7
23
Changed from Original Service Manual as section 12.3.
2.3.
CPU Board (KX-NS500)
2.3.1.
No.1
DDD3 CLK
DDD3 nCLK
C
E
B
A
D
F
3
6
4
2
5
8
7
DDR_A[12]
DDR_A[11]
DDR_A[9]
DDR_A[10]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[5]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[1]
DDR_A[0]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[11]
DDR_A[6]
DDR_A[10]
DDR_A[7]
DDR_A[9]
DDR_A[8]
DDR_A[12]
DDR_D[0-15]
DDR_A[14]
DDR_A[13]
DDR_A[13]
DDR_A[14]
DDR_D[7]
DDR_D[6]
DDR_D[5]
DDR_D[4]
DDR_D[2]
DDR_D[0]
DDR_D[3]
DDR_D[1]
DDR_D[0]
DDR_D[1]
DDR_D[2]
DDR_D[3]
DDR_D[4]
DDR_D[7]
DDR_D[6]
DDR_D[5]
DDR_D[15]
DDR_D[8]
DDR_D[13]
DDR_D[11]
DDR_D[12]
DDR_D[10]
DDR_D[9]
DDR_D[14]
DDR_A[5]
DDR_A[12]
DDR_D[14]
DDR_D[12]
DDR_D[15]
DDR_D[10]
DDR_A[8]
DDR_A[10]
DDR_A[0]
DDR_A[4]
DDR_A[1]
DDR_A[14]
DDR_D[8]
DDR_D[9]
DDR_D[11]
DDR_D[13]
DDR_A[6]
DDR_A[11]
DDR_A[7]
DDR_A[13]
DDR_A[9]
DDR_A[3]
DDR_A[2]
DDR_A[15]
DDR_A[15]
DDR_A[15]
DDR_A[12]
DDR_A[2]
DDR_A[6]
DDR_A[0]
DDR_A[7]
DDR_A[9]
DDR_A[8]
DDR_A[13]
DDR_A[10]
DDR_A[11]
DDR_A[4]
DDR_A[5]
DDR_A[3]
DDR_A[14]
DDR_A[1]
DDR_A[15]
DDR_A[0-15]
DG
+1.5V_DDR
DG
+1.5V_DDR
DG
DG
DG
DDR_VREF
C101
0.1u
16
C108
0.1u
16
DDR_VTT
R112
51
1
2
3
45
6
7
8
R110
51
1
2
3
45
6
7
8
R109
51
1
2
3
45
6
7
8
R111
51
1
2
3
45
6
7
8
R107
51
1
2
3
45
6
7
8
R106
51
2
1
3
45
6
8
7
C111
0.1u
16
+1.5V_DDR
C112
0.1u
16
C113
0.1u
16
+1.5V_DDR
C125
0.1u
16
C126
0.1u
16
C128
0.1u
16
C127
0.1u
16
CL101
CL102
CL103
CL104
CL105
CL106
CL107
CL108
CL109
CL110
CL111
CL112
CL113
CL114
CL115
CL116
C107
0.1u
16
C106
0.1u
16
C105
0.1u
16
C104
0.1u
16
C103
0.1u
16
C102
0.1u
16
C119
0.1u
16
C118
0.1u
16
C115
0.1u
16
C117
0.1u
16
C116
0.1u
16
C114
0.1u
16
C120
0.1u
16
R108
51
C109
10u
10
C110
10u
10
C122
10u
10
C121
10u
10
IC104
1
GND1
2
*SD
3
VSENSE
4
VREF
5
VDDQ
6
AVIN
7
PVIN
8
VTT
9
GND2
C131
10u
10
+1.5V_DDR
DG
C130
22u
6.3
DG
+3.3VD
C124
0.01u
50
C129
0.1u
16
T
T
V
_
R
D
D
F
E
R
V
_
R
D
D
C123
0.1u
16
R102
240
1
R105
240
1
T
T
V
_
R
D
D
_
P
T
F
E
R
V
_
R
D
D
_
P
T
R101
49.9
1
R104
49.9
1
R103
49.9
1
NT5CB256M8FN-DI
IC103
A0
K3
A1
L7
A2
L3
A3
K2
A4
L8
A5
L2
A6
M8
A7
M2
A8
N8
A9
M3
A10/AP
H7
A11
M7
A12/*BC
K7
NC3
F9
NC1
A3
NC2
F1
A14
N7
BA0
J2
BA1
K8
BA2
J3
*CS
H2
*RAS
F3
*CAS
G3
*WE
H3
ZQ
H8
*RESET
N2
*CK
G7
CK
F7
CKE
G9
ODT
G1
NC4
H1
DQ0
B3
DQ1
C7
DQ2
C2
DQ3
C8
DQ4
E3
DQ5
E8
DQ6
D2
DQ7
E7
DQS
C3
*DQS
D3
NF/*TDQS
A7
VDD1
A2
VDD2
A9
VDD3
D7
VDD4
G2
VDD5
G8
VDD6
K1
VDD7
K9
VDD8
M1
VDD9
M9
VDDQ1
B9
VDDQ2
C1
VDDQ3
E2
VDDQ4
E9
VERFCA
J8
VREFDQ
E1
VSS1
A1
VSS2
A8
VSS3
B1
VSS4
D8
VSS5
F2
VSS6
F8
VSS7
J1
VSS8
J9
VSS9
L1
VSS10
L9
VSS11
N1
NC5
H9
A13
N3
NC6
J7
VSS12
N9
VSSQ1
B2
VSSQ2
B8
VSSQ3
C9
VSSQ4
D1
VSSQ5
D9
DM/TDQS
B7
NT5CB256M8FN-DI
IC102
A0
K3
A1
L7
A2
L3
A3
K2
A4
L8
A5
L2
A6
M8
A7
M2
A8
N8
A9
M3
A10/AP
H7
A11
M7
A12/*BC
K7
NC3
F9
NC1
A3
NC2
F1
A14
N7
BA0
J2
BA1
K8
BA2
J3
*CS
H2
*RAS
F3
*CAS
G3
*WE
H3
ZQ
H8
*RESET
N2
*CK
G7
CK
F7
CKE
G9
ODT
G1
NC4
H1
DQ0
B3
DQ1
C7
DQ2
C2
DQ3
C8
DQ4
E3
DQ5
E8
DQ6
D2
DQ7
E7
DQS
C3
*DQS
D3
NF/*TDQS
A7
VDD1
A2
VDD2
A9
VDD3
D7
VDD4
G2
VDD5
G8
VDD6
K1
VDD7
K9
VDD8
M1
VDD9
M9
VDDQ1
B9
VDDQ2
C1
VDDQ3
E2
VDDQ4
E9
VERFCA
J8
VREFDQ
E1
VSS1
A1
VSS2
A8
VSS3
B1
VSS4
D8
VSS5
F2
VSS6
F8
VSS7
J1
VSS8
J9
VSS9
L1
VSS10
L9
VSS11
N1
NC5
H9
A13
N3
NC6
J7
VSS12
N9
VSSQ1
B2
VSSQ2
B8
VSSQ3
C9
VSSQ4
D1
VSSQ5
D9
DM/TDQS
B7
IC101
AM3352BZCZ60
I-AM3352ZCZ60-1
F3
DDR_A0
H1
DDR_A1
E4
DDR_A2
C3
DDR_A3
C2
DDR_A4
B1
DDR_A5
D5
DDR_A6
E2
DDR_A7
D4
DDR_A8
C1
DDR_A9
F4
DDR_A10
F2
DDR_A11
E3
DDR_A12
H3
DDR_A13
H4
DDR_A14
D3
DDR_A15
C4
DDR_BA0
E1
DDR_BA1
B3
DDR_BA2
M2
DDR_DQM0
J2
DDR_DQM1
G4
*DDR_RAS
F1
*DDR_CAS
B2
*DDR_WE
G2
*DDR_RESET
G1
DDR_ODT
H2
*DDR_CS0
G3
DDR_CKE
D2
DDR_CK
D1
*DDR_CK
J3
DDR_VTP
J4
DDR_VREF
L2
*DDR_DQS1
L1
DDR_DQS1
P2
*DDR_DQS0
P1
DDR_DQS0
M1
DDR_D15
L4
DDR_D14
L3
DDR_D13
K4
DDR_D12
K3
DDR_D11
K2
DDR_D10
K1
DDR_D9
J1
DDR_D8
P4
DDR_D7
P3
DDR_D6
N4
DDR_D5
N3
DDR_D4
N2
DDR_D3
N1
DDR_D2
M4
DDR_D1
M3
DDR_D0
CPU Cortex-A8
DRAM 256MB
DRAM 256MB
303MHz
confidential
VREF VTT
KX-NS500 CPU BOARD No.1
24
2.3.2.
No.2
NAND GP_D[7]
NAND RDY
NAND ALE
NAND *WE
NAND *RE
NAND *CS
SRAM D[8]
SRAM *WE
SRAM *OE
SRAM GP_A[1]
SRAM *CS
+
-
+
-
C
E
B
A
D
F
3
6
4
2
5
8
7
GP_D[7]
GP_D[6]
GP_D[5]
GP_A[0-21]
GP_D[4]
GP_D[3]
GP_D[2]
GP_D[1]
GP_D[0]
GP_D[0]
GP_D[1]
GP_D[2]
GP_D[3]
GP_D[7]
GP_D[4]
GP_D[5]
GP_D[6]
GP_D[15]
GP_D[14]
GP_D[12]
GP_D[13]
GP_D[8]
GP_D[10]
GP_D[9]
GP_D[11]
GP_O_D[1]
GP_O_D[6]
GP_O_D[7]
GP_O_D[2]
GP_O_D[4]
GP_O_D[0]
GP_O_D[3]
GP_O_D[5]
GP_O_D[8]
GP_O_D[9]
GP_O_D[11]
GP_O_D[14]
GP_O_D[13]
GP_O_D[12]
GP_O_D[15]
GP_O_D[10]
GP_O_A[15]
GP_O_A[5]
GP_O_A[2]
GP_O_A[0]
GP_O_A[11]
GP_O_A[8]
GP_O_A[3]
GP_O_A[14]
GP_O_A[10]
GP_O_A[7]
GP_O_A[6]
GP_O_A[4]
GP_O_A[13]
GP_O_A[1]
GP_O_A[12]
GP_O_A[9]
GP_O_A[19]
GP_O_A[18]
GP_O_A[17]
GP_O_A[16]
GP_D[0]
GP_D[1]
GP_D[3]
GP_D[2]
GP_D[5]
GP_D[6]
GP_D[7]
GP_D[4]
GP_D[9]
GP_D[15]
GP_D[10]
GP_D[11]
GP_D[13]
GP_D[14]
GP_D[8]
GP_D[12]
GP_A[0]
GP_A[1]
GP_A[2]
GP_A[3]
GP_A[4]
GP_A[5]
GP_A[6]
GP_A[7]
GP_A[8]
GP_A[9]
GP_A[10]
GP_A[11]
GP_A[12]
GP_A[13]
GP_A[14]
GP_A[15]
GP_A[16]
GP_A[17]
GP_A[18]
GP_A[19]
GP_A[6]
GP_A[5]
GP_A[4]
GP_A[3]
GP_A[2]
GP_A[1]
GP_D[8]
GP_D[9]
GP_D[11]
GP_D[10]
GP_D[13]
GP_D[15]
GP_D[12]
GP_D[14]
GP_A[14]
GP_A[15]
GP_A[17]
GP_A[16]
GP_A[18]
GP_A[5]
GP_A[4]
GP_A[2]
GP_A[1]
GP_A[3]
GP_A[6]
GP_A[7]
GP_A[8]
GP_A[10]
GP_A[9]
GP_A[13]
GP_A[12]
GP_A[11]
GP_D[7]
GP_D[6]
GP_D[4]
GP_D[5]
GP_D[0]
GP_D[2]
GP_D[1]
GP_D[3]
GP_D[0-15]
nCS0_NAND
GP_D[2]
GP_D[3]
GP_D[4]
GP_D[5]
GP_D[6]
GP_D[7]
GP_D[12]
GP_D[8]
GP_D[14]
GP_D[13]
GP_D[11]
GP_D[10]
GP_D[15]
GP_D[9]
GP_D[4]
GP_D[7]
GP_D[6]
GP_D[5]
GP_D[2]
GP_D[3]
GP_D[1]
GP_D[0]
GP_D[0]
GP_A[1]
GP_A[0]
GP_D[4]
GP_D[2]
GP_D[6]
GP_D[7]
GP_D[5]
GP_D[3]
GP_A[2]
GP_D[1]
GP_D[1]
GP_A[20]
GP_A[21]
GP_A[0-21]
nCS3_TRACE
GP_D[0]
nCS2_DSP_SRAM
nCS1_FPGA
GP_D[0-7]
nCS_SRAM
+15V
DG
DG
DG
DG
+3.3VD
DG
+3.3VD
DG
+3.3VD
DG
+3.3VD
DG
+15V
+3.3VD
DG
+3.3VD_B
+3.3V_BASE_BAT
+3.3VD
+3.3VD
DG
DG
+3.3VD
DG
DG
CN202
15
CN202
17
CN202
9
5
CN202
0
7
CN202
8
CN202
4
6
CN202
24
CN202
35
CN202
8
7
CN202
0
5
CN202
7
7
CN202
9
7
CN202
6
4
CN202
5
4
CN202
34
CN202
1
7
CN202
8
5
CN202
3
6
CN202
2
6
CN202
19
CN202
0
8
CN202
2
CN202
3
4
CN202
6
7
CN202
9
6
CN202
4
5
CN202
6
CN202
39
CN202
31
CN202
29
CN202
26
CN202
16
CN202
18
CN202
36
CN202
6
5
CN202
9
4
CN202
7
4
CN202
8
6
CN202
14
CN202
K1FB280D0001
52901-0874
1
CN202
12
CN202
7
CN202
3
7
CN202
22
CN202
20
CN202
4
7
CN202
32
CN202
28
CN202
4
CN202
5
7
CN202
2
7
CN202
3
5
CN202
11
CN202
30
CN202
1
4
CN202
7
6
CN202
37
CN202
9
CN202
13
CN202
3
CN202
6
6
CN202
10
CN202
25
CN202
4
4
CN202
33
CN202
1
6
CN202
2
5
CN202
2
4
CN202
23
CN202
21
CN202
38
CN202
8
4
CN202
7
5
CN202
5
CN202
5
6
CN202
40
CN202
5
5
CN202
27
CN202
0
6
CN202
1
5
CPU_TDI
003:1E
TDM0_DR_DSP
004:2D
DEBUG_SERIAL_TXD
003:4D
CPU_TMS
003:1E
LAN_RX_XP_DSP
003:8A
CPU_TDO
003:1E
DEBUG_SERIAL_RXD
003:4D
BAT_ALM_n
003:2D
FPGA_nCONFIG
003:4D
TDM0_CK_DSP
004:2D
FPGA_nSTATUS
003:4D
nWE
005:4E
TDM0_FS_DSP
004:2D
TDM0_DX_DSP
004:2D
CPU_nSRST
003:2C
LAN_TX_XP_DSP
003:8A
nRD
005:4F
LAN_TX_XM_DSP
003:8A
GP_A[0-21]
005:3C
CPU_TCK
003:1E
LAN_RX_XM_DSP
003:8A
R207
10k
1
2
3
45
6
7
8
C214
0.01u
16
NC
R257
10
1
2
3
45
6
7
8
R261
0
R208
10k
1
2
3
45
6
7
8
R210
10k
1
2
3
45
6
7
8
C212
0.1u
50
R263
0
C202
0.1u
16
R223
10
1
2
3
45
6
7
8
R209
10k
1
2
3
45
6
7
8
R213
10
R220
10
R222
10
2
3
1
45
8
6
7
R247
1k
C205
0.1u
16
R246
1k
R250
10
C208
0.1u
16
C213
100p
D203
R214
10
R254
10
1
2
3
45
6
7
8
R236
2.2k
R248
10
R234
10k
R226
10
1
2
3
45
6
7
8
R238
10k
R217
10
R265
10
R242
4.7k
R211
10
R202
10k
R259
0
R249
10
R252
10
1
2
3
45
6
7
8
R201
10k
R206
10
1
2
3
45
6
7
8
R251
10
1
2
3
45
6
7
8
R255
10
1
2
3
45
6
7
8
R218
10
C201
0.1u
50
C203
0.1u
16
R215
10
R228
10
R204
10
1
2
3
45
6
7
8
D201
1SS424(TPH3,F)
R203
10
1
2
3
45
6
7
8
R224
10
4
2
3
18
6
7
5
R227
10
R264
10
TP_BAT_ALM
C210
0.1u
16
R262
0
R219
10
R225
10
8
7
6
54
3
2
1
R256
10
1
2
3
45
6
7
8
TP_+3.3VD_B
D202
TP_3.3V_BAT
R212
10
R216
10
R241
10M
R253
10
1
2
3
45
6
7
8
R205
10
1
2
3
45
6
7
8
R260
0
C206
0.1u
16
R233
10k
+3.3VD
R235
10k
R240
1k
R237
10k
+3.3VD
R239
10k
DG
DG
R229
10k
+3.3VA_FROM_DSP
R231
10k
+3.3VD
PMIC_nPOR
003:2E;006:6E
DG
CPU_nTRST
003:2C
IC202
3
2
1
IC202
NJM2903M(TE1)
5
6
7
IC202
NJM2903M(TE1)
4
GND
8
VCC
nRESET_DSP_PHY
004:5D
nRESET_DSP
004:5D
R221
0
BUS_CLK_50MHz
003:2D
R232
10M
TDM1_DX_DSP
004:2D
TDM1_DR_DSP
004:2D
GP_D[0-7]
005:3B
CN201
10
CN201
6
CN201
2
CN201
40
CN201
31
CN201
39
CN201
25
CN201
26
CN201
5
CN201
4
CN201
13
CN201
33
CN201
27
CN201
17
CN201
9
CN201
28
CN201
7
CN201
21
CN201
19
CN201
3
CN201
20
CN201
38
CN201
11
CN201
52901-0474
@NC
1
CN201
30
CN201
12
CN201
15
CN201
32
CN201
24
CN201
34
CN201
16
CN201
37
CN201
14
CN201
22
CN201
8
CN201
23
CN201
35
CN201
18
CN201
36
CN201
29
IC206
EM643FV16FU-55LF
1
A4
2
A3
42
A7
43
A6
3
A2
44
A5
4
A1
41
*OE
5
A0
40
*UB
6
*CS
39
*LB
7
DQ0
38
DQ15
8
DQ1
37
DQ14
9
DQ2
36
DQ13
10
DQ3
35
DQ12
11
VCC1
34
VSS2
12
VSS1
33
VCC2
13
DQ4
32
DQ11
14
DQ5
31
DQ10
15
DQ6
30
DQ9
16
DQ7
29
DQ8
17
*WE
28
NC
18
A17
27
A8
19
A16
26
A9
20
A15
25
A10
21
A14
24
A11
22
A13
23
A12
+3.3VD_B
DG
DG
IC207
SN74LVC1G04DCKR
1
NC
2
A
3
GND
5
VCC
4
Y
IC208
SN74LVC1G32DCKR
1
A
2
B
3
GND
5
VCC
4
Y
C211
0.1u
16
C209
0.1u
16
*IC203
MT29F8G08ABACAWP-IT:C
1
NC1
2
NC2
46
NC23
47
DNU2
3
NC3
48
VSS4
4
NC4
45
NC22
5
NC5
44
IO7
6
NC6
43
IO6
7
R/*B
42
IO5
8
*RE
41
IO4
9
*CE
40
NC21
10
NC7
39
VCC4
11
NC8
38
DNU1
12
VCC1
37
VCC3
13
VSS1
36
VSS3
14
NC9
35
NC20
15
NC10
34
VCC2
16
CLE
33
NC19
17
ALE
32
IO3
18
*WE
31
IO2
19
*WP
30
IO1
20
NC11
29
IO0
21
NC12
28
NC18
22
NC13
27
NC17
23
NC14
26
NC16
24
NC15
25
VSS2
IC101
AM3352BZCZ60
I-AM3352ZCZ60-2
R1
GPMC_A0
R2
GPMC_A1
R3
GPMC_A2
R4
GPMC_A3
T1
GPMC_A4
T2
GPMC_A5
T3
GPMC_A6
T4
GPMC_A7
U5
GPMC_A8
R5
GPMC_A9
V5
GPMC_A10
R6
GPMC_A11
U1
GPMC_A12
U2
GPMC_A13
U3
GPMC_A14
U4
GPMC_A15
R13
GPMC_A16
V14
GPMC_A17
U14
GPMC_A18
T14
GPMC_A19
R14
GPMC_A20
V15
GPMC_A21
V6
*GPMC_CS0
U9
*GPMC_CS1
V9
*GPMC_CS2
T13
*GPMC_CS3
U18
*GPMC_BE1
T7
*GPMC_OE_RE
U6
*GPMC_WE
U17
*GPMC_WP
R7
*GPMC_ADV_ALE
T6
*GPMC_BE0_CLE
U13
GPMC_AD15
V13
GPMC_AD14
R12
GPMC_AD13
T12
GPMC_AD12
U12
GPMC_AD11
T11
GPMC_AD10
T10
GPMC_AD9
U10
GPMC_AD8
T9
GPMC_AD7
R9
GPMC_AD6
V8
GPMC_AD5
U8
GPMC_AD4
T8
GPMC_AD3
R8
GPMC_AD2
V7
GPMC_AD1
U7
GPMC_AD0
T17
GPMC_WAIT0
V12
GPMC_CLK
R230
0
CL_RXD
CL_TXD
R828
10k
+3.3VD
IC201
B82
LD_IO2
A84
LD_IO3
A85
LD_IO4
A86
LD_IO5
A79
LD_IO6
B83
LD_IO7
A81
NCS1_I
B79
NCS2_I
A80
NWAIT_O
B80
NRD_I
A83
NWR_I
IC201
A3
DSPID_I3
B3
DSPID_I2
A87
DSPID_I1
A88
DSPID_I0
A2
NCS_DSP_O1
B2
NCS_DSP_O0
B1
NIRQ_EXT_I3
B84
NIRQ_EXT_I4
A1
LD_IO1
A7
NCS_SRM_O
A8
LD_IO0
A5
CK50M
R268
10k
R269
10k
R270
10k
R271
10k
+3.3VD
R258
100
1
2
3
45
6
7
8
R266
100
R267
100
DG
LAN_RX_XM1
B40
DATA[2]
nHALT(reserved)
DG
DG
DG
LAN_RX_XP1
The PIN name is a name seen from CPU side.
DG
AD[5]
TDM0_FS_DSP
nCS_DSP[1]
LAN_TX_XM1
DG
AD[6]
DG
AD[3]
DSP_nRST
AD[4]
DATA[7]
TDM0_DR_DSP
DATA[10]
DG
(TDM1_CK)
+15V
DG
CARD_ID[2]
TDM0_DX_DSP
DATA[11]
DG
AD[2]
LAN_TX_XP1
DATA[13]
DG
nINT_DSP0
nCS_DSP[0]
nRST_PORT_PHY
A1
DATA[14]
TDM1_DX_DSP
AD[7]
DG
DSP_CON_No.
+3.3VA
DATA[12]
nINT_DSP1
DATA[8]
CARD_ID[4]
nBE[1]
DATA[15]
DATA[9]
TDM0_CK_DSP
DG
CARD_ID_nOE
(TDM1_FS)
nPRESNT
(DG)
DG
DG
nWE
DATA[6]
CARD_ID[3]
DG
CARD_ID[5]
TDM1_DR_DSP
N.C.
N.C.
CARD_ID[0]
DG
DATA[0]
CARD_ID[6]
B_CLK_66M
A40
DG
DG
B1
nBE[0]
DATA[4]
DATA[1]
+15V
DATA[5]
DATA[3]
AD[1]
CARD_ID[1]
DG
nRD
(No use)
CPU Cortex-A8
DSP CONNECTOR
SRAM 512MB
NC
NC
NAND 
1GB/512MB
(No use)
AUDATA3
JTAG_TCK
+3.3VD
TDO
DG
TDI
DG
nCONFIG
nASEBRK
 /BRKACK
MPMD
AUDSYNC
DG
TCK
JTAG_+2.5VD(nCS)
AUDATA1
N.C.
ASDI
AUDCK
HARD_nRESET_SW
nTRST
FPGA_nRESET(DATA)
RXD
AUDATA2
TMS
DG
JTAG_TMS
AUDATA0
+3.3VD
TXD
N.C.
nCE
DG
N.C.
DG
CONF_DONE
nRESET
DG
JTAG_TDO
DCLK
N.C.
DG
+3.3VD
JTAG_TDI
+3.3VD
nSRST
ICE CONNECTOR
nWR
nCS
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
N.C.
N.C.
N.C.
confidential
nCS_DSP1
nCS_DSS0
nINT_DSP0
nINT_DSP1
nWR_DSP_option
GPMC_WAIT1
ASIC
ASIC
NS300 : 512MB (C3FBVY000034)
NS500 : 1GB   (C3FBWY000029)
NS700 : 1GB   (C3FBWY000029)
KX-NS500 CPU BOARD No.2
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