Panasonic KX-NCP1104XJ (serv.man2) Service Manual ▷ View online
25
KX-NCP1104XJ
26
KX-NCP1104XJ
Total
Signals
Interface
Signals
Pin
Expansion Bus Interface Signal Name
Signal
Type
I/O
Type
Signal Description
Pin Compatible
Mode
Enhanced
Feature Mode
Software
Selected
Features
Selected
Features
Expansion Bus and SDRAM 1 Interface
1
1
AB22
Reserved
Reserved
I
Id/Ot4 Reserved. Internal pull-down. Leave open.
2
2
W06
EXP_A00
EXP_A00
O
I/Ot16 Expansion Bus Address [00]. EXP Bus Address out-
put. Connect to SDRAM and peripheral device
address input. Leave open if not used.
address input. Leave open if not used.
3
3
AA06
EXP_A01
EXP_A01
O
I/Ot16 Same as EXP_A00.
4
4
AB06
EXP_A02
EXP_A02
O
I/Ot16 Same as EXP_A00.
5
5
Y06
EXP_A03
EXP_A03
O
I/Ot16 Same as EXP_A00.
6
6
W07
EXP_A04
EXP_A04
O
I/Ot16 Same as EXP_A00.
7
7
AB18
EXP_A05
EXP_A05
O
I/Ot16 Same as EXP_A00.
8
8
W18
EXP_A06
EXP_A06
O
I/Ot16 Same as EXP_A00.
9
9
AA18
EXP_A07
EXP_A07
O
I/Ot16 Same as EXP_A00.
10
10
AA19
EXP_A08
EXP_A08
O
I/Ot16 Same as EXP_A00.
11
11
Y18
EXP_A09
EXP_A09
O
I/Ot16 Same as EXP_A00.
12
12
W19
EXP_A10
EXP_A10
O
I/Ot16 Same as EXP_A00. For 64 Mb and 128 Mb SDRAM,
A10 is sampled during a PRECHARGE command to
determine if all banks are to be precharged
(A10[HIGH]) or bank selected by BA0, BA1
(A10[LOW]).
determine if all banks are to be precharged
(A10[HIGH]) or bank selected by BA0, BA1
(A10[LOW]).
13
13
AB05
EXP_A11
EXP_A11
O
I/Ot16 Same as EXP_A00.
14
14
Y05
EXP_A12
EXP_A12
O
I/Ot16 Same as EXP_A00. Leave open if not used.
For 256 Mbit and 512 Mbit SDRAM, A12 is sampled
during a PRECHARGE command to determine if all
banks are to be precharged (A10[HIGH]) or bank
selected by BA0, BA1 (A10[LOW]).
during a PRECHARGE command to determine if all
banks are to be precharged (A10[HIGH]) or bank
selected by BA0, BA1 (A10[LOW]).
15
15
W20
EXP_A13
EXP_A13
O
I/Ot16 Same as EXP_A00. Leave open if notl used.
For 1 Gbit SDRAM, A13 is sampled during a PRE-
CHARGE command to determine if all banks are to
be precharged (A10[HIGH]) or bank selected by BA0,
BA1 (A10[LOW]).
CHARGE command to determine if all banks are to
be precharged (A10[HIGH]) or bank selected by BA0,
BA1 (A10[LOW]).
16
16
Y19
EXP_A14/BA0 EXP_A14/BA0
O
I/Ot16 Expansion Bus Address [14] or SDRAM Bank Select.
For example:
Connect EXP_A14/BA0 to SDRAM BA0.
Connect EXP_A14/BA0 to SDRAM BA0.
17
17
AA05
EXP_A15/BA1 EXP_A15/BA1
O
I/Ot16 Expansion Bus Address [15] or SDRAM Bank Select.
For example:
Connect EXP_A15/BA1 to SDRAM BA1.
Connect EXP_A15/BA1 to SDRAM BA1.
18
18
AB19
EXP_A16
EXP_A16
O
I/Ots8 Same as EXP_A00.
19
19
Y20
EXP_A17
EXP_A17
O
I/Ot16 Same as EXP_A00.
20
20
AA20
EXP_A18
EXP_A18
O
I/Ots8 Same as EXP_A00.
21
21
AA04
EXP_A19
EXP_A19
O
I/Ots8 Same as EXP_A00.
22
22
AB04
EXP_A20
EXP_A20
O
I/Ots8 Same as EXP_A00.
23
23
AB07
EXP_CAS#
EXP_CAS#
O
I/Ot16 SDRAM Column Address Strobe. CAS# is an active
low output used by the SDRAM to define the SDRAM
operation commands in conjunction with the RAS#
and WR# signals and is latched at the positive edge
of CLK. Connect to SDRAM CAS# pin.
operation commands in conjunction with the RAS#
and WR# signals and is latched at the positive edge
of CLK. Connect to SDRAM CAS# pin.
24
24
AB12
EXP_CLK
EXP_CLK
O
I/Ot16 Expansion Bus Clock Out. Clock output. Connect to
SDRAM CLK.
Note: EXP_CLK has 16 mA current drive, and no slew
rate control. It is recommended to include a series ter-
minating resistor at the output of this pin to avoid
undershoot and overshoot.
Note: EXP_CLK has 16 mA current drive, and no slew
rate control. It is recommended to include a series ter-
minating resistor at the output of this pin to avoid
undershoot and overshoot.
25
25
AB20
EXP_CLKE
EXP_CLKE
EXP_A21
O
I/Ots8 EXP_CLKE: Expansion Bus Clock Enable. Clock
enable output. Not used. Connect SDRAM CKE to a
pull-up resistor.
EXP_A21 is a Software Selected Feature. (Refer to
the “I/O Control Register” in the GPIO section.)
pull-up resistor.
EXP_A21 is a Software Selected Feature. (Refer to
the “I/O Control Register” in the GPIO section.)
26
26
Y12
EXP_RESERV
ED_1
ED_1
EXP_RESERV
ED_1
ED_1
O
I/Ot16 Reserved Output. Leave open, if not used.
27
27
AB02
EXP_CSBOOT
#
#
EXP_CSBOO
T#
T#
EXP_A22
O
I/Ots8 Expansion Bus Boot ROM Chip Select. External Boot
ROM Chip Select. Connect to Boot ROM chip select
input, or leave open if not used.
EXP_A22 is a Software Selected Feature. (Refer to
the “I/O Control Register” in the GPIO section.)
input, or leave open if not used.
EXP_A22 is a Software Selected Feature. (Refer to
the “I/O Control Register” in the GPIO section.)
27
KX-NCP1104XJ
28
28
Y17
EXP_CSSD0# EXP_CSSD0#
O
I/Ot16 Expansion Bus SDRAM Chip Select 0. Active low
SDRAM Chip Select 0. Connect to SDRAM CS# pin.
NOTE: SDRAM device chip select pin must be con-
nected to EXP_CSSD0# (i.e. it must not be connected
to ground).
NOTE: SDRAM device chip select pin must be con-
nected to EXP_CSSD0# (i.e. it must not be connected
to ground).
29
29
AB03
EXP_CSSD1# EXP_CSSD1#
O
I/Ot16 Expansion Bus General Purpose Chip Select. Active
low Chip Select. Connect to peripheral device CS#
pin, or leave open if not used.
pin, or leave open if not used.
30
30
AA03
EXP_CSP0#
EXP_CSP0#
O
Ots8 Expansion Bus General Purpose Chip Select. Active
low Chip Select. Connect to peripheral device CS#
pin, or leave open if not used.
pin, or leave open if not used.
31
31
AA08
EXP_DATA00
EXP_DATA00
I/O
I/Ot16 Expansion Bus Data [00]. Connect to SDRAM and
peripheral device Data pin.
32
32
Y08
EXP_DATA01
EXP_DATA01
I/O
I/Ot16 Same as EXP_DATA00.
33
33
AA09
EXP_DATA02
EXP_DATA02
I/O
I/Ot16 Same as EXP_DATA00.
34
34
Y09
EXP_DATA03
EXP_DATA03
I/O
I/Ot16 Same as EXP_DATA00.
35
35
AA10
EXP_DATA04
EXP_DATA04
I/O
I/Ot16 Same as EXP_DATA00.
36
36
Y10
EXP_DATA05
EXP_DATA05
I/O
I/Ot16 Same as EXP_DATA00.
37
37
AA11
EXP_DATA06
EXP_DATA06
I/O
I/Ot16 Same as EXP_DATA00.
38
38
Y11
EXP_DATA07
EXP_DATA07
I/O
I/Ot16 Same as EXP_DATA00.
39
39
AB08
EXP_DATA08
EXP_DATA08
I/O
I/Ot16 Same as EXP_DATA00.
40
40
W09
EXP_DATA09
EXP_DATA09
I/O
I/Ot16 Same as EXP_DATA00.
41
41
AB09
EXP_DATA10
EXP_DATA10
I/O
I/Ot16 Same as EXP_DATA00.
42
42
W10
EXP_DATA11
EXP_DATA11
I/O
I/Ot16 Same as EXP_DATA00.
43
43
AB10
EXP_DATA12
EXP_DATA12
I/O
I/Ot16 Same as EXP_DATA00.
44
44
W11
EXP_DATA13
EXP_DATA13
I/O
I/Ot16 Same as EXP_DATA00.
45
45
AB11
EXP_DATA14
EXP_DATA14
I/O
I/Ot16 Same as EXP_DATA00.
46
46
W12
EXP_DATA15
EXP_DATA15
I/O
I/Ot16 Same as EXP_DATA00.
47
47
W13
EXP_DATA16
EXP_DATA16
I/O
I/Ot16 Same as EXP_DATA00.
48
48
AB13
EXP_DATA17
EXP_DATA17
I/O
I/Ot16 Same as EXP_DATA00.
49
49
W14
EXP_DATA18
EXP_DATA18
I/O
I/Ot16 Same as EXP_DATA00.
50
50
AB14
EXP_DATA19
EXP_DATA19
I/O
I/Ot16 Same as EXP_DATA00.
51
51
W15
EXP_DATA20
EXP_DATA20
I/O
I/Ot16 Same as EXP_DATA00.
52
52
AA15
EXP_DATA21
EXP_DATA21
I/O
I/Ot16 Same as EXP_DATA00.
53
53
AB16
EXP_DATA22
EXP_DATA22
I/O
I/Ot16 Same as EXP_DATA00.
54
54
AA16
EXP_DATA23
EXP_DATA23
I/O
I/Ot16 Same as EXP_DATA00.
55
55
Y16
EXP_DATA24
EXP_DATA24
I/O
I/Ot16 Same as EXP_DATA00.
56
56
W16
EXP_DATA25
EXP_DATA25
I/O
I/Ot16 Same as EXP_DATA00.
57
57
Y15
EXP_DATA26
EXP_DATA26
I/O
I/Ot16 Same as EXP_DATA00.
58
58
AB15
EXP_DATA27
EXP_DATA27
I/O
I/Ot16 Same as EXP_DATA00.
59
59
Y14
EXP_DATA28
EXP_DATA28
I/O
I/Ot16 Same as EXP_DATA00.
60
60
AA14
EXP_DATA29
EXP_DATA29
I/O
I/Ot16 Same as EXP_DATA00.
61
61
Y13
EXP_DATA30
EXP_DATA30
I/O
I/Ot16 Same as EXP_DATA00.
62
62
AA13
EXP_DATA31
EXP_DATA31
I/O
I/Ot16 Same as EXP_DATA00.
63
63
Y07
EXP_DQM0
EXP_DQM0
O
I/Ot16 Expansion Bus Data Mask {3:0]. For example:
Connect EXP_DQM[3:0] to SDRAM DQM[3:0],
respectively.
respectively.
64
64
W08
EXP_DQM1
EXP_DQM1
O
I/Ot16 Same as EXP_DQM0.
65
65
AB17
EXP_DQM2
EXP_DQM2
O
I/Ot16 Same as EXP_DQM0.
66
66
W17
EXP_DQM3
EXP_DQM3
O
I/Ot16 Same as EXP_DQM0.
67
67
AA07
EXP_RAS#
EXP_RAS#
O
I/Ot16 SDRAM Row Address Strobe. RAS# is an active low
output used by the SDRAM to define the SDRAM
operation commands in conjunction with the CAS#
and WR# signals and is latched by the SDRAM at the
positive edge of CLK. Connect to SDRAM RAS# pin.
operation commands in conjunction with the CAS#
and WR# signals and is latched by the SDRAM at the
positive edge of CLK. Connect to SDRAM RAS# pin.
68
68
AB21
EXP_RD#
EXP_RD#
O
Ots8 Expansion Bus Read Enable. RD# is an active low
output used to enable data transfer from the selected
device to the EXP_DATA[31:00] lines. Not used with
SDRAM. Leave open if not used.
device to the EXP_DATA[31:00] lines. Not used with
SDRAM. Leave open if not used.
69
69
AA17
EXP_WE#
EXP_WE#
O
I/Ot16 Expansion Bus Write Enable. WR# is an active low
output used to enable data transfer from the
EXP_DATA[31:00] lines to the selected device. Con-
nect to SDRAM and peripheral device WE# pin.
EXP_DATA[31:00] lines to the selected device. Con-
nect to SDRAM and peripheral device WE# pin.
70
70
AA21
EXP_RESERV
ED_3
ED_3
EXP_RESERV
ED_3
ED_3
O
I/Ots8 Reserved Output. Leave open.
71
71
W2
EXP_CSP2#
EXP_CSP2#
O
I/Ots8 Same as EXP_CSP0#.
Total
Signals
Interface
Signals
Pin
Expansion Bus Interface Signal Name
Signal
Type
I/O
Type
Signal Description
Pin Compatible
Mode
Enhanced
Feature Mode
Software
Selected
Features
Selected
Features
28
KX-NCP1104XJ
72
72
W4
EXP_CSP1#
EXP_CSP1#
O
I/Ots8 Same as EXP_CSP0#.
73
73
V19
Reserved
GPIO20
I/O
I/Ots8 Reserved.
GPIO20: General Purpose I/O 20. Connect to pull-up
if not used.
if not used.
74
74
V20
Reserved
GPIO21
I/O
I/Ots8 Reserved.
GPIO21: General Purpose I/O 21. Connect to pull-up
if not used.
if not used.
75
75
W22
Reserved
GPIO22
I/O
I/Ots8 Reserved.
GPIO22: General Purpose I/O 22. Connect to pull-up
if not used.
if not used.
76
76
Y22
Reserved
GPIO23
I/O
I/Ots8 Reserved.
GPIO23: General Purpose I/O 23. Connect to pull-up
if not used.
if not used.
77
77
D19
Reserved
Reserved
O
I/Ots8 Reserved. Output. Leave open.
78
78
D20
Reserved
Reserved
O
I/Ots8 Reserved. Output. Leave open.
79
79
AA12
EXP_RESERV
ED_2
ED_2
EXP_RESERV
ED_2
ED_2
I
Iu/
Ots8
Reserved Input. Internal pull-up. Leave open.
Total
Signals
Interface
Signals
Pin
PCI &
µP Bus Interface Signal Name Pin Com-
patible Mode and Enhanced Feature Mode
Signal
Type
I/O Type
Signal Description
PCI Bus -
Peripheral
Mode
PCI Bus - Host
Mode
uP Bus Mode
80
1
AA22
HBMODE# (=
1)
1)
HBMODE#
(=1)
(=1)
HBMODE#
(=0)
(=0)
I
Iu/Ot4
HBMODE# - Microprocessor Bus Mode Select. Low
active. Connect to GND to select Microprocessor
Bus Host Interface Mode. Internal pull-up selects
PCI Bus by default.
active. Connect to GND to select Microprocessor
Bus Host Interface Mode. Internal pull-up selects
PCI Bus by default.
81
2
AA02
PCI_HOST# (=
1)
1)
PCI_HOST#
(=0)
(=0)
HB_BURST_
EN#
EN#
I
Iu/Ot4
PCI_HOST# - PCI Host Mode Select. Low active.
Internal pull-up selects PCI Peripheral Mode by
default. Connect to GND to select PCI Host Mode.
HB_BURST_EN# - Microprocessor Bus Burst
Enable.
HB_BURST_EN# = 0 enables Burst Mode. In Burst
Mode, multiple data transfers can follow the transi-
tion of HBCS# = 0. When HB_BURST_EN# = 1,
Burst Mode is not enabled and only one data trans-
fer, either 8-bit, 16-bit, or 32-bit can follow the transi-
tion of HBCS# = 0. When HB_BURST_EN# = 0, the
interface is said to be in Burst Mode, and when
HB_BURST_EN# = 1, in Non-burst Mode. (default
high with internal pull-up).
Internal pull-up selects PCI Peripheral Mode by
default. Connect to GND to select PCI Host Mode.
HB_BURST_EN# - Microprocessor Bus Burst
Enable.
HB_BURST_EN# = 0 enables Burst Mode. In Burst
Mode, multiple data transfers can follow the transi-
tion of HBCS# = 0. When HB_BURST_EN# = 1,
Burst Mode is not enabled and only one data trans-
fer, either 8-bit, 16-bit, or 32-bit can follow the transi-
tion of HBCS# = 0. When HB_BURST_EN# = 0, the
interface is said to be in Burst Mode, and when
HB_BURST_EN# = 1, in Non-burst Mode. (default
high with internal pull-up).
82
3
AB01
Reserved
PCI_REQ2#
HB_BUS_SI
ZE0
ZE0
I
Iu/Ot4
Reserved in PCI Bus - Peripheral mode.
PCI_REQ2#: Request. REQ# is used to indicate to
the arbiter that this agent desires use of the bus.
Connect to PCI Bus: REQ#.
HB_BUS_SIZE0: Microprocessor Bus Size [1:0].
Specifies the width of the external microprocessor
data bus. When the bus width is less than 32 bits,
the upper un-connected HBD signals will be driven
low all the time.
11 or 10 = 32-bit data bus. (11 is default due to inter-
nal pull-ups)
01 = 16-bit data bus.
00 = 8-bit data bus.
PCI_REQ2#: Request. REQ# is used to indicate to
the arbiter that this agent desires use of the bus.
Connect to PCI Bus: REQ#.
HB_BUS_SIZE0: Microprocessor Bus Size [1:0].
Specifies the width of the external microprocessor
data bus. When the bus width is less than 32 bits,
the upper un-connected HBD signals will be driven
low all the time.
11 or 10 = 32-bit data bus. (11 is default due to inter-
nal pull-ups)
01 = 16-bit data bus.
00 = 8-bit data bus.
83
4
B21
Reserved
PCI_GNT2#
HB_BUS_SI
ZE1
ZE1
I
Iu/Ot8
Reserved in PCI Bus - Peripheral mode.
PCI_GNT2#: Grant. GNT# is used to indicate to the
agent that access to the bus has been granted. Con-
nect to PCI Bus: GNT#.
HB_BUS_SIZE1: Same as HB_BUS_SIZE0
PCI_GNT2#: Grant. GNT# is used to indicate to the
agent that access to the bus has been granted. Con-
nect to PCI Bus: GNT#.
HB_BUS_SIZE1: Same as HB_BUS_SIZE0
84
5
D18
PCI_AD00
PCI_AD00
HBD00
I/O
I/
Opsts33
Opsts33
PCI_AD00: PCI Address / Data [00]. Connect to PCI
Address / Data Bus [00].
HBD00: Microprocessor Bus Data Bits [31:0]. Con-
nect to Microprocessor Bus Data Bits [31:0].
HBD[31] is the most significant bit of the data bus,
and HBD[0] is the least significant bit of the data
bus. HB_BUS_SIZE_[1:0] specifies the data bus.
Address / Data Bus [00].
HBD00: Microprocessor Bus Data Bits [31:0]. Con-
nect to Microprocessor Bus Data Bits [31:0].
HBD[31] is the most significant bit of the data bus,
and HBD[0] is the least significant bit of the data
bus. HB_BUS_SIZE_[1:0] specifies the data bus.
Total
Signals
Interface
Signals
Pin
Expansion Bus Interface Signal Name
Signal
Type
I/O
Type
Signal Description
Pin Compatible
Mode
Enhanced
Feature Mode
Software
Selected
Features
Selected
Features
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