DOWNLOAD Panasonic UF-8300 / UF-8200 / UF-7300 / UF-7200 (serv.man2) Service Manual ↓ Size: 7.6 MB | Pages: 127 in PDF or view online for FREE

9

UF-7300/7200

UF-8300/8200

(A) This block is the Serial Communication Interface with the Engine CPU (IC504).
(B) This block is the Stepping Motor Controller (CH1) to control the 2nd Paper Feeder Motor.

(C) This block is the LSU Controller, and it consists of Laser Enable, Power Adjust and Video Data.

The Printer system clock (12.00MHz) is generated by IC400 and X401, and it is supplied to the Engine CPU 
(IC504) and ASIC (IC402).

The Scanner system clock (15.975MHz) is generated by X100 and the inner circuit of the Scanner CPU 
(IC102).

nCS
SCLK
SDI
SD0

SM1A
 
nSM1EN

nLDEN
nADJUST
nVIDEO

LD5VSW
nRST

VDD
VSS
GND
nTRST

(A)

(B)

(C)

Chip Select
Serial Clock
Serial Input Data
Serial Output Data

Motor Clock 

Motor Enable

Laser Enable
Laser Power Adjust
Video Data Output

Power Supply Unit Detect
System Reset

+5V

1

7

X401

12.00 MHz

C407

C406

2

R402

C400

22

X0

IC504

(Engine CPU)

R404

6

3

CLKI

IC402

(ASIC)

R405

X100

15.975 MHz

C103

C101

15

13

XIN

XOUT

(Scanner CPU)

R104

R135

R136

IC102

R137

10

UF-7300/7200

UF-8300/8200

Reset signal is generated when the 5VDC Power Supply Voltage drops below 4.2VDC, or when the signal 
pPRTRST or pSCNRST goes high. The reset circuit initializes the CPUs (IC504, IC102), and the ASIC 
(IC402).
Approx. 100~800 ms after turning On the power, Pin4 of Reset IC (IC501, IC100) goes High.

19

6

nRST

IC504

IC402

R516

Q701

C520

C519

C517

3

4

1

2

IC501

VDD

OUT

GND

CD

nRESET

pPRTRST

(Reset Signal from SC PC Board)

100-800 ms

5V
4.2V

5V

0V

0V

VDD
(Pin2 of Reset IC)

RESET Signal
(Pin4 of Reset IC)

12

nRESET

IC102

R108

Q700

C107

C105

C102

3

1

2

IC100

+5V

+5V

VDD

OUT

GND

CD

pSCNRST

(Reset Signal from SC PC Board)

11

UF-7300/7200

UF-8300/8200

The Main Motor Control Signals are as follows:

nMMCTL

This is the Main Motor Control Signal.

nMMLD

The Main Motor rotates 1908.35 or 954.18 rpm. This is a low level signal 
while the Motor rotates 1908.35 (or 954.18) rpm ± 6.25%.

nMMHALF

Main Motor rotation speed selection.
H: 1908.35 rpm, L: 954.18 rpm

R621

R619

+5V

Q605

34

26

P26

P16

Q604

25

P27

IC006

(Engine CPU)

Main Motor

nMMCTL

nMMHALF

nMMLD

+24VIR

+24V

Right Cover Safety Interlock SW

CN737

3

1

1, 2

5

7

6

CN726

12

UF-7300/7200

UF-8300/8200

The Laser Unit consists of Laser Drive Circuit and LSU Motor Drive Circuit.
Laser control signals are as follows.

nVIDEO:

This is actual data being printed.

nLDON:

When the nLDON signal is Low, the Laser Unit is activated.
When OPC Drum Unit is not installed, the Laser Unit is deactivated.

nHSYNC:

This is the horizontal synchronizing signal sent from the Timing Sensor (Laser Beam 
Detect Sensor) which detects the horizontal position of the Laser Beam across the 
drum.

nADJUST:

When the nADJUST signal is Low, APC (Auto Power Control) is activated.

nSNRCTL:

This is the LSU Motor Control Signal.

nSNRLD:

The PLL (Phase Locked Loop) maintains the LSU Motor speed at approx. 26K rpm.
When the SNRLD is Low, the LSU Motor rotates (approx. 26K rpm).

nSNRCLK:

This is the LSU Motor reference clock (approx. 2.6KHz).

nVIDEO

nLDON
nHSYNC
nADJUST

nVIDEO

nLDEN

nBD

nADJUST

Laser
Diode

Toner Cartridge

LSU
Motor

IC402

IC006

(Engine CPU)

GND(+24V)

50

5

36

30

R422

+24V

GND (+24V)

nSNRCTL

nSNRLD

nSNRCLK

+24V

SNRCLK

SNRCTL

nPUNIT

nSNRLD

R523

Q509

Q510

C523

C421

C418

C420

PPG02

P14

P52

P30

R520

69

67
66
68

L400

C419

R409

R419

R407

R408

IC407

R522

+5VSP

C530

C527

IC401

C427

C531

R532

R533

(ASIC)

Sensor