DOWNLOAD Panasonic UF-8300 / UF-8200 / UF-7300 / UF-7200 (serv.man2) Service Manual ↓ Size: 7.6 MB | Pages: 127 in PDF or view online for FREE

5

UF-8300/8200
UF-7300/7200

 Recording Control

Ten Key

One Touch Key

Power PC405EP
133MHz

LCD

128x32

SIO
2ch

PCIC

INTC

MAC

0

ISIS2

PCIC

PCI BUS

PRINT

ATC

DRAMC

DRAMC

SCAN

SDRAM

256Mbit ( x 16)

SDRAM

128Mbit ( x 16)

Super

PYXION2

PWM

PM1075

INTC

RESET

V850ES/KG1

CPU

M16C/62

SubCPU

8MHz

8

DRAMC

FROM(BOOT)

4Mbit ( x 8)

EXBUS

8

32

PLL

10Base-T/

100Base-Tx

CSS I/F

SIO
2ch

32.768KHz

GoldCap

PLL

SYSTEM

JTAG

1284

PLL

IMAGE

RST

PCICLK3

nINTSDRIIC(Not Mounted)

nINTPCI0 ISIS

nINTOPIIC(Not Mounted)

GPIO

IIC

EEPROM(MAC)

 FM93C46

JTAG

JTAG

RS-232

SDRAM

256Mbit(

16)

16MB

32MB

16P

CSS I/F

DONGLE

I/F

SDRAM

256Mbit(

16)

USB

1.1

USB-B

PC I/F

8

SYSTEM

RESET

I/O

33.1776MHz

CLOCK

 GEN

16.5888MHz

CLK

BUFFER

15.975MHz

CLOCK

GEN

KEY

KEY

+5V
+5Vp
+24V

Speaker

MODEM

Analog

RTC

PHY

25MHz

CODEC

PCICLK1

PCICLK3

nINTISIS ISIS

nINTATA ISIS

JCLK

LCDI/F

LD

PM

17.341375MHz

5V

24V

(ISIS2)

5Vp

AFE

AK8412

10

CS0

16

KME-ASIC

FA

N

SOL

Pick Up Solenoid

Peper

D

Sensor

12MHz

EEPROM

2kbit

CPU

ROM

16KB

RAM

512KB

Regist

Sensor

Exit

Sensor

No Paper

Sensor

SOL

Regist Solenoid

2nd

Feeder

I/F

nINTISIO1 ISIS
nINTISIO0 ISIS

GPT

3.3V

DC/DC

1.8V

DC/DC

1.5V

DC/DC

(PPC/SP2)

1/2

16.5888MHz

LED

LED

FROM(Program)

 64Mbit(

16) or

 32Mbit(

16)

FROM(Image)

 

 32Mbit(

16)

16

API2

SD Controller

MAC

1

SC/FXB/G3/PNL

SDCMCLK

SDCMCLK

33.1776MHz

Sensor

LED

SC

/

 
             

 BU

Scanner
G3B(OPTION)

 BU

B

CPU

MODEM

16.5888MHz

SREFCLK

SREFCLK

32MHz

RS-232

SOL

4

ADM

ADM

RESET

DL515-04UH (DYNA)

LED

THERMISTOR

Fuser Lamp

THERMOSTAT

INLET

Door SW

NW_OP

Moter

2

 Feede

Moter

SOL

P

U

Solenoid

LAN

I/F
CN

SYSCLK

16

PNL SERIAL

PNL SERIAL

LED

SLPKEY

/

PNL

I/F

64MB

IIC BUS

Moter

DRUM

CDC

TDC

No Paper

Sensor

5VA

SC PS

Scanner
IIC BUS

SERIAL

ENGINE
SERIAL

PRINTER I/F

SC I/F

I/F

ADF

I/F

+24V   2.6A
+5V     2.5A
+5Vp    0.1A

SCANNER I/F

SC I/F

SC PS

Cassette

Sensor

Jam Cover

Sensor

Toner

Empty

Sensor

Cassette

Sensor

CIS I/F

3.3V

+5V
+5Vp

MJR

/

+3.3V
+5V
+5Vp

G3B

I/F

With Power Switch is
GSA model only

Reg.

5VA

48MHz

(Interlock SW)

Controller

PNL2 PCB

PNL3 PCB

PNL4 PCB
Active/Alarm/
Data

PNL Control

Energy Saver 
Control

PNL1 
PCB

Energy Saver

Energy Saver

Energy Saver

Reversion Signal

Reversion
Signal

Scanner Reversion Signal

Reversion
Signal

Line Monitor
Alarm

Line

Line

Telephone

Ring

Ring

Line
Reversion 
Signal

64Mbit(

16) or

Debug PC

Not Mounted

Synchronous

Synchronous

ENGINE

3   5 Change
3   5 Change

Sort Memory

Page Memory

Document Sensor

Document Sensor

Document Eject Sensor
Read Point Sensor
ADF Door Sensor

STAMP Solenoid

(OPTION)

ADF Motor

PH Motor

LSU unit

PH 
Motor 
Driver

ADF 
Motor 
Driver

Printer

Power supply unit

(Cartridge detection)

 Reading Control

6

UF-8300/8200
UF-7300/7200

7

UF-7300/7200

UF-8300/8200

1. System CPU

The System CPU (PPC405EP) is a 32-bit RISC (Reduced Instruction Set Computer) type of CPU and
EBC Control (ROM/SRAM), PC133 SDRAM Control, PCI Control, DMA Control, Serial Communication 
Port, Timer, Interrupt Control, Ethernet MAC and IIC Control are integrated into 1 chip. 
The EBC is connected to the Power-on Boot space. The 405 processor will begin with an initial fetch to 
address 0xFFFFFFFC. The EBC is setup to respond to this Boot address and the request will go to 
bank 0. This bank must have a ROM attached with the Boot code to begin the processor execution.

• EBC Control

A peripheral bus control, used to transfer data between the following devices.
Boot ROM (IC22)
Main Program F-ROM (IC19)
System Backup F-ROM (IC18)
API2 (IC11)
MODEM (IC61)
SD Controller (IC42)

• SDRAM Control

Generates High Speed SDRAM Control Signal and Refresh Control when the power is ON.

• PCI Control

A PCI control bus, used to transfer data between the following devices.
Imaging ASIC (ISIS2) (IC17)

• DMA Control

A 4-ch DMA Control, used for memory and UARTs.

• Serial Communication Port (UART)

A 2-ch Serial Communication Port, used to interface the following devices.
CPU: Panel Unit (Panel CPU)
CSS Debug Port for PC

• Timer Control

Used to program the standard timer.

• Interrupt Control

Controls the reception & transfer to CPU the interrupt from ISIS2, Modem, etc.

• Ethernet MAC

Supports Auto-sensing 10Base-T/100Base-TX, full / half duplex modes.

• IIC Control

A 1-ch IIC Port, used to interface the following devices.
SPC PC Board Sub CPU (M16C)
G3B PC Board CPU (SH)

8

UF-7300/7200

UF-8300/8200

2. System Memory

Consists of the following memory.

<UF-8300/8200>

• F-ROM (IC19: 4MB) used for Main programming.
• F-ROM (IC18,19: 8MB+4MB) used for Main Program System Backup and Data Image Memory.

<UF-7300/7200>

• F-ROM (IC19: 4MB) used for Main Program System Backup and Data Image Memory.
• F-ROM (IC18: 4MB) used for System Backup and Data Image Memory.
• SDRAM (IC13, 14, 29, 30) contains the Programs for System Backup and Data Image Memory.

Boot Program and the Main Program execute this Memory.

• F-ROM (FRM8: 8MB) used for Optional PCL Programming.

During a Blackout, backs up the Program.
This program can be rewritten via a Network.

3. Optional System Memory

The Optional Memories are:

• SD Card 

→ SD Card (32M-2GB) Image Data Memory expansion

During a Blackout, backs up the image data.
This program can be rewritten by rebooting the main program from this card.The program can be 
backed up to this card.

4. Image Control Gate Array (ISIS2) (IC17)

ISIS2 is an Image Control Gate Array and provides the CPU peripheral function.

• Scan Data Control

Used to control data transfer via Super PYXION2 (IC26).

• Print Data Control

Used to control data transfer via Pixel Magic (IC37).

•  Image Control

Controls receipt & transfer with ISIS2 for Image Sort and GDI Driver, which includes the JBIG 
Conversion.

•  USB Interface Control

USB 1.1 is supported.

5. I/O Port (APl2)

Used to control lines and reset control around LSI, etc.