Panasonic DMC-LC43PP / DMC-LC43PM / DMC-LC43E / DMC-LC43B / DMC-LC43A / DMC-LC43EN / DMC-LC43KR (serv.man2) Service Manual ▷ View online
7.1. IC3002 V-CCD DRIVE
Pin
No.
Signal Name
I/O
Description
1
CH4
I
Electric charge read pulse input
2
CH5
I
Electric charge read pulse input
3
ISUB
I
Unnecessary electric charge sweep out
pulse output
pulse output
4
VH
I
High level input for high voltage system
5
VHH
I
High level input for high voltage system
6
VL
I
Low level input for high voltage system
7
VM
I
Middle level input for high voltage
system
system
8
OSUB
O
Unnecessary electric charge sweep out
pulse output
pulse output
9
OV6
O
2 values transmit pulse output (VM,VL)
10
OV8
O
2 values transmit pulse output (VM,VL)
11
OV7
O
3 values transmit pulse output
(VH,VM,VL)
(VH,VM,VL)
12
OV4
O
2 values transmit pulse output (VM,VL)
13
OV5
O
3 values transmit pulse output
(VH,VM,VL)
(VH,VM,VL)
14
OV3
O
3 values transmit pulse output
(VH,VM,VL)
(VH,VM,VL)
15
OV2
O
2 values transmit pulse output (VM,VL)
16
OV1
O
3 values transmit pulse output
(VH,VM,VL)
(VH,VM,VL)
17
VM
I
Middle level input for high voltage
system
system
18
VL
I
Low level input for high voltage system
19
VDC
I
High level input for loe voltage system
20
IV1
I
Electric charge transmit pulse input
21
CH1
I
Electric charge read pulse input
22
IV3
I
Electric charge transmit pulse input
23
CH2
I
Electric charge read pulse input
24
CH3
I
Electric charge read pulse input
25
IV2
I
Electric charge transmit pulse input
26
IV4
I
Electric charge transmit pulse input
27
IV6
I
Electric charge transmit pulse input
28
IV5
I
Electric charge transmit pulse input
7.2. IC3004 CDS/AGC/AD/TG
Pin
No.
Signal Name
I/O
Description
1
D5
O
Data output
2
D6
O
Data output
3
D7
O
Data output
4
D8
O
Data output
5
D9
O
Data output
6
D10
O
Data output
7
D11
O
Data output (MSB)
8
DRVDD
-
Power supply for data output
9
DRVSS
-
GND for data output
10
NC
-
No Connection
11
NC
-
No Connection
12
VSUB
O
V-SUB bias output
13
SUBCLK
O
V-SUB clock output
14
V1
O
CCD vertical transmit pulse 1 output
15
V2
O
CCD vertical transmit pulse 2 output
16
V3
O
CCD vertical transmit pulse 3 output
17
V4
O
CCD vertical transmit pulse 4 output
18
V5
O
CCD sensor gate pulse 1 output (V5)
19
V6
O
CCD sensor gate pulse 2 output (V6)
20
VSG1
O
CCD sensor gate pulse 3 output (V7)
21
VSG2
O
CCD sensor gate pulse 4 output (V8)
22
VSG3
O
CCD sensor gate pulse 5 output
Pin
No.
Signal Name
I/O
Description
23
VSG4
O
CCD sensor gate pulse 6 output
24
VSG5
O
CCD sensor gate pulse 7 output
25
NC
-
No Connection
26
NC
-
No Connection
27
H1
O
CCD horizontal transmit pulse 1 output
28
H2
O
CCD horizontal transmit pulse 2 output
29
HVSS
-
H1-H4 driver GND
30
HVDD
-
H1-H4 driver power supply
31
H3
O
CCD horizontal transmit pulse 3 output
32
H4
O
CCD horizontal transmit pulse 4 output
33
RGVSS
-
RG driver GND
34
RG
O
RG reset gate clock
35
RGVDD
-
RG driver power supply
36
TCVSS
-
GND
37
TCVDD
-
Power supply
38
CLO
-
Clock output (Not used)
39
CLI
I
Clock input
40
AVDD
-
Analog power supply
41
AVSS
-
Analog GND
42
AVSS
-
Analog GND
43
REFT
O
Reference voltage maximum output
44
REFB
O
Reference voltage minimum output
45
NC
-
No Connection
46
NC
-
No Connection
47
SL
I
Serial communication load pulse input
48
SDI
I
Serial communication data input
49
SCK
I
Serial communication clock input
50
MSHUT
O
Mechanical shutter pulse output
51
STROBE
O
Strobe pulse output
52
SYNC
I
SYNC input
53
VD
O
VD output
54
DVSS
-
Digital GND
55
DVDD
-
Digital power supply
56
HD
O
HD output
57
DCLK
-
Digital clock output (Not used)
58
NC
-
No Connection
59
NC
-
No Connection
60
D0
O
Data output (LSB)
61
D1
O
Data output
62
D2/SDO
O
Data output/Serial data output
63
D3
O
Data output
64
D4
O
Data output
7.3. IC4001 LCD COLOR DRIVER
Pin
No.
Signal Name
I/O
Description
1
VDD1
-
Oscillation cell power supply (3V)
2
RPD
O
Phase comparison output
3
VSS1
-
Oscillation cell GND
4
TEST4
I
Oscillation cell input
5
TEST5
O
Oscillation cell output
6
LOAD
I
Serial bus load input
7
DATA
I
Serial bus data input
8
SCLK
I
Serial bus clock input
9
TEST8
I
Test terminal 8
10
TEST3
I
Test terminal 3
11
VDD2
-
Digital power supply (3V)
12
VDDO
-
Digital output system power supply (3V)
13
BLSW
-
Not used
14
BLHD
-
Not used
15
HD
-
Not used
16
VSSO
-
Digital output system GND
17
XSTH
O
H start pulse output (invert)
7 I/O CHART
29
DMC-LC43PP / DMC-LC43PM / DMC-LC43E / DMC-LC43B / DMC-LC43A / DMC-LC43EN / DMC-LC43KR
Pin
No.
Signal Name
I/O
Description
18
STH
O
H start pulse output
19
CKH2
O
H clock 2 pulse output
20
CKH1
O
H clock 1 pulse output
21
TEST6
O
Test terminal 6
22
TEST7
O
Test terminal 7
23
XDSG
O
Drain preserve timming pulse output
(invert)
(invert)
24
DSG
O
Drain preserve timming pulse output
25
XSTV
O
V start pulse output (invert)
26
STV
O
V start pulse output
27
CKV2
O
V clock 2 pulse output
28
CKV1
O
V clock 1 pulse output
29
XENB
O
Enable pulse output (invert)
30
ENB
O
Enable pulse output
31
VD
O
Enable pulse output (positive polarity)
32
VSS2
-
digital GND
33
SHIN
I
Test input
34
CSVO
O
Vertical scan change (open collector
output)
output)
35
CSHO
O
Horizontal scan change (open collector
output)
output)
36
FBCOM
O
Time of the object for an opposite-poles
output DC return
output DC return
37
GNDCOM
-
Opposite-poles output GND
38
COMOUT
O
Opposite-poles output
39
VCCCOM
-
Opposite-poles output power supply
(7V)
(7V)
40
BOUT
O
B output
41
FBB
O
B for an opposite-poles output DC
return
return
42
GND2
-
7V GND
43
GOUT
O
G output
44
FGB
O
G for an opposite-poles output DC
return
return
45
ROUT
O
R output
46
FRB
O
R for an opposite-poles output DC
return
return
47
VCC2
-
7V power supply
48
SIGCENT
I
R,G,B,COM,DSD output current for an
opposite-poles output DC return
opposite-poles output DC return
49
VCC1
-
Analog 3V power supply
50
DSDOUT
O
Drain preserve data output
51
NC
-
NC
52
VREG
-
Reference power supply
53
RIN
I
R signal input
54
GIN
I
G signal input
55
BIN
I
B signal input
56
RESET
I
System reset
57
SYNC IN
I
Synchronized signal input (composite)
58
VSEP TC
O
Time of the object for perpendicular
synchronized signal separation terminal
synchronized signal separation terminal
59
VDIN
I
VSYN input
60
HDIN
I
CSYNC/HSYNC input
61
TEST1
I
Test terminal 1
62
TEST2
I
Test terminal 2
63
CLPIN
I
External clamp input
64
GND1
-
Analog 3V GND
7.4. IC5001 AUDIO ANALOG
Pin
No.
Signal Name
I/O
Description
1
SPBIAS
O
Speaker bias filter terminal
2
BEEPIN
I
Beep signal input terminal
3
SPIN
I
Speaker ampinput terminal
4
EVROUT
O
EVR output terminal
5
LINEOUT
O
Line amp output terminal
6
DVDD
-
Digital power supply
Pin
No.
Signal Name
I/O
Description
7
SDATA
I
Serial data input terminal
8
SCLK
I
Serial clock input termianl
9
SEN
I
Serial enable terminal
10
DVSS
-
Digital GND
11
MUTEB
I
Mute control terminal
(L:Mute/H:Normal)
(L:Mute/H:Normal)
12
TEST
I
Test terminal
13
LPFOUT
O
LPF output terminal
14
EVRIN
I
EVR input terminal
15
AGND
-
Analog GND
16
MICOUT
O
Mic output terminal
17
LINEIN
I
Line input terminal
18
AVCC
-
Analog power supply
19
TAU
I
20
REG
O
Mic power output terminal
21
MICIN
I
Mic input terminal
22
LNF
I
Mic NF terminal
23
BIASOUT
O
Analog bias output terminal
24
ABIAS
O
Analog bias filter terminal
25
SPGND
-
Speaker amp GND
26
SPPOS
O
27
SPVCC
-
Speaker amp power supply
28
SPNEG
O
Speaker amp reverse output terminal
7.5. IC6005 VENUS
Pin
No.
Signal Name
I/O
Description
1
AVSS1
-
Analog GND
2
VREFH
I
A/D reference voltage input
3
AD7
I
AD input (TERM0)
4
AD6
I
AD input (STB SENS)
5
AD5
I
AD input (STB CHLVL)
6
AD4
I
AD input (AUDIO IN)
7
AD3
I
AD input (KEY IN3)
8
AD2
I
AD input (KEY IN2)
9
AD1
I
AD input (KEY IN1)
10
AD0
I
AD input (SW UNREG)
11
AVDD1
-
Analog power supply
12
AVSS2
-
Analog GND
13
VIDEO OUT
O
VBS output
14
COMP1
I
DAC peripheral terminal
15
IREF1
I
DAC peripheral terminal
16
VREF1
I
DAC peripheral terminal
17
AVDD2
-
Analog power supply
18
BOUT
O
LCD-B/V output
19
VREF2
I
DAC peripheral terminal
20
IREF2
I
DAC peripheral terminal
21
COMP2
I
DAC peripheral terminal
22
GOUT
O
LCD-G/U output
23
ROUT
O
LCD-R/Y output
24
AVDD2
-
Analog power supply
25
AVSS2
-
Analog GND
26
AVDD3
-
3.3V power supply
27
USBSIGDM
I/O
USB
28
USBSIGDP
I/O
USB
29
AVSS3
-
USB GND
30
VDD
-
3.3V power supply
31
RSTB
I
Reset input
32
VSS
-
GND
33
LCDVD
O
LCD vertical reference pulse
34
LCDHD
O
LCD horizontal reference pulse
35
-
-
Test terminal (connected to GND)
36
TEST
I
Test terminal (connected to GND)
37
VDD1
-
1.8V power supply
38
CCDVD
O
CCD vertical reference pulse
30
DMC-LC43PP / DMC-LC43PM / DMC-LC43E / DMC-LC43B / DMC-LC43A / DMC-LC43EN / DMC-LC43KR
Pin
No.
Signal Name
I/O
Description
39
CCDHD
O
CCD horizontal reference pulse
40
CCD13
I
CCD input (bit 13)
41
CCD12
I
CCD input (bit 12)
42
CCD11
I
CCD input (bit 11)
43
CCD10
I
CCD input (bit 10)
44
CCD9
I
CCD input (bit 9)
45
CCD8
I
CCD input (bit 8)
46
CCD7
I
CCD input (bit 7)
47
FCK
I
CCD clock input
48
CCD6
I
CCD input (bit 6)
49
CCD5
I
CCD input (bit 5)
50
CCD4
I
CCD input (bit 4)
51
CCD3
I
CCD input (bit 3)
52
CCD2
I
CCD input (bit 2)
53
CCD1
I
CCD input (bit 1)
54
CCD0
I
CCD input (bit 0)
55
PLLVDD
-
Analog power supply
56
ASICPLLOUT
I/O
PLL test
57
PLLVSS
-
Analog GND
58
VDD
-
3.3V power supply
59
SDD31
I/O
SDRAM data bus (bit 31)
60
SDD30
I/O
SDRAM data bus (bit 30)
61
SDD29
I/O
SDRAM data bus (bit 29)
62
SDD28
I/O
SDRAM data bus (bit 28)
63
SDD27
I/O
SDRAM data bus (bit 27)
64
SDD26
I/O
SDRAM data bus (bit 26)
65
SDD25
I/O
SDRAM data bus (bit 25)
66
SDD24
I/O
SDRAM data bus (bit 24)
67
SDD23
I/O
SDRAM data bus (bit 23)
68
SDD22
I/O
SDRAM data bus (bit 22)
69
VSS
-
GND
70
MCK48I
I
48MHz input (XI)
71
MCK48O
O
48MHz output (XO)
72
VSS
-
GND
73
VDD
-
3.3V power supply
74
SDD21
I/O
SDRAM data bus (bit 21)
75
SDD20
I/O
SDRAM data bus (bit 20)
76
SDD19
I/O
SDRAM data bus (bit 19)
77
SDD18
I/O
SDRAM data bus (bit 18)
78
SDD17
I/O
SDRAM data bus (bit 17)
79
SDD16
I/O
SDRAM data bus (bit 16)
80
SDCKE
O
SDRAM clock enable output
81
SDWEB
O
SDRAM write enable output
82
SDCASB
O
SDRAM CAS output
83
SDRASB
O
SDRAM RAS output
84
XDCS
O
XDCS output
85
SDDQM3
O
SDRAM bank data mask output
86
VSS
-
GND
87
VDD
-
3.3V power supply
88
SDDQM2
O
SDRAM bank data mask output
89
SDDQM1
O
SDRAM bank data mask output
90
SDDQM0
O
SDRAM bank data mask output
91
SDBA1
O
SDRAM bank select output
92
SDBA0
O
SDRAM bank select output
93
SDA12
O
SDRAM address bus (bit 12)
94
SDA11
O
SDRAM address bus (bit 11)
95
SDA10
O
SDRAM address bus (bit 10)
96
SDA9
O
SDRAM address bus (bit 9)
97
SDA8
O
SDRAM address bus (bit 8)
98
SDA7
O
SDRAM address bus (bit 7)
99
SDA6
O
SDRAM address bus (bit 6)
100
VSS
-
GND
101
VDD
-
3.3V power supply
102
SDA5
O
SDRAM address bus (bit 5)
103
SDA4
O
SDRAM address bus (bit 4)
104
SDA3
O
SDRAM address bus (bit 3)
Pin
No.
Signal Name
I/O
Description
105
SDA2
O
SDRAM address bus (bit 2)
106
SDA1
O
SDRAM address bus (bit 1)
107
SDA0
O
SDRAM address bus (bit 0)
108
SDD15
I/O
SDRAM data bus (bit 15)
109
SDD14
I/O
SDRAM data bus (bit 14)
110
VDD1
-
1.8V power supply
111
DRAMFCK
O
54MHz output
112
VSS
-
GND
113
VDD
-
3.3V power supply
114
SDD13
I/O
SDRAM data bus (bit 13)
115
SDD12
I/O
SDRAM data bus (bit 12)
116
SDD11
I/O
SDRAM data bus (bit 11)
117
SDD10
I/O
SDRAM data bus (bit 10)
118
SDD9
I/O
SDRAM data bus (bit 9)
119
SDD8
I/O
SDRAM data bus (bit 8)
120
SDD7
I/O
SDRAM data bus (bit 7)
121
SDD6
I/O
SDRAM data bus (bit 6)
122
SDD5
I/O
SDRAM data bus (bit 5)
123
SDD4
I/O
SDRAM data bus (bit 4)
124
SDD3
I/O
SDRAM data bus (bit 3)
125
SDD2
I/O
SDRAM data bus (bit 2)
126
VSS
-
GND
127
VDD
-
3.3V power supply
128
SDD1
I/O
SDRAM data bus (bit 1)
129
SDD0
I/O
SDRAM data bus (bit 0)
130
DMAPORT37
I/O
DMA port 37
131
DMAPORT36
I/O
DMA port 36(AU DET L)
132
DMAPORT35
I/O
DMA port 35(ADP VCC H)
133
DMAPORT34
I/O
DMA port 34(STB OPEN)
134
DMAPORT33
I/O
DMA port 33(ONEPUSH AF)
135
DMAPORT32
I/O
DMA port 32(DISPLAY)
136
DMAPORT31
I/O
DMA port 31(POWER SW OFF)
137
DMAPORT30
I/O
DMA port 30(POWER SW ON)
138
DMAPORT29
I/O
DMA port 29(SIGSW)
139
DMAPORT28
I/O
DMA port 28(AF3R4V CNT)
140
VSS
-
GND
141
VDD
-
3.3V power supply
142
DMAPORT27
I/O
DMA port 27(POWER OFF H)
143
DMAPORT26
I/O
DMA port 26(POWER OFF L)
144
DMAPORT25
I/O
DMA port 25(LCD ONSIG)
145
DMAPORT24
I/O
DMA port 24(7 LED CNT)
146
DMAPORT23
I/O
DMA port 23(STB SENS ON)
147
DMAPORT22
I/O
DMA port 22(SDCMD)
148
DMAPORT21
I/O
DMA port 21(SDCLK)
149
DMAPORT20
I/O
DMA port 20(SDCD)
150
DMAPORT19
I/O
DMA port 19(SDWP)
151
DMAPORT18
I/O
DMA port 18(OIS LD)
152
DMAPORT17
I/O
DMA port 17(OIS RST)
153
DMAPORT16
I/O
DMA port 16(RTC CS)
154
VSS
-
GND
155
VDD
-
3.3V power supply
156
DMAPORT15
I/O
DMA port 15(LCD CS)
157
DMAPORT14
I/O
DMA port 14(AFE CS)
158
DMAPORT13
I/O
DMA port 13(POWER LED)
159
DMAPORT12
I/O
DMA port 12(FLASH LED)
160
DMAPORT11
I/O
DMA port 11(SELF LED)
161
VDD1
-
1.8V power supply
162
DMAPORT10
I/O
DMA port 10(CCD POW)
163
DMAPORT9
I/O
DMA port 9(EVF BLT)
164
DMAPORT8
I/O
DMA port 8(MON BLT)
165
DMAPORT7
I/O
DMA port 7(AUDIO EE H)
166
DMAPORT6
I/O
DMA port 6(SP MUTE)
167
DMAPORT5
I/O
DMA port 5(LINE MUTE L)
168
DMAPORT4
I/O
DMA port 4(VIDEO MUTE)
169
VSS
-
GND
170
VDD
-
3.3V power supply
31
DMC-LC43PP / DMC-LC43PM / DMC-LC43E / DMC-LC43B / DMC-LC43A / DMC-LC43EN / DMC-LC43KR
Pin
No.
Signal Name
I/O
Description
171
DMAPORT3
I/O
DMA port 3(DAT3)
172
DMAPORT2
I/O
DMA port 2(DAT2)
173
DMAPORT1
I/O
DMA port 1(DAT1)
174
DMAPORT0
I/O
DMA port 0(DAT0)
175
CPUD31
I/O
CPU data bus
176
CPUD30
I/O
CPU data bus
177
CPUD29
I/O
CPU data bus
178
CPUD28
I/O
CPU data bus
179
CPUD27
I/O
CPU data bus
180
CPUD26
I/O
CPU data bus
181
CPUD25
I/O
CPU data bus
182
CPUD24
I/O
CPU data bus
183
VSS
-
GND
184
VDD
-
3.3V power supply
185
CPUD23
I/O
CPU data bus
186
CPUD22
I/O
CPU data bus
187
DBGD
-
Not used
188
CPUD21
I/O
CPU data bus
189
CPUD20
I/O
CPU data bus
190
CPUD19
I/O
CPU data bus
191
CPUD18
I/O
CPU data bus
192
CPUD17
I/O
CPU data bus
193
CPUD16
I/O
CPU data bus
194
VDD1
-
1.8V power supply
195
CPUWAIT
I/O
CPU wait
196
CPUWE3B
I/O
CPU write enable upper
197
CPUWE2B
I/O
CPU write enable lower
198
CPUREB
I/O
CPU read enable
199
VSS
-
GND
200
VDD
-
3.3V power supply
201
CPUAD17
I/O
CPU address bus
202
CPUAD16
I/O
CPU address bus
203
CPUAD15
I/O
CPU address bus
204
CPUAD14
I/O
CPU address bus
205
CPUAD13
I/O
CPU address bus
206
CPUAD12
I/O
CPU address bus
207
CPUAD11
I/O
CPU address bus
208
CPUAD10
I/O
CPU address bus
209
CPUAD9
I/O
CPU address bus
210
CPUAD8
I/O
CPU address bus
211
CPUAD7
I/O
CPU address bus
212
CPUAD6
I/O
CPU address bus
213
VSS
-
GND
214
VDD
-
3.3V power supply
215
CPUAD5
I/O
CPU address bus
216
DBGCK
-
Not used
217
CPUAD4
I/O
CPU address bus
218
CPUAD3
I/O
CPU address bus
219
CPUAD2
I/O
CPU address bus
220
CPUAD1
I/O
CPU address bus
221
CPUAD0
I/O
CPU address bus
222
MSEL
I
u-COM input/output select
223
VDD1
-
1.8V power supply
224
CPUPORT40
I/O
General port (TELE)
225
CPUPORT39
I/O
General port (WIDE)
226
CPUPORT38
I/O
General port (FENC)
227
CPUPORT37
I/O
General port (ZENC0)
228
CPUPORT36
I/O
General port (ZENC1)
229
CPUPORT35
I/O
General port (ZHP)
230
VSS
-
GND
231
VDD
-
3.3V power supply
232
CPUPORT34
I/O
General port (C SYNC)
233
CPUPORT33
I/O
General port (AFE SDATA)
234
CPUPORT32
I/O
General port (AFE SCK)
235
CPUPORT31
I/O
General port (ATB PWM)
236
CPUPORT30
I/O
General port (AUDIO PWM)
Pin
No.
Signal Name
I/O
Description
237
CPUPORT29
I/O
General port (VOL CNT)
238
CPUPORT28
I/O
General port (IDD1 VCC)
239
CPUPORT27
I/O
General port (NC)
240
CPUPORT26
I/O
General port
241
CPUPORT25
I/O
General port (IRXD)
242
PLLSW
I
PLL through change
243
TEST0IN
-
Not used
244
CPUPORT24
I/O
General port (ITXD)
245
VSS
-
GND
246
VDD
-
3.3V power supply
247
CPUPORT23
I/O
General port (IDDI CLK)
248
CPUPORT22
I/O
General port (USB CAB IN)
249
CPUPORT21
I/O
î¦ópÉ|Å[Ég(MEDIA CV SW)
250
CPUPORT20
I/O
General port
251
CPUPORT19
I/O
General port
252
CPUPORT18
I/O
General port [Ég(MENU)
253
CPUPORT17
I/O
General port [Ég(DELETE)
254
CPUPORT16
I/O
General port [Ég(S B REC)
255
CPUPORT15
I/O
General port [Ég(SIO I)
256
CPUPORT14
I/O
General port [Ég(SIO O)
257
CPUPORT13
I/O
General port (SCK)
258
CPUPORT12
I/O
General port (ICC CMDIN)
259
VSS
-
GND
260
VDD
-
3.3V power supply
261
CPUPORT11
I/O
General port (CMD OUT)
262
CPUPORT10
I/O
General port (NC)
263
CPUPORT9
I/O
General port (OIS SBI)
264
CPUPORT8
I/O
General port (OIS SBO)
265
CPUPORT7
I/O
General port (OIS CLK)
266
CPUPORT6
I/O
General port g(ROMICE)
267
CPUPORT5
I/O
General port (SHUT HALF)
268
CPUPORT4
I/O
General port (SHUT FULL)
269
CPUPORT3
I/O
General port (FROM CS)
270
CPUPORT2
I/O
General port (CPUAD20)
271
CPUPORT1
I/O
General port (CPUAD19)
272
CPUPORT0
I/O
General port (CPUAD18)
273
VDD1
-
1.8V power supply
274
JTAGTDO
O
JTAG output
275
JTAGTDI
I
JTAG input
276
JTAGTCK
I
JTAG input
277
JTAGRST
I
JTAG input
278
JTAGMS
I
JTAG input
279
VSS
-
GND
280
VDD
-
3.3V power supply
281
VDD
-
3.3V power supply
282
VDD
-
3.3V power supply
283
VSS
-
GND
284
VSS
-
GND
285
VSS
-
GND
286
VSS
-
GND
287
VDD1
-
1.8V power supply
288
VDD1
-
1.8V power supply
7.6. IC7001 LENS DRIVE
Pin
No.
Signal Name
I/O
Description
1
NC
-
No connection
2
NC
-
No connection
3
NC
-
No connection
4
LATCH
I
Serial data latch input
5
SCLK
I
Serial data clock input
6
SDATA
I
Serial data input
7
RESET
I
Reset input
8
VD
I
Sync signal input
32
DMC-LC43PP / DMC-LC43PM / DMC-LC43E / DMC-LC43B / DMC-LC43A / DMC-LC43EN / DMC-LC43KR
Click on the first or last page to see other DMC-LC43PP / DMC-LC43PM / DMC-LC43E / DMC-LC43B / DMC-LC43A / DMC-LC43EN / DMC-LC43KR (serv.man2) service manuals if exist.