Panasonic WJ-SX150 / WJ-SX150A Service Manual ▷ View online
– 3-1 –
E10
E9
E7
E6
E8
E11
E14
E1
E3
CN80
CN81
(MULTIPLEXER BOARD : OPTION)
CN76
CN201
CN401
REAR BOARD
D-SUB
BOARD
POWER BOARD
LED
BOARD
FRONT
BOARD
CN301
E5
E4
1
12
12
1
8
1
1
5
2
1
1
8
1
26
26
1
1
30
50
1
50
1
30
1
20
1
18
1
CN3
6
1
12
1
12
1
1
6
2
1
2 1
3 1
CN2
CN1
TO MAIN CHASSIS
AC INPUT
SW1
POWER SWITCH
1
2
4 3 2 1
1 6
1 7
MAIN BOARD
CN16
CN15
CN907
CN903
CN904
(TO MULTIPLEXER BOARD)
CN7
CN8
CN13
CN10
CN12
(TO MULTIPLEXER BOARD)
CN905
(TO MULTIPLEXER BOARD)
(TO MULTIPLEXER BOARD)
CN77
(TO MULTIPLEXER BOARD)
(TO MULTIPLEXER BOARD)
CN906
CN6
CN11
(TO MULTIPLEXER BOARD)
(TO MULTIPLEXER BOARD)
CN14 (TO FAN)
WIRING DIAGRAM
4
3
VIN1
VSINB
19
INPB
OUT2B
OUT1B
FBB
DINB
VSOUTB
1
12
SYNCB
FBOUTB
18
16
DOUTB
24
IFCPB
23
SW0B
26
INNB
17
8
10
9
11
28
VOUT1
VSAG1
5
6
VIN2
8
VOUT2
IC102 (b)
75
75
Ω
DRIVER
IC101 (b)
A/D CONVERTER
A/D CONVERTER
IC904-IC908,IC911-IC915
TRANSCEIVER
TRANSCEIVER
IC902,IC903,
IC909,IC910
BUS BUFFER
IC909,IC910
BUS BUFFER
Q102
R109,R111,L103,
C111,C113
C111,C113
CN101-2
CAMERA
INPUT_1
CAMERA
OUTPUT_1
CN101-1
Q101,Q103
Q105
Q106
IC102 (a)
CLAMP
CLAMP
VSAG2
DGPB
25
LPF
BUFFER
BUFFER
BUFFER
BUFFER
IC901
16CH CAMERA CONTROL GATE ARRAY
16CH CAMERA CONTROL GATE ARRAY
CABLE
COMPENSATION
Q104
BUFFER
DOUT_5V[1]
CCL[1]
SYNC_5V[1]
SYNC_5V[1-16]
DIN_5V[1-16]
7-14,
30-37
VIDEO[1-16]
SYNC[1-16]
DIN[1-16]
A
B
IC923
16 x 8 CROSS-POINT SWITCH
16 x 8 CROSS-POINT SWITCH
Q906
Q908
Q907
Y0
Y1
Y2
Y3
Y4
Y5
2
5
2
5
2
5
1
4
1
4
1
4
5
2
2
5
4
1
1
4
39
41
43
1
23
21
AX0
AX1
AX2
AX3
AX1
AX2
AX3
AY0
AY1
AY2
AY1
AY2
DATA
5
24
25
4
26
27
2
42
24
25
4
26
27
2
42
RESET
3
CS
40
STROBE
20
X0-X15
IC927
SELECTOR
SELECTOR
IC931
8-BIT D-FF
8-BIT D-FF
X
Y
Z
A
B
B
C
X0
X1
Y0
Y1
Z0
Z1
Y
A
SYNC[1-16]
DIN[1-16]
20,27,34,44,64,74,83,92,101,
110,193,202,213,220,230,237
14,25,38,47,69,77,86,97,106,
113,189,196,212,219,228,240
13,24,37,46,68,76,85,94,105,
112,188,195,211,218,227,239
D0-D7
15,22,31,39,59,70,79,87,98,
107,190,199,206,215,224,232
21,28,35,45,65,75,84,93,104,
111,194,205,214,223,231,238
17,26,33,41,63,72,81,91,100,
109,192,201,208,217,226,236
16,23,32,40,62,71,80,88,99,
108,191,200,207,216,225,233
IFCP_5V[1-16]
ERASE_5V[1-16]
DGP_5V[1-16]
DOUT_5V[1-16]
VD20_5V[1-16]
IC918-IC921
8-BIT SHIFT
REGISTER
8-BIT SHIFT
REGISTER
SI
SCK
RCK
Q
IC922
8-BIT D-FF
8-BIT D-FF
1D-8D
CLK
19
18
17
18
17
1Q
2Q
3Q
2Q
3Q
CCL[1-16]
CCM[1-16]
IFCP[1-16]
ERASE[1-16]
DGP[1-16]
DOUT[1-16]
VD20[1-16]
IFCP[1-16]
159-161,166-170
RESET
NTZPAL
IORDZ
IOWTZ
CSZ
ALMINF
SYCINF
VDIN
VD2IN
CLKIN
RESET3V
NTZPAL
RD2
WR2
CAMGA_CS
ALMINF
SYNCINF
VD3V
VD
CLK16M
XPOUT[1]
XPOUT[2]
XPOUT[3]
XPOUT[4]
172
173
164
165
147
146
145
144
145
144
140
148
ERASE[1-16]
DGP[1-16]
DOUT[1-16]
VD20[1-16]
DIN_5V[1]
IFCP_5V[1]
ERASE_5V[1]
DGP_5V[1]
SYNC_5V[1]
DIN_5V[1]
IFCP_5V[1]
ERASE_5V[1]
DGP_5V[1]
DOUT_5V[1]
VD20_5V[1]
VIDEO[1]
CCM[1]
VD20_5V[1]
VIDEO[1]
+
–
–
– +
– +
– +
4
3
VIN1
VSINA
42
INPA
OUT2A
OUT1A
FBA
DINA
VSOUTA
1
1
SYNCA
FBOUTA
43
45
DOUTA
37
IFCPA
38
SW0A
35
INNA
44
5
3
4
2
33
VOUT1
VSAG1
5
6
VIN2
8
VOUT2
IC202 (b)
75
75
Ω
DRIVER
IC101 (a)
A/D CONVERTER
A/D CONVERTER
Q102
R209,R211,L203,
C211,C213
C211,C213
CN201-2
CAMERA
INPUT_2
CAMERA
OUTPUT_2
CN201-1
Q201,Q203
Q205
Q206
IC202 (a)
CLAMP
CLAMP
VSAG2
DGPA
36
LPF
BUFFER
BUFFER
BUFFER
BUFFER
CABLE
COMPENSATION
Q204
BUFFER
DOUT_5V[2]
CCL[2]
14
15
12
13
2
1
5
3
12
13
2
1
5
3
4
11
10
9
2-9
11
14
4
15
2
1
2
4
4
SYNC_5V[2]
DIN_5V[2]
IFCP_5V[2]
ERASE_5V[2]
DGP_5V[2]
SYNC_5V[2]
DIN_5V[2]
IFCP_5V[2]
ERASE_5V[2]
DGP_5V[2]
DOUT_5V[2]
VD20_5V[2]
VIDEO[2]
CCM[2]
VD20_5V[2]
VIDEO[2]
+
–
–
– +
– +
– +
4
3
VIN1
VSINB
19
INPB
OUT2B
OUT1B
FBB
DINB
VSOUTB
1
12
SYNCB
FBOUTB
18
16
DOUTB
24
IFCPB
23
SWOB
26
INNB
17
8
10
9
11
28
VOUT1
VSAG1
5
6
VIN2
8
VOUT2
IC752 (b)
75
75
Ω
DRIVER
IC751 (b)
A/D CONVERTER
A/D CONVERTER
Q752
R759,R751,L753,
C761,C763
C761,C763
CN751-2
CAMERA
INPUT_15
CAMERA
OUTPUT_15
CN751-1
Q751,Q753
Q755
Q756
IC752 (a)
CLAMP
CLAMP
VSAG2
DGPB
25
LPF
BUFFER
BUFFER
BUFFER
BUFFER
CABLE
COMPENSATION
Q754
BUFFER
DOUT_5V[15]
CCL[15]
SYNC_5V[15]
DIN_5V[15]
IFCP_5V[15]
ERASE_5V[15]
DGP_5V[15]
SYNC_5V[15]
DIN_5V[15]
IFCP_5V[15]
ERASE_5V[15]
DGP_5V[15]
DOUT_5V[15]
VD20_5V[15]
VIDEO[15]
CCM[15]
VD20_5V[15]
VIDEO[15]
+
–
–
– +
– +
– +
4
3
VIN1
VSINA
42
INPA
OUT2A
OUT1A
FBA
DINA
VSOUTA
1
1
SYNCA
FBOUTA
43
45
DOUTA
37
IFCPA
38
SW0A
35
INNA
44
5
3
4
1R3A
6
2
33
VOUT1
VSAG1
5
6
VIN2
8
VOUT2
IC852 (b)
75
75
Ω
DRIVER
IC751 (a)
A/D CONVERTER
A/D CONVERTER
Q852
R859,R851,L853,
C611,C863
C611,C863
CN851-2
CAMERA
INPUT_16
CAMERA
OUTPUT_16
CN851-1
Reference Numbers :
1CH : 101 –
1CH : 101 –
2CH : 201 –
3CH : 301 –
4CH : 401 –
5CH : 501 –
6CH : 601 –
7CH : 701 –
8CH : 801 –
9CH : 151 –
10CH : 251 –
11CH : 351 –
12CH : 451 –
13CH : 551 –
14CH : 651 –
15CH : 751 –
16CH : 851 –
Q851,Q853
Q855
Q856
IC852 (a)
CLAMP
CLAMP
VSAG2
DGPA
36
LPF
BUFFER
BUFFER
BUFFER
BUFFER
VSW_LAT
AMP
DELAY
VDSEL
VD
BUFFER
BUFFER
75
Ω
DRIVER
BUFFER
CLOCK GENERATOR
CABLE
COMPENSATION
Q854
BUFFER
DOUT_5V[16]
CCL[16]
SYNC_5V[16]
DIN_5V[16]
IFCP_5V[16]
ERASE_5V[16]
DGP_5V[16]
SYNC_5V[16]
DIN_5V[16]
IFCP_5V[16]
ERASE_5V[16]
DGP_5V[16]
DOUT_5V[16]
VD20_5V[16]
VIDEO[16]
CCM[16]
VD20_5V[16]
VIDEO[16]
+ –
1R3B
7
+ –
1R3A
6
+ –
1R3B
7
+ –
+
–
–
– +
– +
– +
ADR0-ADR7
D[0-15]
TO
BLOCK DIAGRAM (2/3)
BLOCK DIAGRAM (2/3)
TO
BLOCK
DIAGRAM (2/3)
BLOCK
DIAGRAM (2/3)
XPOUT[1-4]
D5[0-7]
A[0-25]
D[0-7]
A[0-7]
151-158
RESET5V
XPSW_CS
XPSW_STRB
VSW_LAT
VSW_LAT
11
10
9
IC928
SELECTOR
SELECTOR
Z
Y
X
A
B
B
C
2
3
4
5
6
7
8
9
19
18
17
16
15
14
11
1D
2D
3D
4D
5D
6D
7D
8D
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
2Q
3Q
4Q
5Q
6Q
5Q
6Q
CLK
X0
X1
Y0
Y1
Z0
Z1
1
7
5
6
CH0
A
CH1
COMMON
2
27
24
21
17
15
9
8
7
6
TEST
FSCI
AIN
VINT
SCOF
EXT
LR
VR
HR
VDO
11
CLKO
10
CLKI
Q911
Q912
Q910
Q901
IC924,Q902,Q903
Q86
IC84,Q80
Q85
Q904
IC930
SYNC GENERATOR
SYNC GENERATOR
IC929
SELECTOR
SELECTOR
X901,CT901,C971,R955
R948,C959
Q905
IC925
IC926
TP901
(V-SYNC)
CT901 (V-SYNC)
CN904
CN905
CN906
CN903
CN81
CN85
CN82
Q909
XPSEL[1]
XPSEL[2]
XPSEL[3]
XPSEL[4]
XPSEL[5]
XPSEL[6]
D5[0]
D5[1]
D5[2]
D5[3]
D5[4]
D5[5]
D5[6]
D5[7]
D5[0]
D5[1]
D5[2]
D5[3]
D5[4]
D5[5]
D5[6]
D5[7]
D5[1]
D5[2]
D5[3]
D5[4]
D5[5]
D5[6]
D5[7]
D5[0]-D5[7]
19
18
17
16
15
14
13
12
11
18
17
16
15
14
13
12
11
MULTI
VIDEO1
VIDEO2
VIDEO3
VIDEO4
VIDEO5
VIDEO6
VIDEO7
VIDEO8
VIDEO1
VIDEO2
VIDEO3
VIDEO4
VIDEO5
VIDEO6
VIDEO7
VIDEO8
17
16
15
14
13
12
11
10
16
15
14
13
12
11
10
VIDEO9
VIDEO10
VIDEO11
VIDEO12
VIDEO13
VIDEO14
VIDEO15
VIDEO16
VIDEO10
VIDEO11
VIDEO12
VIDEO13
VIDEO14
VIDEO15
VIDEO16
VIDEO[1]
VIDEO[2]
VIDEO[3]
VIDEO[4]
VIDEO[5]
VIDEO[6]
VIDEO[7]
VIDEO[8]
VIDEO[2]
VIDEO[3]
VIDEO[4]
VIDEO[5]
VIDEO[6]
VIDEO[7]
VIDEO[8]
VIDEO[9]
VIDEO[10]
VIDEO[11]
VIDEO[12]
VIDEO[13]
VIDEO[14]
VIDEO[15]
VIDEO[16]
VIDEO[10]
VIDEO[11]
VIDEO[12]
VIDEO[13]
VIDEO[14]
VIDEO[15]
VIDEO[16]
1
XPOUT6
5
7
8
7
8
5
3
1
3
1
CAMSW
EXTOUT
EXTIN
CABLE_LAT
CABLE_LAT
MAIN BOARD (1/3)
VD
XPSW_CS
XPSW_STRB
RESET5V
XPSW_CS
XPSW_STRB
RESET5V
CN85 :
Camera Switching Input Connector
Camera Switching Input Connector
CN82 :
External Output Connector
External Input Connector
External Output Connector
External Input Connector
EXT
OUT
CAM
SW
IN
EXT
IN
REAR
BOARD (1/3)
BOARD (1/3)
TO
BLOCK
DIAGRAM (2/3)
BLOCK
DIAGRAM (2/3)
TO
MULTIPLEXER BOARD
MULTIPLEXER BOARD
TO
MULTIPLEXER BOARD
MULTIPLEXER BOARD
Refer to Schematic Diagram of Main Board (3/6)
Refer to Schematic Diagram of Main Board (2/6)
Refer to Schematic Diagram of Main Board (1/6)
(MULTIPLEXER BOARD : OPTION)
– 3-2 –
BLOCK DIAGRAM (1/3)
– 3-3 –
1
2
3
2
3
+
–
–
S
6
4
4
3.3VCPU
1A3
1A2
1A1
1A2
1A1
H0
H1
F0
H1
F0
A0-A25
MCS[6]/PTC[6]/PINT[6]
MCS[7]/PTC[7]/PINT[7]
MCS[7]/PTC[7]/PINT[7]
WAIT
CS0/MCS[0],CS2/PTK[0],CS3/PTK[1],
CS4/PTK[2],CS5/CE1A/PTK[3],CS6/CE1B
CS4/PTK[2],CS5/CE1A/PTK[3],CS6/CE1B
BS/PTK[4],RD,WE0/DOMLL,
WE1/DOMLU/WE,RD/WR
WE1/DOMLU/WE,RD/WR
D0-D15
1Y3
1Y2
1Y1
1Y2
1Y1
1
LED
TO
FAN (OPTION)
7
2
RESET
Q7
IC34 (a)
IC1
BUFFER
IC8(a)
MICROPROCESSOR
TO
BLOCK DIA
GRAM (1/3)
IC14 PLD(a)
IC10
TO
LED BOARD
. . . . . CN401
+12V
CN6(a)
CN201
CN14
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
33
34
35
36
37
38
39
40
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
33
34
35
36
37
38
39
40
ADR21
ADR20
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR17
DATA15
DATA7
DATA14
DATA6
DATA13
DATA5
DATA12
DATA4
PROM_CS
ADR19
ADR18
ADR8
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
DATA0
DATA8
DATA1
DATA9
DATA2
DATA10
DATA3
DATA11
ADR20
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR17
DATA15
DATA7
DATA14
DATA6
DATA13
DATA5
DATA12
DATA4
PROM_CS
ADR19
ADR18
ADR8
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
DATA0
DATA8
DATA1
DATA9
DATA2
DATA10
DATA3
DATA11
TO
PROM
PROM
CN5
CN16
DRIVER
2
85
84
60
84
60
F3
B6
B7
B6
B7
57
4
3
3
#OE
#WE
#CE
#WE
#CE
#RP
28
11
26
11
26
12
34,36-44,46,48-52
53-56,58,60-68,70,
72-78,80,82,84,86
96,98-102
RESETP
193
87-90,93
178
177
177
123
CKE/PTK[5]
RAS3L/PTJ[0]
CASLL/CASL/PTJ[2]
RAS3L/PTJ[0]
CASLL/CASL/PTJ[2]
105
106
108
106
108
RAS2U/PTE[1]
119
RAS3U/PTE[2]
118
CAS2H/PTE[3]
117
CE2A/PTE[4]
103
D23/PTA[7]
23
RESETM
124
XTAL2
4
EXTAL2
5
186
107
5
14
18
1
21,22,33-35,41-43
30
29
28
29
28
7-10,69,70,
94-96
94-96
15-19
44-48
31
20
14
98
20
14
98
36
A0-A2,A20-25
CS0,CS2,
CS4-CS6
CS3
CS3
BS,RDWR,
RD,WE0,WE1
WE0,RDWR,WE1
D0-D7
A[0-25]
D[0-15]
16
3.3VCPU
IC35
VD
VD3V
INT1
INT2
INT_VMD
ALMINF
SYNCINF
FAN_ALM3V
INTGBD3V
VD3V
141
140
140
8
143
142
142
FAN_ALM3V
INTGBD3V
VD3V
ALMINF
SYNCINF
INTGBD3V
VD3V
ALMINF
SYNCINF
IRLS[2]/PTF[2]/PINT[10]
IRLS[3]/PTF[3]/PINT[11]
IRO0/IRL0/PTH[0]
IRLS[0]/PTF[0]/PINT[8]
IRLS[1]/PTF[1]/PINT[9]
IRLS[3]/PTF[3]/PINT[11]
IRO0/IRL0/PTH[0]
IRLS[0]/PTF[0]/PINT[8]
IRLS[1]/PTF[1]/PINT[9]
IRO4/PTH[4]
RTS2/SCPT[6]
IRO3/IRL3/PTH[3]
199
200
201
202
203
204
206
207
200
201
202
203
204
206
207
AN[0]/PTL[0]
AN[1]/PTL[1]
AN[2]/PTL[2]
AN[3]/PTL[3]
AN[4]/PTL[4]
AN[5]/PTL[5]
AN[6]/DA[1]/PTL[6]
AN[7]/DA[0]/PTL[7]
AN[1]/PTL[1]
AN[2]/PTL[2]
AN[3]/PTL[3]
AN[4]/PTL[4]
AN[5]/PTL[5]
AN[6]/DA[1]/PTL[6]
AN[7]/DA[0]/PTL[7]
162
1
9
CKIO
MCS[2]/PTC[2]/PINT[2]
RAS2L/PTJ[1]
22
20
18
17
16
15
14
13
20
18
17
16
15
14
13
D24/PTB[0]
D25/PTB[1]
D26/PTB[2]
D27/PTB[3]
D28/PTB[4]
D29/PTB[5]
D30/PTB[6]
D31/PTB[7]
D25/PTB[1]
D26/PTB[2]
D27/PTB[3]
D28/PTB[4]
D29/PTB[5]
D30/PTB[6]
D31/PTB[7]
180
MCS[4]/PTC[4]/PINT[4]
155
156
XTAL
EXTAL
VCC1-VCC5,
VCC-PLL1,VCC-PLL2
185
7
MCS[3]/PTC[3]/PINT[3]
MNI
INT_1
INT_VMD
ALMINF
SYNCINF
CLK16M
NTZPAL
CABLE_LAT
VSW_LAT
CABLE_LAT
VSW_LAT
VDSEL
XPSW_CS
VDSEL
XPSW_CS
XPSW_STRB
XPSW_STRB
RESET3V
RESET3V
RESET5V
RESET5V
RD2
WR2
RD2
WR2
B4
B5
6
5
CLOCK GENERATOR
CAMGA_CS
DIVIDER
C6,C7,D0-D2,
E0-E2
D5
D6
D7
D6
D7
A3-A5,B0-B3,
G4,G5
C0-C4
E3-E7
D4
C5
C5
I0/CLK0
A7
I2
CKIO
IC14
PLD(b)
92
91
91
79
81
68
67
58
54
A1
A0
A0
83
82
82
H2
H3
H3
1A1-1A8,
2A1-2A8
2A1-2A8
1B1-1B8,
2B1-2V8
IC18
BUS BUFFER
BUS BUFFER
26,27,29,30,32,
33,35-38,40,41,
33,35-38,40,41,
43,44,46,47
26,27,29,30,
32,33,35,36
2A1-2A8
1A1
1A7
1A8
1A4
1A3
1A3
1#OE,2#OE
1DIR,2DIR
1DIR,2DIR
1B1
1B7
1B8
2B1-2V8
IC19 BUS BUFFER
47
38
37
13,14,16,17,
19,20,22,23
19,20,22,23
2,3,5,6,8,9,
11-14,15,16,
17,19,20,22,23
11-14,15,16,
17,19,20,22,23
1A1-1A8,
2A1-2A8
2A1-2A8
1B1-1B8,
2B1-2V8
IC20 TRANSCEIVER
26,27,29,30,32,33,35-38,
40,41,43,44,46,47
1,24
25,48
2,3,5,6,8,9,11-14,
16,17,19,20,22,23
16,17,19,20,22,23
B1
B2
B3
B4
B5
B6
B7
B8
H6
H4
G3
G2
F2
F6
A1
A2
A3
A4
A5
A6
A7
A8
IC21
BUS BUFFER
BUS BUFFER
6
7
8
9
2
3
IC1001,IC1002,Q1002
1CH MONITOR OSD
1CH MONITOR OSD
55
53
65
66
80
F5
F7
G0
G1
H5
4
5
14
13
12
11
4
2
18
17
16
15
SW4
1
3
IC17
16MB FLASH-RAM
29-36,38-45
1-10,16-25,48
A1-A21
D0-D15
DQ0-DQ15/A1
A0-A19
IC12
128MB SDRAM
IC4(c)
IC2(d)
X1,CT1,C20,C21,Q2,Q3
X2,C47,C48,Q5,Q6
IC2(f)
IC4(b)
2,4,5,7,8,10,11,
13,42,44,45,47,
48,50,51,53
13,42,44,45,47,
48,50,51,53
20-26,29-35
19
15,16,39
A1-A14
D0-D15
DQ0-DQ15
8
INPUT OUTPUT
DELAY
CAPACITOR
3
13
6
3.3VCPU
9
2
6
5
12
4
5
#CS
CLK
38
CKE
#RAS
#CAS
#CAS
LDQM,#WE,
UDQM
A0-A11,BA0[A13],BA1[A12]
IC3
RESET
SW201
RESET
RESET
IC7
D-FF
1D
2D
1#Q
2Q
2
6
9
2
10
3
11
4
12
5
13
6
14
7
15
8
16
19
18
17
18
17
TCLK/PTH[7]
159
RY/#BY
14
ADTRG/PTH[5]
125
#WP
15
3.3V
3.3VCPU
3.3VCPU
3.3VCPU
CLOCK
GENERATOR
IC6
1.9 V
REGULATOR
IC4(d)
IC2(e)
IC2(c)
6
8
5
9
IC4(a)
2
1
12
1CLK
3
2CLK
11
11
10
IC934
4
2
IC2(b)
IC4(e)
11
3
4
10
IC2(a)
IC4(f)
13
1
2
12
RESET3V
CKIO
CKIO
RD
WE0
RD
WE0
RESET3V
A8-A23
A0-A7
A5[8-23]
A5[0-7]
D0-D15
D5[0-15]
D5[0-7]
D5[0-7]
A5[0-23]
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D0
D1
D2
D3
D4
D5
D6
D7
D1
D2
D3
D4
D5
D6
D7
CK
OSDCNT[0]
OSDCNT[1]
OSDCNT[2]
OSDCNT[3]
OSDCNT[4]
OSDCNT[5]
OSDCNT[6]
OSDCNT[7]
OSDCNT[1]
OSDCNT[2]
OSDCNT[3]
OSDCNT[4]
OSDCNT[5]
OSDCNT[6]
OSDCNT[7]
OSDCNT[0]
OSDCNT[1]
OSDCNT[2]
OSDCNT[3]
OSDCNT[4]
OSDCNT[5]
OSDCNT[6]
OSDCNT[7]
OSDCNT[1]
OSDCNT[2]
OSDCNT[3]
OSDCNT[4]
OSDCNT[5]
OSDCNT[6]
OSDCNT[7]
IC932
8-BIT D-FF
8-BIT D-FF
6
7
8
9
7
8
9
11
2
3
4
5
3
4
5
15
14
13
12
14
13
12
19
18
17
16
18
17
16
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D0
D1
D2
D3
D4
D5
D6
D7
D1
D2
D3
D4
D5
D6
D7
CK
OSDCNT[0]
OSDCNT[1]
OSDCNT[2]
OSDCNT[3]
OSDCNT[4]
OSDCNT[5]
OSDCNT[6]
OSDCNT[7]
OSDCNT[1]
OSDCNT[2]
OSDCNT[3]
OSDCNT[4]
OSDCNT[5]
OSDCNT[6]
OSDCNT[7]
OD[0]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
OD[0]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
#OAC[1]
#OCS[1]
#OCS[1]
XPOUT1
#OCS[1]
#OCS[2]
#OCS[3]
#OCS[4]
#OAC[1]
#OAC[2]
#OAC[3]
#OAC[4]
#OCS[2]
#OCS[3]
#OCS[4]
#OAC[1]
#OAC[2]
#OAC[3]
#OAC[4]
IC933
8-BIT D-FF
8-BIT D-FF
6
1
7
8
9
8
9
11
2
3
4
5
3
4
5
15
3
14
13
12
13
12
19
18
17
16
18
17
16
WROUT1
RDOUT1
WROUT1
RDOUT1
1A5
1A6
41
40
43
44
WR2
RD2
WR1_5V
OSDSCK
OSDSCK
RD1_5V
CABLE_LAT
VSW_LAT
SIO_CS
XPSW_CS
XPSW_STRB
VDSEL
DIR_OPT
BUF_OPT
SR_CS
ALMOUT_LAT
FS_CS
WR_OPT
INT_2
INT_2
RD_OPT
SIO_CS
SIO_CS
INT_VMD
WR1_5V
WR1_5V
RD1_5V
RD1_5V
INT_VMD
INT_1
INT_1
RESET3V
RAS2L
RAS2L
12
11
10
11
10
9
1
3
5
7
3
5
7
6
1
2-5,7-9
6
1
2-5,7-9
MON1
MON2
MON3
MON4
MON2
MON3
MON4
CN907 CN80
CN83
CN84
A5[21]
A5[20]
A5[20]
A5[9]
A5[10]
A5[11]
A5[12]
A5[13]
A5[14]
A5[15]
A5[16]
A5[17]
A5[11]
A5[12]
A5[13]
A5[14]
A5[15]
A5[16]
A5[17]
A5[19]
A5[18]
A5[18]
A5[8]
A5[7]
A5[6]
A5[5]
A5[4]
A5[3]
A5[2]
A5[1]
A5[7]
A5[6]
A5[5]
A5[4]
A5[3]
A5[2]
A5[1]
D5[15]
D5[7]
D5[14]
D5[6]
D5[13]
D5[5]
D5[12]
D5[4]
D5[0]
D5[8]
D5[1]
D5[9]
D5[2]
D5[8]
D5[1]
D5[9]
D5[2]
D5[10]
D5[3]
D5[11]
INT_2
D4
D5
D6
D7
RESET5V
RESET5V
Z953
IC1101,IC1102,Q1102
2CH MONITOR OSD
2CH MONITOR OSD
OD[0]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
#OAC[2]
#OCS[2]
#OCS[2]
XPOUT2
OSDSCK
IC1201,IC1202,Q1202
3CH MONITOR OSD
3CH MONITOR OSD
IC80,Q81
IC81,Q82
IC82,Q83
IC83,Q84
OD[0]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
#OAC[3]
#OCS[3]
#OCS[3]
XPOUT3
OSDSCK
75
Ω
DRIVER
75
Ω
DRIVER
75
Ω
DRIVER
75
Ω
DRIVER
IC1301,IC1302,Q1302
4CH MONITOR OSD
4CH MONITOR OSD
OD[0]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
OD[1]
OD[2]
OD[3]
OD[4]
OD[5]
OD[6]
OD[7]
#OAC[4]
#OCS[4]
#OCS[4]
XPOUT4
OSDSCK
XPOUT[1-4]
29,81,134,
150,154,175
150,154,175
MAIN BOARD (2/3)
REAR BOARD (2/3)
CN83:
MONITOR OUTPUT TERMINAL 1
MONITOR OUTPUT TERMINAL 2
MONITOR OUTPUT TERMINAL 1
MONITOR OUTPUT TERMINAL 2
CN84:
MONITOR OUTPUT TERMINAL 3
MONITOR OUTPUT TERMINAL 4
MONITOR OUTPUT TERMINAL 3
MONITOR OUTPUT TERMINAL 4
MON1
MON2
MON3
MON4
TO
BLOCK DIAGRAM (1/3)
TO
BLOCK DIAGRAM (1/3), (3/3)
BLOCK DIAGRAM (1/3), (3/3)
TO
BLOCK DIAGRAM (3/3)
BLOCK DIAGRAM (3/3)
TO
BLOCK DIAGRAM (3/3)
BLOCK DIAGRAM (3/3)
TO
BLOCK DIAGRAM (1/3)
BLOCK DIAGRAM (1/3)
D[0-15]
A[0-23]
TO
BLOCK DIAGRAM (3/3)
BLOCK DIAGRAM (3/3)
TP1
(REALTIME CLK)
CT1 (REALTIME CLK)
Refer to Schematic Diagram of Main Board (4/6)
Refer to Schematic Diagram
of Main Board (5/6)
of Main Board (5/6)
Refer to Schematic Diagram
of Main Board (5/6)
of Main Board (5/6)
Refer to Schematic Diagram of Main Board (2/6)
12
170
11
FRONT
BOARD
(1/2)
BLOCK DIAGRAM (2/3)
– 3-4 –
IC8(b)
MICROPROCESSOR
IC30
SIO
SIO
IC29
8-BIT BUS BUFFER
8-BIT BUS BUFFER
IC5
Q1
D1
D2
1
3
3
CN1
BAT1
+
–
–
MUL
TIPLEXER BO
ARD
2
INTERNAL RTC
REGURATOR
D5V
3
1
2
1
3
5
VCC-RTC
18
16
12
14
16
12
14
9
7
5
3
7
5
3
56
55
54
53
51
50
49
48
55
54
53
51
50
49
48
6
8
2
4
13
11
15
17
8
2
4
13
11
15
17
9
6
15
18
34
37
72
69
6
15
18
34
37
72
69
174
188
9
10
25
24
171
188
9
10
25
24
171
1Y1
1Y2
1Y4
1Y3
2Y1
2Y2
2Y3
2Y4
1Y2
1Y4
1Y3
2Y1
2Y2
2Y3
2Y4
D0
D1
D2
D3
D4
D5
D6
D7
D1
D2
D3
D4
D5
D6
D7
10
XRD
11
XWR
14
RESET
13
CLK
21
22
22
A0
A1
A1
25
26
27
28
26
27
28
XCS1
XCS2
XCS3
XCS4
XCS2
XCS3
XCS4
D5[0]
D5[1]
D5[2]
D5[3]
D5[4]
D5[5]
D5[6]
D5[7]
D5[1]
D5[2]
D5[3]
D5[4]
D5[5]
D5[6]
D5[7]
D[0]
D[1]
D[2]
D[3]
D[1]
D[2]
D[3]
AUDSYNC
A5[0]
A5[1]
A5[1]
CLOCK
GENERATOR
A5[20]
A5[21]
A5[21]
29-32,
75-78
44-47,
58-60
TRNRDY1,RCVRDY1
TRNEMP1,BRK1
TRNRDY2,RCVRDY2
TRNEMP2,BRK2
TRNEMP1,BRK1
TRNRDY2,RCVRDY2
TRNEMP2,BRK2
TRNRDY3,RCVRDY3
TRNEMP3,BRK3
TRNRDY4,RCVRDY4
TRNEMP4,BRK4
TRNEMP3,BRK3
TRNRDY4,RCVRDY4
TRNEMP4,BRK4
1A3
1A4
1A1
1A2
2A2
2A1
2A3
2A4
1A4
1A1
1A2
2A2
2A1
2A3
2A4
RXD1
TXD1
RXD2
TXD2
RXD3
TXD3
RXD4
TXD4
RXD2/SCPT[4]
MCS[0]/PTC[0]/PINT[0]
IRO1/IRL1/PTH[1]
IRO2/IRL2/PTH[2]
IRO2/IRL2/PTH[2]
D21/PTA[5]
D22/PTA[6]
D22/PTA[6]
RXD0/SCPT[0]
D
ADR[0-23]
ADR[0-23]
ADR[0-23]
DATA[0-15]
DATA[0-15]
DATA[0-15]
A[0-23]
RD_OPT
WR_OPT
FS_CS
SR_CS
INT_VMD
INT_1
INT_2
48
25
1
24
INT_VMD
INT_1
INT_2
INT_2
INT_1
INT_VMD
DIR_OPT
RDB
WRB
FSCS
SRCS
RDB
WRB
FSCS
SRCS
D[0-15]
O[0]-O[23]
166
172
172
TXD1/SCPT[2]
RXD1/SCPT[2]
190
189
184
189
184
94
DRAK1/PTD[0]
DRAK0/PTD[1]
DRAK0/PTD[1]
RESETOUT/PTD[2]
AUDSYNC/PTE[7]
182
191
114
192
115
191
114
192
115
WAKEUP/PTD[3]
DREQ0/PTD[4]
DACK0/PTD[5]
DREQ1/PTD[6]
DACK1/PTD[7]
187
168
32
31
30
28
26
164
168
32
31
30
28
26
164
MCS[1]/PTC[1]/PINT[1]
TXD2/SCPT[4]
D16/PTA[0]
D17/PTA[1]
D18/PTA[2]
D19/PTA[3]
D20/PTA[4]
D17/PTA[1]
D18/PTA[2]
D19/PTA[3]
D20/PTA[4]
TXD0/SCPT[0]
IC28
8-BIT BUS BUFFER
8-BIT BUS BUFFER
2
3
4
5
6
7
8
9
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
17
16
15
14
13
12
11
A1
A2
A3
A4
A5
A6
A7
A8
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
B2
B3
B4
B5
B6
B7
B8
3
IC27
ADDRESS DECODER
ADDRESS DECODER
IC23,X4
1
2
3
4
6
2
3
4
6
15
14
13
12
14
13
12
A
B
C
#G2A
#G2B
B
C
#G2A
#G2B
#Y0
#Y1
#Y2
#Y3
#Y1
#Y2
#Y3
A5[0-23]
D5[0-7]
D[0-3]
18
16
14
12
16
14
12
9
7
5
3
7
5
3
1
19
2
4
6
8
11
13
15
17
4
6
8
11
13
15
17
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1#OE
2#OE
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1#OE
2#OE
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1A2
1A3
1A4
2A1
2A2
2A3
2A4
IC25
ADDRESS DECODER
ADDRESS DECODER
1
2
3
2
3
15
14
13
12
11
10
14
13
12
11
10
A
B
C
B
C
Y0
Y1
Y2
Y3
Y4
Y5
Y1
Y2
Y3
Y4
Y5
IC31,IC32
BUS BUFFER
BUS BUFFER
B[0]-B[15]
T/#R1
T/#R2
BUF_OPT
#OE1
#OE2
2,3,5,6,8,9,
11-14,16,17,
19,20,22,23
11-14,16,17,
19,20,22,23
26,27,29,30,32,33,
35-38,40,41,43,44,46,47
A[0]-A[15]
IC33
TRANSCEIVER
TRANSCEIVER
IC26
8-BIT D-FF
8-BIT D-FF
19
18
17
16
18
17
16
11
2
3
4
5
3
4
5
1
CLK
1D
2D
3D
4D
1D
2D
3D
4D
#OE
1Q
2Q
3Q
4Q
2Q
3Q
4Q
SIO_CS
RESET5V
ALMOUT_LAT
LINESEL
LINESEL
WR1_5V
RD1_5V
19
PSD_TXD
2
PSDCOL
16
PSD2COL
15
LINESEL
20
PSD_RXD
27
CN76
CN8
DATA1_RXD
26
DATA1_TXD
11
DATA2_RXD
10
DATA2_TXD
24
DATA3_RXD
23
DATA3_TXD
7
DATA4_RXD
6
DATA4_TXD
13
CAM_TXD
14
CAM_RXD
5
PSD_EN
21
DATA4_EN
9
DATA3_EN
25
DATA2_EN
12
DATA1_EN
28
CAM_EN
22
23
29
28
2
21
7
9
9
10
12
13
15
18
20
12
13
15
18
20
6
4
22
19
14
11
8
5
17
KSK_DI
5
RD
11
PKEY4
24
PKEY3
12
PKEY2
10
KEYSCAN2
CN301
CN7
13
PKEY0
21
KEYSCAN5
25
PKEY1
18
SD
6
ALMO4
19
ALMO3
7
ALMO2
20
ALMO1
9
KEYSCAN4
22
18
6
5
4
8
2
11
3
17
16
15
14
13
10
9
KEYSCAN3
3
PKEY4
8
PKEY3
2
PKEY2
9
KEYSCAN0
CN201
CN6(b)
CN302
CN303
JK1
JK2
JK3
5
PKEY0
11
PKEY1
4
5
4
3
6
9
10
7
KEYSCAN1
5
4
FStoSX B
CN77
2
SXtoFS B
3
SXtoFS A
FStoSX A
IC51 DRIVER/RECEIVER
12
11
#RE
R
D
DE
A
B
Z
Y
2
3
3
4
5
5
10
9
IC71
DRIVER/RECEIVER
DRIVER/RECEIVER
12
11
#RE
R
A
B
2
3
3
IC62
CLASH DETECTOR
CLASH DETECTOR
CF51
CF41
CF31
CF21
CF11
CF1
9
2#Q 2#A
12
IC61 DRIVER/RECEIVER
12
11
#RE
R
A
B
2
3
3
1
1#Q 1#A
4
IC41 DRIVER/RECEIVER
SW3
TERMINATION
SELECTOR
TERMINATION
SELECTOR
SW1
TERMINATION SWITCH
TERMINATION SWITCH
SW2
LINE SELECTOR
12
11
#RE
R
D
DE
A
B
Z
Y
2
3
3
4
5
5
10
9
IC31 DRIVER/RECEIVER
11
12
#RE
R
D
DE
B
A
Z
Y
2
3
3
4
5
5
10
9
IC21 DRIVER/RECEIVER
11
12
#RE
R
D
DE
B
A
Z
Y
2
3
3
4
5
5
10
9
IC11
DRIVER/RECEIVER
DRIVER/RECEIVER
11
12
1
3
2
#RE
R
D
DE
B
A
Z
Y
2
3
3
4
5
5
10
9
IC1 DRIVER/RECEIVER
IC302 BUFFER
Q306-Q321
IC301
Q305
18
16
14
12
16
14
12
9
7
5
3
7
5
3
1
19
2
4
6
8
11
13
15
17
4
6
8
11
13
15
17
ALM[1]
ALM[2]
ALM[3]
ALM[4]
ALM[5]
ALM[6]
ALM[7]
ALM[8]
ALM[2]
ALM[3]
ALM[4]
ALM[5]
ALM[6]
ALM[7]
ALM[8]
ALMIN[1] – ALMIN[16]
ALMOUT[1] – ALMOUT[4]
ALARM RECOVER IN
ALM[9]
ALM[10]
ALM[11]
ALM[12]
ALM[13]
ALM[14]
ALM[15]
ALM[16]
ALM[10]
ALM[11]
ALM[12]
ALM[13]
ALM[14]
ALM[15]
ALM[16]
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1#OE
2#OE
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1#OE
2#OE
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1A2
1A3
1A4
2A1
2A2
2A3
2A4
IC303 BUFFER
18
16
14
12
16
14
12
10
13
13
2
5
9
12
1
4
5
9
12
1
4
1Y
2Y
3Y
4Y
2Y
3Y
4Y
1A
2A
3A
4A
2A
3A
4A
1#OE
2#OE
2#OE
3#OE
4#OE
4#OE
IC304 BUFFER
11
12
#RE
R
D
DE
B
A
Z
Y
2
3
3
4
5
5
10
9
1
2
3
4
5
6
2
3
4
5
6
7
8
9
10
11
12
8
9
10
11
12
1
2
3
4
5
6
2
3
4
5
6
7
8
9
10
11
12
8
9
10
11
12
1
2
3
4
5
6
2
3
4
5
6
4
3
3
1
2
2
2
1
1
3
4
4
1
2
2
3
4
4
1
2
2
3
4
4
1
2
2
3
4
4
1
2
2
3
4
4
8
7
7
6
5
5
8
7
7
6
5
5
8
7
7
6
5
5
8
7
7
6
5
5
8
7
7
6
5
5
8
7
7
6
5
5
7
8
9
10
11
12
8
9
10
11
12
RS485
(CAMERA)
(CAMERA)
SERIAL
ALARM
DATA1
DATA2
DATA3
DATA4/
PS•DATA
PS•DATA
DATA HDR
TO
MULTIPLEXER BOARD
MULTIPLEXER BOARD
1
2
3
4
5
6
1
2
3
7
8
9
4
5
6
10 11 12
TO
BLOCK DIA
GRAM (2/3)
TO
BLOCK DIAGRAM (2/3)
BLOCK DIAGRAM (2/3)
TO
BLOCK DIA
GRAM (2/3)
FRONT BOARD (2/2)
REAR BOARD (3/3)
MAIN BOARD (3/3)
D-SUB BOARD
SW202
UNIT
SW203
MODE
D212
1-4
4
1,2,3,5
5
6
7
8
6
7
8
9,10
8
4
2
1
8
4
2
1
PKEY[3]
PKEY[2]
PKEY[1]
PKEY[0]
PKEY[2]
PKEY[1]
PKEY[0]
PKEY[3]
PKEY[2]
PKEY[1]
PKEY[0]
PKEY[2]
PKEY[1]
PKEY[0]
5
4
3
2
1
9
8
7
6
ALARM
DRIVERS
DRIVER
Q301-Q304
SD
RD
RD
RS232C
DRIVER
RECEIVER
SD
RD
RD
DRIVERS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
CN11,CN12
CN10,CN13
Refer to Schematic Diagram of Main Board (6/6)
(MULTIPLEXER BOARD : OPTION)
Refer to Schematic Diagram of Main Board (4/6)
BLOCK DIAGRAM (3/3)
Click on the first or last page to see other WJ-SX150 / WJ-SX150A service manuals if exist.