DOWNLOAD Panasonic BB-HCM715CE / BB-HCM735CE Service Manual ↓ Size: 3.52 MB | Pages: 83 in PDF or view online for FREE

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Package: 5 pin SOT-23-5
Operation Outline: When 3.3V power starts up, it emits about 50ms reset pulse after detecting 2.9V.

Operation Outline: By pressing the Function Switch you can stop access to the SD card and then remove it.

 Operation Outline: By pressing the Factory Default Reset Switch, all of the camera's settings are reset to their factory default
settings.

Operation Outline: Restart SW (SW103) is connected to RESET IC for a manual reset, and the hardware is reset when this SW
is pressed.

Operation Outline: IC404 is RTC (Real Time Clock), and is used for time setting of image transfer, etc. This is backed up by a
lithium battery (BAT501) even at the time of power OFF. 
There is an RTC block inside IC101, and this inside RTC block operates during the existence of electricity by importing the clock
data from IC404 at the time of power ON.

Power Supply Voltage: 3.3 V 
Operation Outline: An SD memory card control block is included on IC101, and used by connecting an SD card slot (CN301)
There is a green LED (LED301) near the SD card slot, and it lights while the SD card is being accessed.

• IC202 is a vMaicovicon image sensor module with approx. 1.3 million pixels, and outputs the image signal (DOUT0-11) in 4VGA

size (1980x960).

• IC202 outputs Pixel clock (CAMCLK_48 MHz), VD,HD signals based on the timing of input Pixel clock (CLOCK_27 MHz) from

the CPU board.

• IC202 is controlled by CPU using the serial signal (RESET, CS, SI, SO, SCLK).
• IC202 required 3.3 V, 1.8 V from CPU board and 1.2 V which is sent from IC203.
• IC201 is used as the 1-Kbit EEPROM for the setting of images.
• IC201 is controlled by CPU using the I2C(SCL, SDA) signal.
• IC201 required 3.3 V for the power supply of Camera Unit. +3.3V is input from CPU unit.

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• Image compression (JPEG/MPEG-4/H.264 encode) function, memory control unit (MCU), ETHERNET MAC, and SD card con-

troller are built into IC101.

• Picture data input from the camera block is captured in SDRAM (1).
• Captured image data is input to the ZOM block, where the scaling of the image size is performed, (an image size of 640

×480,

320

× 240, or 192×144 is generated from the one with the size of 1280×960, or an image size of 640×480, 320×240 or 192×144

from the one with the size of 640

×480), and is stored in SDRAM again (2).

• The scaled image data is input to the JPEG/MPEG-4/H.264 encode section of IC101, and the image is compressed. The com-

pressed image data is stored in SDRAM again (3).

• After CPU processed the compressed image data for a communication protocol, the data is forwarded to the network via ETH-

ERNET MAC and ETHERNET PHY. And the image data of post-compression is processed for a file and is recorded on the SD
card.

• As for the video output, the captured image data is scaled to a size of NTSC or PAL at the ZOM block, and then it is output from

VIDEO OUT and DAC sections as an analog video signal.

• This analog video signal is amplified by the video amplifier (IC501) and output from CN401 on the IO board with the output

impedance of 75Ω.

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PCM Codec and Video Amplifier (IC501)
Power Supply Voltage: 3.3V
Clock Frequency: Contains a built-in PLL function and generates a clock from the 2MCLK supplied from IC101.
I/F with Host: Controlled by I2C.
Audio Block: Contains an amplifier, LPF, gain adjustment, AD/DA converter, PCM serial I/F and speaker output function.
Image Block: Contains an analogue video amplifier (6dB).

External Microphone Jack (JK503)
Used with the external microphone.
When the external microphone is not inserted, the MIC_S signal goes HIGH.
When it is inserted, the MIC_S signal goes LOW, the CPU (IC101) detects the microphone status and controls the microphone
SW on and off in the PCM Codec (IC501).

Audio Output Jack (JK504)
Used when connecting a speaker with a built-in amplifier, when the audio is output from a camera.

Analogue Video Output Jack (JK502)
Used when connecting with TV or Video equipment.

Flow of audio Signal
[Microphone audio]
The audio signal input from the built-in microphone and the external microphone is amplified by the amplifier in the PCM Codec
(IC501), with AD conversion and gain adjustment performed.
The sampling frequency of the AD conversion is 8kHz and it is converted to the PCM in the format of 8bit and 

µ law. Then,

64kbps data are output to the IC101 on the CPU board through the Serial I/F.
The data transfer of the Serial I/F is BCLK (256 kHz).

[Speaker audio]
The audio data are sent from the network and after data decompression in the Audio I/F block (IC101), the data are transferred
as the audio 64kbps data to the PCM Codec (IC501) through the Serial I/F.
After the 

µ law to linear conversion, amplification and DA conversion, they are output (JK502) as audio output signal in the PCM

Codec (IC501). 

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Composed of ETHERNET MAC Block inside the IC101 and the IC301 (ETHER-PHY) on the CPU board, and the T601 (Trans-
former) and the JK601 (RJ45 jack) on the PoE Board.
The T605 (Transformer) obtains isolation between the Set and the Ethernet.
ETHERNET MAC and the IC301 (ETHER-PHY) are connected by a signal called MIIBus and it makes Ethernet data sending
and receiving possible.
Sending
The communication data sent from the IC101 is converted to Ethernet signal (100Base-Tx, 10Base-T) at the IC301 and sent
from the JK 601 through the T601.

Receiving
The Ethernet signal received from the JK601 is converted to the communication data at the IC301 and received to the IC101.