DOWNLOAD LG 50PZ950B-SA (CHASSIS:PB12A) Service Manual ↓ Size: 13.62 MB | Pages: 90 in PDF or view online for FREE

Model
50PZ950B-SA (CHASSIS:PB12A)
Pages
90
Size
13.62 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
50pz950b-sa-chassis-pb12a.pdf
Date
PREV: LG 50PZ850-ZA / 50PZ850A-ZA / 50PZ850N-ZA (CHASSIS:PD11A) Service Manual

LG 50PZ950B-SA (CHASSIS:PB12A) Service Manual ▷ View online

2. No OSD Trouble Shooting
DDR2
512MB
DDR2
512MB
BCM35230
BCM35230
1080P
LVDS
(Front-end)
(External Input/Output)
EXT_IN
HDMI
CVBS1,2
(System +  Scalar)
BCM_I2S
Audio_AMP
STA368BWG
Audio_AMP
STA368BWG
CVBS1/LR
CVBS2/LR
COMP1_LR
COMP2_LR
RGB_LR
EXT_IN
HDMI
NAND
8Gbit
NAND
8Gbit
Ethernet
(Etc)
USB2
SPDIF
SIF_LIVE
LR1,2
IF
BCM_I2S
USB1
COMP1/2
HDMI 1.3 x 4
RGB
4:
1 
Swit
c
h
SII9287B
NEC Micom
uPD
NEC Micom
uPD
BCM_SPDIF
BCM_SPDIF
COMP_LR1,2
RGB_LR
LAN
(3DF_Block)
3D_Sync
M-R/RF Emitter
RF_Tx
M-R/RF Emitter
RF_Tx
L/R Indicator
GPIO77
LG8300_3DF_ASIC
LG8300_3DF_ASIC
1080P
1080P(L)
1080P(R)
DDR2
256Mb
DDR2
256Mb
Serial Flash
2Mbit
Serial Flash
2Mbit
3D_Sync
L/R Indicator
X-TAL
54MHz
X-TAL
54MHz
CEC Control
CVBS1/
SIF_LIVE
ISDB-T
LGIT
TDTR-T036F
IF
CABLE
HDMI
Wireless 
RX Box
M-Remote 
Module
UART
Replace Power board
N
Y
Check 5V Voltage Level
at P500
Check Power connector
Y
Check all multi voltage
(0.9v, 3.3v, 1.5v)
N
Check power up boot sequence
Y
Check P202
(TXAC-), (TXAC+), (TXBC-), 
(TXBC+)
N
Y
Check LVDS Cable
N
Replace Cable
Y
Check PDP Module
Check 5V Voltage Level
at L501
N
Replace one of L501
& Recheck
Y
Maybe BCM35230 (IC101)
has troubles
It should satisfy the 
Pixel Clock
on CAS.
Electrical Specifications
Power Supply Sequence
Input Signal Timing Specification
Control Signal Register
Check CAS
Check P500 5V_ON
Check P202 DISP_EN
Check GPIO Path of  Micom
N
Y
2. No OSD Trouble Shooting
No OSD Trouble Shooting (Module Power Sequence)
Module Control Trouble Shooting
“TILT” on Adjust Remocon
: PDP internal pattern displays? 
PDP Module Power is OK?
N
PDP Module is OK.
Check P202 SCL,SDA line SCL,SDA 
line R244, R252
Check Signal
: X1 output
N
Y
SCL (continue)
SDA (continue)
ACK
By Slave
9
1
D0
D7
9
ACK
By Slave
Command Data
for Addr
Stop
By Master
D6
SCL
8
SDA
0
0
1
1
1
A7
W
Start
By 
Master
Chip ID Address Byte
(0x1C)
ACK
By Slave
0
1
9
1
A6
A1
A0
Command Address
Addr=A[7:0]
0
Write
only
Master : Image Board
Slave : PDP Module
< Sample Signal on R244, R252 >
SCL
SDA
ACK
signal Check
Low : 
OK
High : 
Error
Replace X1
N
Check SMPS & cable
N
Y
Replace PDP Module
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