DOWNLOAD LG 50PZ950B-SA (CHASSIS:PB12A) Service Manual ↓ Size: 13.62 MB | Pages: 90 in PDF or view online for FREE

Model
50PZ950B-SA (CHASSIS:PB12A)
Pages
90
Size
13.62 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
50pz950b-sa-chassis-pb12a.pdf
Date
PREV: LG 50PZ850-ZA / 50PZ850A-ZA / 50PZ850N-ZA (CHASSIS:PD11A) Service Manual

LG 50PZ950B-SA (CHASSIS:PB12A) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
TW9910_DATA[2]
TW9910_DATA[5]
TW9910_DATA[2]
TW9910_DATA[3]
TW9910_DATA[7]
TW9910_DATA[1]
TW9910_DATA[1]
TW9910_DATA[5]
TW9910_DATA[7]
TW9910_DATA[4]
TW9910_DATA[0]
TW9910_DATA[3]
TW9910_DATA[0]
TW9910_DATA[4]
TW9910_DATA[6]
TW9910_DATA[6]
C2730
0.1uF
KOR
L2701
BLM18PG121SN1D
KOR
C2729
0.1uF
KOR
C2720
0.1uF
16V
KOR
C2727
10uF
10V
KOR
C2724
0.1uF
16V
KOR
C2725
0.1uF
16V
KOR
L2702
BLM18PG121SN1D
KOR
C2726
0.1uF
16V
KOR
C2721
10uF
10V
KOR
+1.8V_CHB
C2722
10uF
10V
KOR
+3.3V_Normal
+3.3V_CHB
+3.3V_CHB
C2728
10uF
10V
KOR
R2722
0
KOR
R2723
0
KOR
C2709
0.1uF
C2705
0.1uF
CHB_RESET
AR2700
22
CHB_TS_VAL
R2712
100
C2706
0.1uF
C2717
30pF
C2732
0.1uF
+1.8V_ADC
SDA1_3.3V
R2709
2.7K
R2711
100
CHB_TS_CLK
+1.8V_ADC
SDA1_3.3V
CHBO_TS_CLK
SCL1_3.3V
R2701
0
C2718
0.1uF
R2707
1M
R2710
12
TW9910_CLK
R2702
100
C2719
0.1uF
R2704
100
R2713
1M
IC2701
LG1140
EAN60750501
1
VDDIO_1
2
D1_DATA4
3
D1_DATA3
4
D1_DATA2
5
VSSIO_1
6
D1_CLK
7
D1_DATA1
8
VDDCORE_1
9
VSSCORE_1
10
D1_DATA0
11
CI0_CLK
12
CI0_DATA
13
CI0_VALID
14
CI0_SOP
15
VDDIO_2
16
CI1_DATA
17
CI1_VAILD
18
CI1_CLK
19
CI1_SOP
20
SDA0
21
SCL0
22
VDDCORE_2
23
SCK
24
SS
25
VSSIO_2
26
MISO
27
MOSI
28
SPI_MODE[0]
29
VDDIO_3
30
SPI_MODE[1]
31
CTL2/FLAGC
32
VCC_4
33
PA0/INT0#
34
PA1/INT1#
35
VDDCORE_3
36
VSSCORE_2
37
PA4/FIFOADR0
38
TSVO0_CLK
39
VSSIO_3
40
TSVO0_SOP
41
TSVO0_DATA
42
IRQ_CHB_N
43
SPLL_AVSS
44
SPLL_AVDD
45
VDDIO_XTAL
46
XTAL27I
47
XTAL27O
48
VDDCORE_4
49
VSSCORE_3
50
TMOD
51
EXT_RESET_N
52
TRST
53
TCK
54
D1_DATA7
55
D1_DATA6
56
D1_DATA5
X2700
27MHz
C2704
0.1uF
R2703
100
C2714
30pF
C2713
0.1uF
C2703
0.1uF
C2711
0.1uF
C2715
0.1uF
TW9910_CLK
CHB_TS_SYNC
+3.3V_CHB
X2701
27MHz
CHBO_TS_SERIAL
+3.3V_Normal
C2710
0.1uF
AR2701
22
C2702
0.1uF
R2714
22
C2708
27pF
CHBO_TS_SYNC
C2700
0.1uF
+3.3V_ADC
+1.8V_CHB
IC2700
TW9910DANB2-GR 
0IPRP00630E
1
VDDE_1
2
SCLK
3
SDAT
4
PDN
5
RSTB
6
TMODE
7
NC_1
8
AVD_1
9
YMUX3
10
YMUX2
11
YGND
12
YMUX1
13
YMUX0
14
AVS_1
15
CIN0
16
AVD_2
17
AVS_2
18
NC_2
19
VSS_1
20
VS
21
HS
22
MPOUT
23
CLKX2
24
VSSE_1
25
VDDE_2
26
VD[15]
27
VD[14]
28
VD[13]
29
VD[12]
30
VD[11]
31
NC_3
32
VDD
33
VD[10]
34
VD[9]
35
VD[8]
36
VD[7]
37
VD[6]
38
VD[5]
39
VD[4]
40
VD[3]
41
VD[2]
42
VSS_2
43
NC_4
44
VD[1]
45
VD[0]/SIAD0
46
VSSE_2
47
XTI
48
XTO
TW9910_RESET
CHB_TS_DATA
C2707
27pF
R2700
2.7K
CHBO_TS_VAL_ERR
C2701
0.1uF
TW9910_DATA[0-7]
SCL1_3.3V
C2712
0.1uF
R2708
100
TW9910_DATA[0-7]
+3.3V_Normal
C2731
0.1uF
R2705
4.7K
R2706
0
C2716
0.1uF
+3.3V_ADC
CHB_CVBS
+1.8V_ADC
+3.3V_ADC
C2723
47uF
16V
KOR
IC2702
AZ1117BH-1.8TRE1
KOR
2
OUT
3
IN
1
ADJ/GND
POWER for CHB
BCM35230
GCHB
27
31
CHANNEL BROWSER
TS Output
0x88
CLOSE TO SOC
CLOSE TO SOC
0xF2
CHB TS Input
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
C3017
0.1uF
16V
C3009
0.1uF
X3000
25MHz
C
3
0
0
0
0
.
1
u
F
1
6
V
R3011
22
C3006
0.1uF
R3001 100
C3021
0.1uF
16V
IC3000
MN884433
OPT
1
VSS_1
2
AVDD_S
3
AII_S
4
AIQ_S
5
AVSS_S
6
VRT_S
7
VRB_S
8
TCPO_S
9
VDDL_1
10
MSCL_S
11
MSDA_S
12
VSS_2
13
VSSH
14
PSEL
15
ZSEL
16
VDDL_2
17
ACKI
18
TCPO_T
19
IR_T
20
VRT_T
21
VRB_T
22
AVDD_T
23
AIN_T
24
AIP_T
25
AVSS_T
26
VSS_3
27
MSCL_T
28
MSDA_T
29
VDDH_1
30
GPO1
31
AGCI_T
32
AGCR_T
33
GPO0
34
VDDL_3
35
VSS_4
36
XO
37
XI
38
VDDH_2
39
GPI1
40
GPI0
41
TEST4
42
SHVPP
43
SHVDDH
44
NC_1
45
VSS_5
46
VDDL_4
47
TCK
48
TDI
49
NRST
50
TEST3
51
VSS_6
52
VDDL_5
53
TRST
54
TMS
55
CSEL0
56
CSEL1
57
TDO
58
SYNCA
59
ERRA
60
SYNCB
61
ERRB
62
VSS_7
63
VDDL_6
64
SADR_T
65
NC_2
66
SADR_S
67
HDVDDL0
68
VSS_8
69
SDA
70
SCL
71
VDDH_3
72
SADR
73
INTA
74
INTB
75
VSS_9
76
TEST1
77
TEST2
78
SCKA
79
GPI2
80
SDOA
81
PCKA
82
DENA
83
VDDH_4
84
VSS_10
85
HDVPP
86
RON
87
NC_3
88
HDVDDH
89
NC_4
90
HDVDDL1
91
VSS_11
92
VDDL_7
93
SCKB
94
TEST0
95
SDOB
96
PCKB
97
DENB
98
GPO2
99
VDDH_5
100
AGC_S
R3015
22
C3020
0.01uF
50V
R3005
10K
R3012
22
C3022
0.1uF
16V
DEMOD_RESET
C3027
0.1uF
C3014
0.1uF
16V
C3003
0.1uF
FE_TS_SERIAL
C3024
0.1uF
R3010
22
FE_TS_CLK
C3004
0.1uF
R3000 100
R3003 2.2K
R3009
22
C3007
0.1uF
C3015
1uF
25V
R3016
2.2K
OPT
C3008
0.1uF
C3010
0.1uF
16V
TUNER_IF_N
ISDB_IF_AGC
C3013
0.1uF
16V
R3007
2.2K
R3008
1M
C
3
0
0
1
0
.
1
u
F
1
6
V
R3004 2.2K
FE_TS_VAL
C3016
30pF
50V
C3025
0.1uF
R3014
22
C3012
30pF
50V
C3018
0.1uF
16V
R3006
2.2K
C3019
1uF
25V
C3023
0.1uF
16V
C3011
0.1uF
16V
C3028
0.1uF
16V
R3013
2.7K
OPT
C3026
0.1uF
C3005
0.1uF
FE_TS_SYN
TUNER_IF_P
C3002
0.1uF
R3002
10K
1%
R3017
2.2K
OPT
+3.3V_TU
C3031
0.1uF
+3.3V_SBTVD
C3030
0.1uF
C3029
0.1uF
+1.2V_SBTVD
C3033
0.1uF
C3032
10uF
10V
L3000
BLM18PG121SN1D
L3001
BLM18PG121SN1D
SDA1_3.3V
SCL1_3.3V
+3.3V_Normal
+3.3V_Normal
+1.2V_SBTVD
+3.3V_SBTVD
+1.26V_TU
ATSC demod
31
31
BCM35230
< PANASONIC Demod.>
Close to the demod
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
MAIN_DDR_A[5]
MAIN_SDDR_DQ[10]
MAIN_SDDR_DQ[0]
MAIN_DDR_A[11]
MAIN_DDR_A[7]
MAIN_SDDR_DQ[3]
MAIN_SDDR_DQ[2]
MAIN_SDDR_DQ[12]
MAIN_SDDR_DQ[6]
MAIN_SDDR_DQ[9]
MAIN_DDR_A[9]
MAIN_DDR_A[8]
MAIN_SDDR_DQ[1]
MAIN_DDR_A[1]
MAIN_SDDR_DQ[14]
MAIN_SDDR_DQ[11]
MAIN_SDDR_DQ[8]
MAIN_DDR_A[6]
MAIN_DDR_A[12]
MAIN_SDDR_DQ[13]
MAIN_SDDR_DQ[15]
MAIN_SDDR_DQ[5]
MAIN_DDR_A[3]
MAIN_DDR_A[10]
MAIN_DDR_A[2]
MAIN_SDDR_DQ[7]
MAIN_DDR_A[4]
MAIN_DDR_A[0]
MAIN_SDDR_DQ[4]
TE2+
C3202
100pF
50V
TD2+
MAIN_DDR_DQS[1]
FLASH_WP_3D
TB3-
TD3-
TE3+
R3285
0
TB1+
TA1+
TA3+
MOD_ROM_RX
TE4+
R3282
1M
1%
TCLK1-
TE1-
R3281
0
SW3200
JTP-1127WEM
OPT
1
2
4
3
R3299
4.7K
TB2-
TE2+
TXA4N
TA4-
TC1-
TXA3N
TCLK4-
MAIN_DDR_BA[1]
/SPI_CS
TMODE[1]
TXB1N
TXB4P
TCLK2+
R3264
10K
OPT
C3201
0.1uF
16V
TCLK4-
R3273
100
C3200
10uF
10V
R3277
100
MOD_SDA
TCLK3-
/MAIN_DDR_CS
TMODE[3]
TC4-
MOD_SCL
TD1+
R3275
100
MAIN_SDDR_DQ[15-0]
TCLK2-
TXB3N
TXA2N
TC2-
TB4+
TC1-
TA4+
TXACLKN
R3291
3.3K
TCLK4+
R3249
22
MAIN_DDR_DQS[0]
L3200
CB4532UK121E
EAM38058401
TD3+
MAIN_DDR_BA[0]
TXB3P
TMODE[1]
MAIN_DDR2_CLK
TXB4N
TC3-
TB4-
TA3+
+5V_3D
TE4-
3V3
MAIN_DDR_DM[0]
/MAIN_DDR_CAS
TC1+
TD4-
R3245
22
TD3+
TXA0N
R3272
100
X3200
25MHz
TXB2P
R3290
3.3K
OPT
MOD_SDA
P3200
104060-8017
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
TXACLKP
C3210
0.1uF
16V
TB1-
DISP_EN
TE2-
TE3+
TXA1N
TC3-
R3265
10K
TCLK2+
Q3204
KRC103S
OPT
E
B
C
TCLK1+
R3278
0
TA2+
R3295
3.3K
OPT
/3D_ASIC_RESET
TA3-
TB3+
TE3-
R3241
4.7K
TMODE[3]
TCLK3-
TCLK3+
TE4+
R3242
3.3K
MAIN_DDR_A[12-0]
R3296
3.3K
TXB0P
R3292
3.3K
OPT
TA4+
TE1+
3D_SYNC_OUT
SPI_DO
TXA2P
R3240
4.7K
TA4-
TD1+
PC_SER_CLK
TE2-
MAIN_DDR_DM[1]
TCLK2-
/3D_ASIC_RESET_SWITCH
TD2-
/MAIN_DDR_WE
R3267
100
TCLK4+
R3248
22
R3288
3.3K
TXA1P
MAIN_DDR2_CKE
R3247
22
R3252
22
R3287
3.3K
OPT
PC_SER_DATA
TA1-
TB1-
TXB0N
TB4-
/MAIN_DDR_RAS
SPI_CK
R3239
10K
TB2+
TMODE[0]
R3234
22
R3266
100
TA1-
TXA0P
R3233
4.7K
TMODE[0]
TD4+
R3231
4.7K
TB3-
R3255
22
TD1-
3V3
R3286
0
TC1+
TXBCLKP
SPI_DI
TA2+
TB2+
R3251
22
TD4-
TXB1P
TD2-
TE1-
R3279
0
R3258
22
TC2+
R3271
100
R3276
100
MOD_SCL
TMODE[2]
TC3+
TB1+
SPI_DI
R3268
100
R3283
0
R3269
100
R3250
22
/MAIN_DDR2_CLK
R3253
22
R3293
3.3K
R3284
0
TC2+
C3204
0.1uF
16V
TC2-
TE4-
TCLK1+
TXBCLKN
R3243
22
R3289
330
TA1+
R3246
22
TD4+
/SPI_CS
TA2-
3V3
R3294
1K
TE3-
/MAIN_DDR_DQS[1]
TB3+
R3254
22
SPI_DO
TXA4P
TD1-
TC4-
MOD_ROM_TX
TMODE[2]
MAIN_DDR2_ODT
TA2-
P_+5V
R3257
22
3V3
R3280
0
TD2+
R3274
100
MOD_SDA
SPI_CK
TE1+
TC4+
R3270
100
TXA3P
TA3-
TD3-
TCLK1-
3V3
IC3204
KIA7029AF
2
G
3
O
1
I
TC3+
TB4+
TB2-
TC4+
R3244
22
TCLK3+
/MAIN_DDR_DQS[0]
3V3
/3D_ASIC_RESET_SWITCH
TXB2N
MOD_SCL
R3259
0
M_REMOTE_TX
+3.3V_Normal
MOD_ROM_TX
REMOTE_OR_MODULE_RX
MOD_ROM_RX
R3263
47K
OPT
REMOTE_SW_CTRL
R3262
4.7K
+3.3V_Normal
REMOTE_OR_MODULE_TX
IC3203
MC14053BDR2G
3
Z1
2
Y0
4
Z
1
Y1
6
INH
5
Z0
7
VEE
8
VSS
9
C
10
B
11
A
12
X0
13
X1
14
X
15
Y
16
VDD
R3260
0
OPT
M_REMOTE_RX
R3261
0
OPT
C3205
0.1uF
C3203
0.01uF
OPT
R3235
10K
OPT
R3236
22K
OPT
3D_SYNC_OUT
R3238
0
3D_SYNC
R3237
220
OPT
Q3203
OPT
AO3407A
G
D
S
3V3
2N7002(F)
Q3200
OPT
G
D
S
R3228
4.7K
OPT
R3200
4.7K
OPT
3V3
R3201
0
OPT
R3203
4.7K
OPT
R3232
4.7K
OPT
R3229
0
OPT
2N7002(F)Q3201
OPT
G
D
S
R3202
0
R3230
0
R3300
3.3K
OPT
3.3K
R3301
OPT
3V3
3V3
IC3201
W25X20BVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
C3208
10uF
16V
R3204
0
1/16W
5%
C
3
2
0
6
2
7
p
F
C
3
2
0
7
2
7
p
F
R3206
22
R3205
22
L/R_INDICATOR
FLASH_WP_3D
JTAG_TMS
R3211
22
JTAG_TDI
R3209
22
R3207
22
/JTAG_TRST
JTAG_TDO
R3208
22
R3210
22
JTAG_TCLK
JTAG_TDI
R3214
3.3K
R3215
3.3K
R3217
3.3K
JTAG_TDO
R3219
1K
R3213
3.3K
R3216
3.3K
R3218
0
JTAG_TMS
R3212
3.3K
OPT
JTAG_TCLK
/JTAG_TRST
3V3
P3201
YFDW254-14S
OPT
14
VIO
9
TCK
4
GND
13
DINT
8
GND
3
TDI
12
NC
7
TMS
2
GND
11
nRST
6
GND
1
nTRST
10
GND
5
TDO
R3221
3.3K
OPT
R3220
2.7K
OPT
R3222
3.3K
OPT
3V3
R3223
2.7K
OPT
IC3202
LG8300
TE4P
B2
TE4N
B1
TD4P
B3
TD4N
C3
TCLK4P
C1
TCLK4N
C2
TC4P
D2
TC4N
D1
TB4P
D3
TB4N
E3
TA4P
E1
TA4N
E2
TE3P
F2
TE3N
F1
TD3P
F3
TD3N
G3
TCLK3P
G1
TCLK3N
G2
TC3P
H2
TC3N
H1
TB3P
H3
TB3N
J3
TA3P
J1
TA3N
J2
TE2P
K2
TE2N
K1
TD2P
K3
TD2N
L3
TCLK2P
L1
TCLK2N
L2
TC2P
M2
TC2N
M1
TB2P
M3
TB2N
N3
TA2P
N1
TA2N
N2
TE1P
P2
TE1N
P1
TD1P
P3
TD1N
R3
TCLK1P
R1
TCLK1N
R2
TC1P
T2
TC1N
T1
TB1P
T3
TB1N
U3
TA1P
U1
TA1N
U2
DDR_ADDR[0]
U5
DDR_ADDR[1]
V8
DDR_ADDR[2]
V5
DDR_ADDR[3]
U8
DDR_ADDR[4]
R6
DDR_ADDR[5]
T8
DDR_ADDR[6]
T6
DDR_ADDR[7]
R8
DDR_ADDR[8]
R7
DDR_ADDR[9]
U7
DDR_ADDR[10]
R9
DDR_ADDR[11]
T7
DDR_ADDR[12]
V7
DDR_BA[0]
U9
DDR_BA[1]
T9
DDR_CK
V6
DDR_CK_N
U6
DDR_CKE
V9
DDR_CS_N
R5
DDR_ODT
U4
DDR_RAS_N
V4
DDR_CAS_N
T5
DDR_WE_N
R10
DDR_DQS[0]
V14
DDR_DQS[1]
V12
DDR_DQS_N[0]
U14
DDR_DQS_N[1]
U12
DDR_DM[0]
R15
DDR_DM[1]
T12
DDR_DQ[0]
V15
DDR_DQ[1]
T15
DDR_DQ[2]
U16
DDR_DQ[3]
T16
DDR_DQ[4]
R16
DDR_DQ[5]
V16
DDR_DQ[6]
T14
DDR_DQ[7]
U15
DDR_DQ[8]
T13
DDR_DQ[9]
V11
DDR_DQ[10]
U13
DDR_DQ[11]
U11
DDR_DQ[12]
T11
DDR_DQ[13]
V13
DDR_DQ[14]
R12
DDR_DQ[15]
R13
DDR_TAOUT
U10
DDR_TDOUT[0]
T10
DDR_TDOUT[1]
V10
RA1N
U18
RA1P
U17
RB1N
T18
RB1P
T17
RC1N
R18
RC1P
R17
RCLK1N
P18
RCLK1P
P17
RD1N
N18
RD1P
N17
RE1N
M18
RE1P
M17
RA2N
L18
RA2P
L17
RB2N
K18
RB2P
K17
RC2N
J18
RC2P
J17
RCLK2N
H18
RCLK2P
H17
RD2N
G18
RD2P
G17
RE2N
F18
RE2P
F17
CLK_XIN
A17
CLK_XOUT
B18
PO_RST_N
B17
LR_SYNC
V2
EMITTER_PULSE
V3
UART_TXD
A16
UART_RXD
B16
SPI_CS
C16
SPI_SCLK
D16
SPI_DO
A15
SPI_DI
B15
SCL
C15
SDA
D15
SCL_M
A14
SDA_M
B14
GPIO[0]
C14
GPIO[1]
D14
GPIO[2]
A13
GPIO[3]
B13
GPIO[4]
C13
GPIO[5]
D13
GPIO[6]
A12
GPIO[7]
B12
GPIO[8]
C12
GPIO[9]
D12
GPIO[10]
A11
GPIO[11]
B11
GPIO[12]
C11
GPIO[13]
D11
GPIO[14]
A10
GPIO[15]
B10
GPIO[16]
C10
GPIO[17]
D10
GPIO[18]
A9
GPIO[19]
B9
GPIO[20]
C9
GPIO[21]
D9
GPIO[22]
A8
GPIO[23]
B8
GPIO[24]
C8
GPIO[25]
D8
GPIO[26]
A7
GPIO[27]
B7
GPIO[28]
C7
GPIO[29]
D7
GPIO[30]
A6
GPIO[31]
B6
TDI
C6
TMS
D6
TRST
A5
TDO
B5
TCK
C5
TEST_SE
D5
TMODE[0]
A4
TMODE[1]
B4
TMODE[2]
C4
TMODE[3]
D4
BOOT_SEL
A3
UART_TXD_3D
UART_RXD_3D
R3256
22
Q3202
OPT
MMBT3904(NXP)
E
B
C
1001
BOOT_SEL
DISP PLL Test Mode
EJTAG
SSPLL Test Mode
0110
DDR2PHY Test Mode
Serial FLASH MEMORY
for BOOT
Function Test Mode
Scan Test Mode (Adaptive)
0101
BOOT MODE
0000
0011
Scan Test Mode (Normal)
LVDS_RX Test Mode
0010
2Mb(256KB) serial Flash
Low
LVDS OUTPUT
WITH SPI Flash ROM
Normal Mode
3D_SYNC_IN
LVDS_TX Test Mode
High
N.C.
TMODE[3:0]
WITHOUT SPI Flash ROM
MBIST Mode
1011
OPERATIONAL MODE
0001
0100
0111
RS232C
33
3D_ASIC
BCM35230
32
LOW
M_REMOTE CONNECT --> BCM UART
STATUS
WIRELESS_SW_CTRL
X1/Y1/Z1
X0/Y0/Z0
HIGH
MODULE ROM DL CONNECT --> BCM UART
M_REMOTE & MOD_ROM_DL
SELECT PIN
EJTAG
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
MAIN_SDDR_DQ[11]
SDDR_DQ[7]
SDDR_DQ[3]
SDDR_DQ[15]
MAIN_SDDR_DQ[0]
DDR_A[12]
SDDR_DQ[5]
DDR_A[11]
SDDR_DQ[1]
SDDR_DQ[14]
DDR_A[5]
DDR_A[7]
SDDR_DQ[8]
MAIN_SDDR_DQ[10]
SDDR_DQ[12]
SDDR_DQ[10]
SDDR_DQ[13]
MAIN_SDDR_DQ[8]
SDDR_DQ[0]
MAIN_SDDR_DQ[4]
DDR_A[2]
MAIN_SDDR_DQ[2]
DDR_A[3]
SDDR_DQ[2]
MAIN_SDDR_DQ[13]
DDR_A[9]
SDDR_DQ[9]
SDDR_DQ[4]
SDDR_DQ[8]
SDDR_DQ[11]
SDDR_DQ[7]
SDDR_DQ[2]
SDDR_DQ[4]
DDR_A[10]
MAIN_SDDR_DQ[6]
MAIN_SDDR_DQ[1]
MAIN_SDDR_DQ[9]
SDDR_DQ[13]
SDDR_DQ[14]
DDR_A[8]
DDR_A[0]
MAIN_SDDR_DQ[5]
SDDR_DQ[15-0]
SDDR_DQ[12]
SDDR_DQ[5]
DDR_A[6]
MAIN_SDDR_DQ[3]
SDDR_DQ[9]
SDDR_DQ[10]
SDDR_DQ[1]
SDDR_DQ[0]
SDDR_DQ[6]
DDR_A[4]
SDDR_DQ[6]
DDR_A[1]
MAIN_SDDR_DQ[12]
MAIN_SDDR_DQ[7]
SDDR_DQ[3]
SDDR_DQ[15]
MAIN_SDDR_DQ[15]
MAIN_SDDR_DQ[14]
SDDR_DQ[11]
C1806
0.1uF
16V
MAIN_DDR_DQS[1]
C1816
0.1uF
16V
DDR_DQS[1]
C1777
0.1uF
16V
C1810
0.1uF
16V
C1745
0.1uF
16V
C1790
0.1uF
16V
L1708
120-ohm
C1770
0.1uF
16V
MAIN_DDR_A[5]
C1821
10uF
10V
C1786
0.1uF
16V
DDR_A[2]
DDR_VREF0_3D
3V3_LTX_AVDD33
LTX_VDD10
MAIN_DDR_A[7]
/DDR_CS
R1703
10K
R1700
100
C1773
10uF
10V
1V8
1V8
C1820
10uF
10V
C1818
10uF
10V
DDR_A[1]
DDR_BA[1]
/DDR_DQS[1]
C1765
0.1uF
16V
DDR_DQS[0]
C1795
0.1uF
16V
C1813
0.1uF
16V
/MAIN_DDR_CS
C1720
0.1uF
16V
ASIC_DDR_DM[0]
3V3_LRX_AVDD33
DDR_A[12]
VDD_3.3V
C1768
0.1uF
16V
C1766
0.1uF
16V
MAIN_DDR_BA[0]
/MAIN_DDR_CAS
C1749
0.1uF
16V
/DDR_WE
C1775
10uF
10V
VDD_3.3V
AR308
22
3V3_LTX_AVDD33
C1890
0.1uF
16V
/DDR2_CLK
MAIN_DDR_DQS[0]
C1756
0.1uF
16V
MAIN_DDR_A[8]
C1787
0.1uF
16V
C1704
10uF
10V
PLL_VDD_3.3V
C1815
0.1uF
16V
C1719
100pF
50V
MAIN_DDR2_ODT
C1853
0.1uF
16V
C1767
0.1uF
16V
C1796
0.1uF
16V
C1761
0.1uF
16V
C1792
0.1uF
16V
DDR_BA[0]
DDR_A[6]
DDR_BA[0]
C1801
0.1uF
16V
C1751
0.1uF
16V
MAIN_DDR2_CKE
MAIN_DDR_DM[1]
MAIN_DDR_A[1]
C1889
0.1uF
16V
/MAIN_DDR_DQS[1]
MAIN_DDR_A[6]
/DDR_DQS[0]
DDR_A[8]
DDR_A[10]
C1785
0.1uF
16V
MAIN_DDR_A[0]
DDR_A[5]
/DDR_CAS
C1701
10uF
10V
C1779
0.1uF
16V
DDR2_ODT
DDR_BA[1]
AR302
22
L1700
CIC21J501NE
C1794
0.1uF
16V
ASIC_DDR_DM[1]
/DDR_DQS[1]
AR304
22
DDR_A[4]
DDR2_ODT
1V0
R1704
9.1K
DDR_A[11]
C1759
0.1uF
16V
AR307
22
C1812
0.1uF
16V
C1793
0.1uF
16V
C1781
0.1uF
16V
AR303
22
C1789
0.1uF
16V
C1725
0.1uF
16V
C1784
0.1uF
16V
C1809
0.1uF
16V
DDR2_CKE
C1769
10uF
10V
MAIN_DDR_A[11]
3V3
+5V_3D
/DDR_RAS
C1746
0.1uF
16V
R1707
12K
1%
1V0
C1808
0.1uF
16V
L
1
7
0
3
M
L
B
-
2
0
1
2
0
9
-
0
1
2
0
P
-
N
2
C1742
0.1uF
16V
C1727
0.1uF
16V
AR309
22
C1731
0.1uF
16V
C1807
0.1uF
16V
DDR_DQS[1]
C1800
0.1uF
16V
/DDR_WE
C1780
0.1uF
16V
C1797
0.1uF
16V
C1723
10uF
10V
C1819
10uF
10V
MAIN_DDR_A[3]
/MAIN_DDR_DQS[0]
C1711
470pF
50V
C1772
10uF
10V
R352
22
C1802
0.1uF
16V
C1771
10uF
10V
C1764
0.1uF
16V
MAIN_DDR_BA[1]
/MAIN_DDR2_CLK
C1763
0.1uF
16V
MAIN_DDR2_CLK
C1776
0.1uF
16V
DDR2_CKE
C1817
0.1uF
16V
C1788
0.1uF
16V
MAIN_DDR_A[2]
C1714
22uF
10V
L1711
120-ohm
AR305
22
ASIC_DDR_DM[0]
PLL_VDD_3.3V
DDR2_CLK
MAIN_DDR_A[9]
C1805
0.1uF
16V
AR301
22
C1783
0.1uF
16V
1V0
L1702
3.6uH
NR8040T3R6N
C1799
0.1uF
16V
C1774
10uF
10V
L1712
120-ohm
MAIN_DDR_A[4]
DDR_A[0]
C1738
0.1uF
16V
C1713
2200pF
C1778
0.1uF
16V
C1710
0.1uF
16V
1V8
C1782
0.1uF
16V
1V0
MAIN_DDR_A[10]
1V8
DDR_VREF_LG8300
/DDR_RAS
/DDR_DQS[0]
R1705
10K
OPT
3V3_LRX_AVDD33
DDR_VREF_LG8300
/DDR2_CLK
/MAIN_DDR_RAS
MAIN_DDR_A[12]
/DDR_CAS
C1798
0.1uF
16V
DDR_DQS[0]
DDR2_CLK
C1762
0.1uF
16V
C1814
0.1uF
16V
AR306
22
MAIN_SDDR_DQ[15-0]
DDR_A[9]
LTX_VDD10
C1739
0.1uF
16V
MAIN_DDR_DM[0]
C1718
100pF
50V
OPT
C1804
0.1uF
16V
L1710
120-ohm
C1728
0.1uF
16V
C1709
0.1uF
16V
L1709
120-ohm
DDR_A[3]
ASIC_DDR_DM[1]
C1791
0.1uF
16V
/MAIN_DDR_WE
C1803
0.1uF
16V
R1708
3.3K
1%
/DDR_CS
C1811
0.1uF
16V
DDR_A[7]
DDR_A[12-0]
R351
22
R348
22
R346
22
R344
22
R345
22
R347
22
R350
22
R349
22
R359
0
C3307
0.1uF
16V
R360
0
R361
1
C3305
0.1uF
16V
C3304
22uF
25V
OPT
1V8
3V3
IC1702
W9725G6JB-25
J2
VREF
J8
CLK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CLK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC1704
AZ1117BH-1.8TRE1
OUT
IN
ADJ/GND
LG8300
IC3202
VDD10_1
F6
VDD10_2
F13
VDD10_3
G6
VDD10_4
G7
VDD10_5
G8
VDD10_6
G9
VDD10_7
G10
VDD10_8
G11
VDD10_9
G12
VDD10_10
G13
VDD10_11
H6
VDD10_12
H13
VDD10_13
J6
VDD10_14
J13
VDD10_15
K6
VDD10_16
K13
VDD10_17
L6
VDD10_18
L7
VDD10_19
L8
VDD10_20
L9
VDD10_21
L10
VDD10_22
L11
VDD10_23
L12
VDD10_24
L13
VDD10_25
M6
VDD10_26
M13
LTX_VDD10_1
H5
LTX_VDD10_2
J5
LTX_VDD10_3
K5
LTX_VDD10_4
L5
LTX_VDD10_5
M5
VDD33_1
E5
VDD33_2
E6
VDD33_3
E7
VDD33_4
E8
VDD33_5
E9
VDD33_6
E10
VDD33_7
E11
VDD33_8
E12
VDD33_9
E13
VDD33_10
E14
VDD33_11
E15
VDD33_12
F15
VDD33_13
G15
LRX_AVDD33_1
L16
LRX_AVDD33_2
N16
LTX_AVDD33_1
E4
LTX_AVDD33_2
G4
LTX_AVDD33_3
L4
LTX_AVDD33_4
N4
LTX_AVDD33_5
J4
DDR_VREF0
T4
DDR_VREF1
R11
DDR_VREF2
V17
DDR_VDDQ_1
N7
DDR_VDDQ_2
N8
DDR_VDDQ_3
N9
DDR_VDDQ_4
N10
DDR_VDDQ_5
N11
DDR_VDDQ_6
N12
DDR_VDDQ_7
N13
DDR_VDDQ_8
N14
DDR_VDDQ_9
P6
DDR_VDDQ_10
P7
DDR_VDDQ_11
P8
DDR_VDDQ_12
P9
DDR_VDDQ_13
P10
DDR_VDDQ_14
P12
DDR_VDDQ_15
P13
DDR_VDDQ_16
P14
DDR_VDDQ_17
P15
GND_1
F5
GND_2
F7
GND_3
F8
GND_4
F9
GND_5
F10
GND_6
F11
GND_7
F12
GND_8
F14
GND_9
G5
GND_10
G14
GND_11
G16
GND_12
H7
GND_13
H8
GND_14
H9
GND_15
H10
GND_16
H11
GND_17
H12
GND_18
H14
GND_19
H15
GND_20
H16
GND_21
J7
GND_22
J8
GND_23
J9
GND_24
J10
GND_25
J11
GND_26
J12
GND_27
J14
GND_28
J15
GND_29
J16
GND_30
K7
GND_31
K8
GND_32
K9
GND_33
K10
GND_34
K11
GND_35
K12
GND_36
K14
GND_37
K15
GND_38
K16
GND_39
L14
GND_40
L15
GND_41
M7
GND_42
M8
GND_43
M9
GND_44
M10
GND_45
M11
GND_46
M12
GND_47
M14
GND_48
M15
GND_49
N5
GND_50
N6
GND_51
N15
GND_52
P5
GND_53
P11
GND_54
R4
GND_55
R14
LRX_AVSS33_1
M16
LRX_AVSS33_2
P16
LTX_AVSS33_1
F4
LTX_AVSS33_2
H4
LTX_AVSS33_3
K4
LTX_AVSS33_4
M4
LTX_AVSS33_5
P4
DDRPLL_AVSS33
C17
SYSPLL_AVSS33
D17
ADPLL_AVSS33
E16
SSPLL_AVSS33
F16
DDRPLL_AVDD33
C18
SYSPLL_AVDD33
D18
SSPLL_AVDD33
E17
ADPLL_AVDD33
E18
GND_0
A2
1V8
R1714
4.7K
1%
DDR_VREF0_3D
R1712
4.7K
1%
R1715
4.7K
1%
R1713
4.7K
1%
C1893
0.1uF
C1891
0.1uF
C1894
1000pF
DDR_VREF_LG8300
C1892
1000pF
1V8
C3306
10uF
6.3V
C3308
10uF
6.3V
C1702
22uF
10V
OPT
IC1700
AOZ1072AI-3 
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
CLOSE TO VIN AND AGND PIN
R2
Vout=0.8*(1+R1/R2)
2A
R1
5V TO 1.0V
3.3V TO 1.8V
Close to LG8300
Close to DDR2(IC1702)
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