LG 50PS2000-ZB (CHASSIS:PD92A) Service Manual ▷ View online
LVA_1M
A_MDATA[1]
LVB_0P
PCM_OE_N
LVA_1P
A_MADR[9]
PCM_D[0-7]
LVB_CKM
A_MADR[2]
A_MDATA[0]
A_MDATA[2]
A_MADR[0]
A_MDATA[6]
TS_CLK
A_MCLK+
BUF_TS_SYNC
LVA_CKM
A_MADR[7]
LVB_4P
A_BA0
PCM_CE_N
LVA_3M
A_MDATA[7]
A_MDATA[4]
LVB_2P
PCM_IOWR_N
LVA_CKP
LVB_4M
A_MDATA[12]
A_MDATA[8]
A_MADR[8]
PCM_REG_N
A_RAS
A_MADR[11]
A_DQM0
BUF_TS_VAL
T S _ D [ 0 - 7 ]
A_MDATA[14]
LVA_3P
LVB_2M
PCM_IRQA_N
TS_SYNC
A_CAS
A_MADR[10]
A_MADR[3]
LVA_2P
LVB_3P
A_DQM1
A_MCLK-
PCM_RESET
A_MDATA[13]
A_MADR[5]
LVA_4P
A_MADR[4]
LVB_1P
LVB_CKP
A_MDATA[11]
PCM_WAIT_N
A_MADR[6]
A_MDATA[15]
A_MDATA[10]
LVA_2M
A_MDATA[3]
LVB_3M
BUF_TS_DATA[0]
PCM_WE_N
PCM_A[0-14]
A_MADR[1]
LVA_0P
A_BA1
TS_VALID
A_WE
LVB_1M
A_MDATA[5]
BUF_TS_CLK
A_MDATA[9]
PCM_CD_N
A_CLKE
LVA_0M
A_MADR[12]
LVA_4M
LVB_0M
PCM_IORD_N
22
R218
22
R217
22
R214
22
R213
22
R219
22
R220
22
R216
22
R215
A_DQS1M
A_DQS1P
A_DQS0M
A_DQS0P
A_ODT
1/10W
1K
1%
R231
1/10W
1K
1%
R232
B_DQM0
B_MDATA[0]
B_MDATA[2]
B_MADR[12]
B_WE
B_DQS1P
B_MADR[1]
B_MDATA[12]
B_MCLK-
B_MADR[2]
B_BA1
B_MADR[6]
B_MDATA[1]
B_MADR[0]
B_MDATA[7]
B_MADR[5]
B_MDATA[6]
B_MADR[4]
B_ODT
B_MDATA[4]
B_MDATA[15]
B_MDATA[11]
B_MDATA[14]
B_RAS
B_MADR[11]
B_MDATA[9]
B_MDATA[3]
B_MCLK+
B_DQS1M
B_DQM1
B_CAS
B_MADR[7]
B_MADR[10]
B_CLKE
B_DQS0P
B_MDATA[5]
B_DQS0M
B_MADR[8]
B_MADR[9]
B_BA0
B_MDATA[13]
B_MDATA[8]
B_MDATA[10]
B_MADR[3]
1/16W
22
AR200
1/16W
22
AR201
1/16W
22
AR202
1/16W
22
AR203
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0 . 1 u F
50V
50V
C214
0 . 1 u F
50V
50V
C205
+1.25V_VDDC
+3.3V_AVDD_LPLL
0 . 1 u F
50V
50V
C201
+3.3V_AVDD_MPLL
+1.8V_DDR2_MAIN
0 . 1 u F
50V
50V
C203
+1.25V_AVDD_DVI
0 . 1 u F
50V
50V
C207
0 . 1 u F
50V
50V
C209
+3.3V_AVDD_AU
0 . 1 u F
50V
50V
C206
0 . 1 u F
50V
50V
C213
0 . 1 u F
50V
50V
C210
+3.3V_AVDD_MEMPLL
+3.3V_AVDD_ADC
0 . 1 u F
50V
50V
C208
0 . 1 u F
50V
50V
C200
0 . 1 u F
50V
50V
C215
0 . 1 u F
50V
50V
C204
0 . 1 u F
50V
50V
C216
+3.3V_VDDP
0 . 1 u F
50V
50V
C202
+3.3V_AVDD_VIF
+3.3V_AVDD_OTG
HDMI_CEC
0 . 1 u F
50V
50V
C217
56
R258
56
R229
56
R239
56
R237
56
R259
56
R226
56
R236
56
R247
56
R241
56
R249
56
R225
56
R245
56
R255
56
R228
56
R243
56
R253
56
R257
56
R256
56
R248
56
R252
56
R235
56
R227
56
R244
56
R260
56
R254
56
R246
56
R240
56
R238
56
R242
56
R230
33
R222
33
R223
33
R224
33
R221
100
R212
56
R276
1G
56
R277 1G
A_BA2
B_BA2
33
R234
33
R251
33
R233
33
R250
0
R278
OPT
0
R279
+1.8V_DDR2_MAIN
MSD237HFG(SATURN4 NO-SD HD DIVX)
IC100
GND_1
B15
GND_2
D7
GND_3
D8
GND_4
D12
GND_5
D13
GND_6
F7
GND_7
J 9
GND_8
J 1 0
GND_9
J 1 1
GND_10
J 1 2
GND_11
J 1 3
GND_12
K9
GND_13
K10
GND_14
K11
GND_15
K12
GND_16
K13
GND_17
L9
GND_18
L10
GND_19
L11
GND_20
L12
GND_21
L13
GND_22
L19
GND_23
L20
GND_24
M9
GND_25
M10
GND_26
M11
GND_27
M12
GND_28
M13
GND_29
W6
GND_30
W7
AVDD_AU
P8
AVDD_LPLL
K18
AVDD_MPLL
N7
AVDD_MEMPLL
D14
AVDD_33_1
H7
AVDD_33_2
J 6
AVDD_33_3
J 7
AVDD_33_4
K7
AVDD_USB
F8
AVDD_VIF
P7
AVDD_DM
P13
VDDP_1
N8
VDDP_2
N12
VDDP_3
P11
VDDP_4
P12
AVDD_DDR_1
G11
AVDD_DDR_2
G12
AVDD_DDR_3
G13
AVDD_DDR_4
G14
AVDD_DDR_5
H14
AVDD_DVI
G10
VDDC_1
H9
VDDC_2
H10
VDDC_3
J 1 5
VDDC_4
K15
VDDC_5
L15
VDDC_6
M15
VDDC_7
N10
VDDC_8
N11
VDDC_9
P10
MSD237HFG(SATURN4 NO-SD HD DIVX)
IC100
LVA0M
V20
LVA0P
V19
LVA1M
W20
LVA1P
Y20
LVA2M
Y19
LVA2P
W19
LVACKM
Y18
LVACKP
W18
LVA3M
Y17
LVA3P
W17
LVA4M
Y16
LVA4P
W16
LVB0M
M20
LVB0P
M19
LVB1M
N20
LVB1P
N19
LVB2M
P20
LVB2P
P19
LVBCKM
R20
LVBCKP
R19
LVB3M
T20
LVB3P
T19
LVB4M
U20
LVB4P
U19
TS0DATA[7]
V5
TS0DATA[6]
T8
TS0DATA[5]
T7
TS0DATA[4]
R8
TS0DATA[3]
R7
TS0DATA[2]
U6
TS0DATA[1]
U5
TS0DATA[0]
V4
TS0CLK
Y7
TS0VALID
V6
TS0SYNC
W5
TS1DATA
M17
TS1CLK
N18
TS1VALID
L17
TS1SYNC
P18
PCM_D[7]/CI_D[7]
U7
PCM_D[6]/CI_D[6]
U8
PCM_D[5]/CI_D[5]
U9
PCM_D[4]/CI_D[4]
T9
PCM_D[3]/CI_D[3]
R9
PCM_D[2]/CI_D[2]
P9
PCM_D[1]/CI_D[1]
R10
PCM_D[0]/CI_D[0]
R11
PCM_A[14]/CI_A[14]
V7
PCM_A[13]/CI_A[13]
V8
PCM_A[12]/CI_A[12]
U10
PCM_A[11]/CI_A[11]
T10
PCM_A[10]/CI_A[10]
T11
PCM_A[9]/CI_A[9]
V9
PCM_A[8]/CI_A[8]
U11
PCM_A[7]/CI_A[7]
R12
PCM_A[6]/CI_A[6]
T12
PCM_A[5]/CI_A[5]
U12
PCM_A[4]/CI_A[4]
V12
PCM_A[3]/CI_A[3]
R13
PCM_A[2]/CI_A[2]
T13
PCM_A[1]/CI_A[1]
U13
PCM_A[0]/CI_A[0]
V13
PCMIOR/CI_RD
U18
PCMIOW/CI_WR
T18
PCMREG/CI_CLK
U17
PCMCEN/CI_CS
T17
PCMIRQ/CI_INT
R17
PCMWAIT/CI_WACK
R18
PCMOEN
V18
PCMWEN
V17
CI_RST
P17
CI_CD
N17
A_MVREF
E13
A_DDR2_DQM[1]
A10
A_DDR2_DQM[0]
C9
A_DDR2_DQS[1]
C8
A_DDR2_DQS[0]
B9
A_DDR2_DQSB[1]
B8
A_DDR2_DQSB[0]
A9
A_MDATA[15]
A8
A_MDATA[14]
B10
A_MDATA[13]
A7
A_MDATA[12]
A11
A_MDATA[11]
B11
A_MDATA[10]
B7
A_MDATA[9]
C10
A_MDATA[8]
C7
A_MDATA[7]
C6
A_MDATA[6]
C11
A_MDATA[5]
C5
A_MDATA[4]
C12
A_MDATA[3]
B12
A_MDATA[2]
A6
A_MDATA[1]
A12
A_MDATA[0]
B6
A_MADR[12]
C13
A_MADR[11]
D4
A_MADR[10]
C14
A_MADR[9]
A14
A_MADR[8]
D5
A_MADR[7]
B13
A_MADR[6]
D6
A_MADR[5]
B14
A_MADR[4]
A3
A_MADR[3]
A13
A_MADR[2]
B3
A_MADR[1]
A15
A_MADR[0]
C3
A_BADR[2]
F14
A_BADR[1]
D10
A_BADR[0]
D9
A_MCLK
B5
A_MCLKZ
A5
A_MCLKE
D11
A_ODT
C4
A_WEZ
D3
A_RASZ
B4
A_CASZ
A4
B_MVREF
E15
B_DDR2_DQM[1]
F18
B_DDR2_DQM[0]
E20
B_DDR2_DQS[1]
D20
B_DDR2_DQS[0]
E19
B_DDR2_DQSB[1]
D19
B_DDR2_DQSB[0]
E18
B_MDATA[15]
D18
B_MDATA[14]
F19
B_MDATA[13]
C18
B_MDATA[12]
G18
B_MDATA[11]
G19
B_MDATA[10]
C19
B_MDATA[9]
F20
B_MDATA[8]
C20
B_MDATA[7]
B20
B_MDATA[6]
G20
B_MDATA[5]
A20
B_MDATA[4]
H20
B_MDATA[3]
H19
B_MDATA[2]
B18
B_MDATA[1]
H18
B_MDATA[0]
B19
B_MADR[12]
K20
B_MADR[11]
C15
B_MADR[10]
J 2 0
B_MADR[9]
K19
B_MADR[8]
A16
B_MADR[7]
J 1 7
B_MADR[6]
D15
B_MADR[5]
H17
B_MADR[4]
B16
B_MADR[3]
G17
B_MADR[2]
D16
B_MADR[1]
F17
B_MADR[0]
C16
B_BADR[2]
K17
B_BADR[1]
E17
B_BADR[0]
J 1 9
B_MCLK
A19
B_MCLKZ
A18
B_MCLKE
J 1 8
B_ODT
C17
B_WEZ
D17
B_RASZ
B17
B_CASZ
A17
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_D[0]
PCM_A[13]
PCM_D[1]
PCM_A[14]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
TS_D[7]
TS_D[6]
TS_D[5]
TS_D[4]
TS_D[3]
TS_D[2]
TS_D[1]
TS_D[0]
PCM_D[7]
2
11
MAIN_2
N e x t R e v i s i o n R e a d y ( S t a n d B y 0 . 2 W ) _ 0 8 0 4 0 3
EAX57566204
N e e d t o s w a p e v e n t o o d d
f o r 1 G M e m o r y
f o r 1 G M e m o r y
2 0 0 9 . 0 4 . 1 5
AIN_2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
A_MDATA[14]
DDR2_A_MDATA[7]
DDR2_B_MDATA[4]
1/16W
56
AR302
DDR2_A_MADR[0]
DDR2_B_MADR[0]
A_DQS0M
0.1uF
C336
DDR2_B_MADR[9]
DDR2_A_MDATA[8]
A_MDATA[2]
A_CLKE
B_MDATA[12]
B_MDATA[10]
DDR2_A_MADR[5]
A_MDATA[6]
DDR2_B_MDATA[2]
B_DQM1
B_CLKE
0.1uF
C332
DDR2_B_MADR[4]
DDR2_B_MDATA[1]
DDR2_A_MADR[12]
0.1uF
C334
A_MADR[4]
DDR2_B_MADR[5]
+1.8V_DDR2_MAIN
1/16W
56
AR301
B_MDATA[4]
B_MDATA[0]
1/16W
56
AR311
1/16W
56
AR306
A_MDATA[8]
DDR2_A_MDATA[4]
DDR2_B_MADR[2]
B_MDATA[3]
0.1uF
C310
B_MADR[8]
0.1uF
C323
B_MADR[12]
DDR2_B_MADR[1]
A_MADR[11]
0.1uF
C329
DDR2_B_MDATA[11]
B_MADR[10]
1K
1%
1%
R350
A_BA0
B_MADR[7]
DDR2_B_MDATA[8]
B_DQS1P
DDR2_B_MDATA[5]
DDR2_B_MDATA[2]
0.1uF
C324
DDR2_A_MDATA[8]
DDR2_A_MADR[6]
A_WE
A_DQS1P
A_MCLK-
B_BA1
DDR2_A_MADR[12]
DDR2_B_MDATA[10]
A_CAS
+1.8V_DDR2_MAIN
A_MDATA[4]
DDR2_A_MDATA[15]
DDR2_B_MDATA[3]
DDR2_A_MADR[4]
A_MDATA[11]
A_MCLK+
0.1uF
C314
DDR2_A_MADR[10]
A_DQS0P
DDR2_B_MADR[4]
DDR2_A_MDATA[6]
B_MADR[0]
A_RAS
1K
1%
R351
DDR2_A_MADR[2]
DDR2_A_MDATA[13]
B_MDATA[2]
DDR2_B_MDATA[13]
DDR2_B_MADR[0]
A_ODT
B_MDATA[7]
A_MDATA[10]
DDR2_A_MDATA[2]
DDR2_B_MDATA[6]
DDR2_A_MADR[0]
DDR2_B_MDATA[0]
DDR2_B_MDATA[3]
A_MADR[8]
DDR2_A_MDATA[0]
0 . 1 u F
C302
B_MADR[5]
A_DQS1M
+1.8V_DDR2_MAIN
1/16W
56
AR307
B_MDATA[5]
A_MDATA[3]
DDR2_A_MADR[1]
A_MDATA[15]
DDR2_B_MADR[10]
DDR2_B_MADR[10]
DDR2_B_MDATA[8]
DDR2_B_MDATA[7]
B_MDATA[11]
B_MDATA[6]
DDR2_B_MADR[7]
B_DQS0M
DDR2_A_MDATA[1]
B_MDATA[1]
0.1uF
C330
0.1uF
C318
DDR2_A_MDATA[9]
0 . 1 u F
50V
50V
C320
A_MADR[2]
DDR2_B_MDATA[0]
DDR2_B_MDATA[4]
0.1uF
C315
DDR2_A_MDATA[11]
DDR2_A_MDATA[5]
B_RAS
DDR2_B_MADR[6]
A_MDATA[5]
B_MADR[1]
0.1uF
C307
B_MADR[3]
DDR2_A_MDATA[14]
+1.8V_DDR2_MAIN
DDR2_B_MDATA[5]
+1.8V_DDR2_MAIN
DDR2_A_MADR[7]
DDR2_A_MDATA[6]
DDR2_B_MDATA[15]
DDR2_B_MDATA[13]
A_MADR[3]
B_CAS
B_DQS0P
1/16W
56
AR310
DDR2_B_MDATA[12]
B_BA0
0.1uF
C306
DDR2_B_MADR[7]
1/16W
56
AR312
DDR2_A_MDATA[11]
B_MDATA[13]
A_DQM1
DDR2_B_MDATA[14]
DDR2_A_MDATA[2]
1/16W
56
AR308
DDR2_A_MDATA[12]
A_DQM0
DDR2_B_MADR[5]
0.1uF
C326
DDR2_A_MDATA[3]
DDR2_B_MADR[3]
A_MDATA[13]
DDR2_A_MADR[1]
DDR2_B_MDATA[14]
0.1uF
C335
1/16W
56
AR303
0.1uF
C308
DDR2_A_MDATA[9]
0.1uF
C317
0 . 1 u F
50V
50V
C301
DDR2_A_MADR[9]
0.1uF
C337
A_MDATA[7]
B_DQM0
DDR2_B_MADR[1]
0.1uF
C331
DDR2_A_MDATA[13]
1/16W
56
AR300
A_MADR[0]
0.1uF
C328
0.1uF
C312
1/16W
56
AR305
B_MADR[6]
B_WE
A_MADR[1]
DDR2_A_MADR[2]
A_MADR[6]
A_MADR[7]
0.1uF
C316
1/16W
56
AR309
A_MADR[12]
DDR2_A_MDATA[1]
DDR2_A_MDATA[5]
B_MCLK-
1K
1%
R355
DDR2_A_MDATA[15]
DDR2_A_MDATA[4]
DDR2_B_MADR[12]
DDR2_A_MDATA[0]
DDR2_B_MADR[12]
DDR2_B_MDATA[7]
DDR2_A_MDATA[10]
0.1uF
C305
DDR2_B_MDATA[10]
B_MDATA[14]
B_MADR[2]
DDR2_A_MDATA[14]
B_MDATA[15]
DDR2_B_MDATA[6]
A_MDATA[0]
0 . 1 u F
C321
0.1uF
C325
DDR2_A_MADR[7]
B_DQS1M
B_ODT
A_MADR[5]
+1.8V_DDR2_MAIN
B_MADR[11]
DDR2_B_MADR[3]
DDR2_B_MDATA[12]
DDR2_B_MDATA[9]
DDR2_A_MADR[9]
DDR2_B_MDATA[9]
1/16W
56
AR304
B_MDATA[8]
B_MCLK+
B_MADR[4]
1K
1%
1%
R354
DDR2_A_MADR[3]
DDR2_A_MADR[10]
A_MDATA[9]
A_MADR[10]
B_MADR[9]
DDR2_A_MADR[6]
0.1uF
C311
0.1uF
C304
0.1uF
C313
DDR2_A_MADR[3]
A_MDATA[12]
DDR2_B_MADR[9]
DDR2_A_MADR[5]
0.1uF
C327
B_MDATA[9]
A_MDATA[1]
A_MADR[9]
0.1uF
C309
DDR2_B_MDATA[1]
DDR2_A_MADR[4]
DDR2_B_MADR[6]
DDR2_A_MDATA[3]
A_BA1
DDR2_B_MDATA[11]
DDR2_A_MDATA[7]
1/16W
56
AR313
DDR2_A_MDATA[10]
DDR2_A_MDATA[12]
DDR2_B_MADR[2]
DDR2_B_MDATA[15]
0.1uF
C333
0 . 1 u F
50V
50V
C319
0 . 1 u F
50V
50V
C300
B_BA2
A_BA2
H5PS5162FFR-S6C
HYNIX
EAN55705501
DDR2 SDRAM
IC300
FOR HYNIX
J 2
VREF
J 8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J 7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J 1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J 3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J 9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
H5PS5162FFR-S6C
HYNIX
EAN55705501
DDR2 SDRAM
IC301
FOR HYNIX
J 2
VREF
J 8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J 7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J 1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J 3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J 9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
EDE5116AJBG-8E-E
IC300-*1
FOR ELPIDA
J 2
VREF
J 8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J 7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J 1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J 3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J 9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
EDE5116AJBG-8E-E
IC301-*1
FOR ELPIDA
J 2
VREF
J 8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J 7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J 1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J 3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J 9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
3
DDR2
11
EAX57566204
C l o s e t o D D R P o w e r P i n
C l o s e t o D D R P o w e r P i n
f o r 1 G M e m o r y
f o r 1 G M e m o r y
2 0 0 9 . 0 4 . 1 5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DISP_EN
0 0 4 : I 3 ; 0 0 1 : E 9
LVA_3P
0 0 4 : H 6 ; 0 0 2 : O 1 7
CDS3C05GTA
FOR KEY_ESD
C406-*1
CDS3C05GTA
FOR KEY_ESD
C405-*1
0
ROM_DL
R402
680pF
C400
LVA_3M
0 0 4 : H 6 ; 0 0 2 : O 1 7
PC_SER_DATA
007:AB4
LVA_0M
0 0 4 : H 4 ; 0 0 2 : O 1 8
0
ROM_DL
R401
LVA_0P
0 0 4 : H 5 ; 0 0 2 : O 1 8
LVA_CKP
0 0 4 : H 6 ; 0 0 2 : O 1 7
LVA_2P
0 0 4 : H 5 ; 0 0 2 : O 1 7
100
R400
100
R403
10K
R406
LVA_1M
0 0 4 : H 5 ; 0 0 2 : O 1 8
LVA_1P
0 0 4 : H 5 ; 0 0 2 : O 1 8
LVA_CKM
0 0 4 : H 6 ; 0 0 2 : O 1 7
LVA_2M
0 0 4 : H 5 ; 0 0 2 : O 1 8
+5V_ST
10pF
C407
KEY2
001:V14
IR
001:X10
KEY1
001:V13
LED_RED
+3.3V_VDDP_ST
LVA_4P
0 0 4 : H 6 ; 0 0 2 : O 1 6
LVA_4M
0 0 4 : H 6 ; 0 0 2 : O 1 6
SDA_SUB/AMP
0 1 0 : D 9 ; 0 0 1 : Y 1 5
SCL_SUB/AMP
0 1 0 : D 9 ; 0 0 1 : Y 1 4
LED_GRE
0 0 1 : I 1 6 ; 0 0 1 : V 1 5
PC_SER_CLK
007:AB3
LVB_0M
LVB_4M
LVB_4P
LVB_0P
LVB_3M
LVB_1P
LVB_2M
LVB_2P
LVB_CKM
LVB_1M
LVB_3P
LVB_CKP
LVA_2P
0 0 4 : H 1 4 ; 0 0 2 : O 1 7
LVA_1P
0 0 4 : H 1 5 ; 0 0 2 : O 1 8
LVA_1M
0 0 4 : H 1 5 ; 0 0 2 : O 1 8
LVA_0P
0 0 4 : H 1 6 ; 0 0 2 : O 1 8
LVA_0M
0 0 4 : H 1 6 ; 0 0 2 : O 1 8
LVA_2M
0 0 4 : H 1 5 ; 0 0 2 : O 1 8
LVA_4P
0 0 4 : H 1 3 ; 0 0 2 : O 1 6
LVA_CKM
0 0 4 : H 1 4 ; 0 0 2 : O 1 7
LVA_CKP
0 0 4 : H 1 4 ; 0 0 2 : O 1 7
LVA_3P
0 0 4 : H 1 3 ; 0 0 2 : O 1 7
LVA_4M
0 0 4 : H 1 3 ; 0 0 2 : O 1 6
LVA_3M
0 0 4 : H 1 3 ; 0 0 2 : O 1 7
DISP_EN
0 0 4 : J 1 1 ; 0 0 1 : E 9
ROM_TX
001:V12
100
R414
100
R415
ROM_RX001:O19
33pF
OPT
C408
33pF
OPT
C410
SCL_GREENEYE
001:AA7
SDA_GREENEYE
001:AA7
0
R418
KEY_ON
0 1 1 : I 1 5
0 . 1 u F
50V
50V
C414
USB_OCD
001:G4
+5V_MULTI
180
R426
0
R425
USB_CTL
001:G4
+5V_USB_N
+5V_MULTI
0
R421
0
R423
0
R422
100
R427
ROM_TXRX_SWAP
100
R428
ROM_TXRX_SWAP
4 . 7 u F
16V
16V
C403
4 . 7 u F
16V
16V
C411
10K
R407
BG2012B121F
L406
BG2012B121F
L403
12507WS-15L
P402
1
IR
2
GND
3
KEY1
4
KEY2
5
KEY_ON
6
GND
7
SCL_EYE
8
SDA_EYE
9
GND
10
5V_ST
11
5V_Multi
12
GND
13
LED_RED
14
LED_GRE
16
GND
15
PWM
10K
R420
33
R429
OPT
33
R431
OPT
SCL_TRACE_GRRENEYE
0 0 4 : T 7
SDA_TRACE_GRRENEYE 0 0 4 : T 7
33
R417
OPT
33
R416
OPT
GREENEYE_CTRL 0 0 1 : E 4
0
R432
OPT
SDA_TRACE_GRRENEYE
004:AA16
SCL_TRACE_GRRENEYE
004:AA16
PCA9517DGKR
IC402
OPT
3
SDAA
2
SCLA
4
GND
1
VCCA
5
EN
6
SDAB
7
SCLB
8
VCCB
0 . 1 u F
50V
50V
C415
OPT
+3.3V_CI
10K
R435
OPT
10K
R437
OPT
33
R433
FULL SPEC
33
R430
FULL SPEC
MIC2019YM6
IC400
3
ENABLE
2
GND
4
FAULT
1
VIN
6
VOUT
5
ILIMIT
10pF
FOR KEY_C
C406
10pF
FOR KEY_C
C405
SMAW200-26C
P400
FOR HD
1
NC
2
NC
3
ROM_TX
4
ROM_RX
5
GND
6
GND
7
GND
8
GND
9
SCL_SUB
10
SDA_SUB
11
0M
12
OP
13
1M
14
1P
15
2M
16
2P
17
CKM
18
CMP
19
3M
20
3P
21
4M
22
4P
23
PC_SER_CLK
24
PC_SER_DATA
25
DISP_EN
26
NC
0
OPT
R411
2K
R404
FOR HD
22
R405FOR HD
22
FULL-HD
R413
TF05-51S
P403
FULL-HD
1
NC
2
NC
3
ROM_TX
4
ROM_RX
5
NC
6
GND
7
GND
8
GND
9
NC
10
NC
11
4+
12
4 -
13
3+
14
3 -
15
GND
16
CK+
17
CK-
18
GND
19
2+
20
2 -
21
1+
22
1 -
23
0+
24
0 -
25
NC
26
NC
27
D4+
28
D4-
29
D3+
30
D3-
31
GND
32
0CK+
33
0CK-
34
GND
35
D2+
36
D2-
37
D1+
38
D1-
39
D0+
40
D0-
41
GND
42
NC
43
NC
44
NC
45
NC
46
SDA
47
DISP_EN
48
SCL
49
PC_SER_DATA
50
PC_SER_CLK
51
GND
52
GND
1000pF
FOR EMI
C401
C401
1000pF
FOR EMI
C402
1000pF
C404
FOR EMI
1000pF
FOR EMI
FOR EMI
C413
1K
FULL-HD
R412
MBW2012-301F
L407
4 1 1
Module&Ctl
IR/CONTROL_REVERSE
Module
PANNEL WAFER
EAX57566204
Will be changed for NEW MODEL
KEY ON(NEW POWER B/D
USB 5V CONTROL
Will be changed for NEW MODEL & WAFER IS LOCKING TYPE
2008.09.23 ROM D/L SPEC FIX
TX LVDS NO3/RX LVDS NO4
2 0 0 9 . 0 4 . 1 5
G r e e n E Y E I I C R e p e a t e r
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0 . 1 u F
50V
50V
C547
0 . 1 u F
50V
50V
C548
+1.8V_TU
+3.3V_TU
0 . 1 u F
50V
50V
C549
0 . 1 u F
50V
50V
C550
0 . 1 u F
50V
50V
C551
0 . 1 u F
50V
50V
C552
0 . 1 u F
50V
50V
C553
0 . 1 u F
50V
50V
C554
0 . 1 u F
50V
50V
C557
0 . 1 u F
50V
50V
C558
18pF
50V
50V
C502
+3.3V_TU_XE
TUNER_SIF_IF_N
005:A11
0 . 1 u F
16V
C504
+1.8V_TU_XE
0 . 1 u F
16V
C505
0 . 1 u F
16V
C508
+3.3V_TU_XE
CM2012F2R2KT
L507
0 . 1 u F
16V
C509
0 . 1 u F
C510
TUNER_CVBS_IF_P
0 . 1 u F
16V
16V
C512
0 . 1 u F
16V
C513
1000pF
50V
C514
18pF
50V
50V
C515
0 . 1 u F
C517
0 . 1 u F
C518
+3.3V_TU_XE
0 . 1 u F
16V
C519
+3.3V_TU_XE
+1.8V_TU_XE
4.99K
1%
R504
1000pF
50V
C521
0 . 1 u F
16V
C522
+1.8V_TU_XE
0 . 1 u F
16V
C525
+1.8V_TU_XE
IF_AGC
0 . 1 u F
C528
0 . 1 u F
16V
C529
56pF
50V
C532
SDA_D_TU
SCL_D_TU
XC5000_RESET_N
0
R508
SAM2333
D501
OPT
A2[GN]
C
A1[RD]
47K
R509
OPT
33
R510
+3.3V_TU_CE
+1.8V_TU_CE
DTV_IF_P
SCL_D_TU
TU_TS_CLK,TU_TS_DATA[0-7],TU_TS_SYNC,TU_TS_VAL
33
R511
0 . 1 u F
16V
16V
R512
+1.8V_TU_CE
33
R513
10K
R515
22pF
C538
OPT
+3.3V_TU_CE
0 . 1 u F
50V
50V
C539
33
R516
33
R517
33
R518
33
R519
DTV_IF_N
0 . 1 u F
16V
16V
R520
+3.3V_TU_CE
100K
OPT
R521
CE6355_RESET_N
33
R522
33
R523
0.1uF
16V
C541
+1.8V_TU_CE
10K
R524
22pF
C542
OPT
+1.8V_TU_CE
SDA_D_TU
10K
OPT
R526
+3.3V_TU_CE
+3.3V_TU_CE
33
R527
33
R528
33
R529
10K
R530
TU_SLEEP_MODE
0 . 1 u F
16V
C544
OPT
+3.3V_TU_CE
1K
R532
IF_AGC
0 . 1 u F
C520
4.7K
R525
R525
OPT
C568
+3.3V_TU_XE
0 . 1 u F
16V
16V
C1211
10
R507
0 . 1 u F
16V
16V
C516
10uF
16V
16V
C555
10uF
16V
16V
C556
+3.3V_TU
+3.3V_TU_XE
+3.3V_TU_CE
+1.8V_TU_CE
+1.8V_TU
+1.8V_TU_XE
20.48MHz
X500
CB3216PA501E
L511
CB3216PA501E
L513
CB3216PA501E
L510
CB3216PA501E
L512
0 . 1 u F
16V
C524
0 . 1 u F
16V
C507
0.1uF
16V
C503
0 . 1 u F
16V
C501
0.1uF
16V
C526
0 . 1 u F
16V
C527
100
R558
OPT
100
R559
OPT
XC5000
IC500
1
VDDA_1
2
IN1
3
GND_1
4
IN2
5
GND_2
6
EXTCHOKE
7
GND_3
8
VDDA_2
9
VDDA_3
10
VDDC_1
11
GND_4
12
VDDC_2
13
VDDC_3
14
VDDA_4
15
VAGC
16
VIF
17
VDDA_5
18
SIF
19
GND_5
20
VDDC_4
21
VDDA_6
22
GND_6
23
VDDD_1
24
TESTMODE
25
DDI1
26
VDDC_5
27
DDI2
28
ADDRSEL
29
X2
30
GND_7
31
X1
32
EXTREF
33
VDDD_2
34
SCL
35
SDA
36
GND_8
37
RESET
38
VI2C
39
VDDC_6
40
VREF_N
41
VREF_P
42
VDDC_7
43
VDDC_8
44
REXT
45
VDDA_7
46
GND_9
47
VDDC_9
48
VDDA_8
39pF
C531
0603CS-R27XGLW
270nH
L505
120pF
C530
0603CS-R39XGLW
390nH
L504
1008CS-821XGLC
820nH
C546
27pF
50V
50V
C540
27pF
50V
50V
C543
22K
R533
1nF
50V
C545
0
R531
RCLAMP1521P
D502
OPT
0603CS-6N8XGLW
6.8nH
L508
CE6355
IC501
1
VSS_1
2
VDD_1
3
VSS_2
4
CLK1
5
DATA1
6
IRQ
7
CVDD_1
8
VSS_3
9
RESET
10
SLEEP
11
STATUS
12
SADD4
13
VDD_2
14
VSS_4
15
SADD3
16
SADD2
17
SADD1
18
SADD0
19
CVDD_2
20
VSS_5
21
PLLVDD
22
PLLGND
23
XTI
24
XTO
25
VSS_6
26
PLLTEST
27
OSCMODE
28
AVDD
29
AGND_1
30
VIN
31
VIN
32
AGND_2
33
VDD_3
34
RFLEV
35
CLK2/GPP0
36
DATA2/GPP1
37
CVDD_3
38
VSS_7
39
CVDD_4
40
VSS_8
41
AGC2/GPP2
42
AGC1
43
GPP3
44
SMTEST
45
VDD_4
46
VSS_9
47
MOSTRT
48
MOVAL
49
MDO0
50
MDO1
51
MDO2
52
MDO3
53
MDO4
54
VDD_5
55
VSS_10
56
MDO5
57
MDO6
58
MDO7
59
CVDD_5
60
VSS_11
61
MOCLK
62
BKERR
63
MICLK
64
CVDD_6
31.875MHz
X501
RCLAMP0502B
D503
C1
A
C2
KCN-ET-0-0094
JK500
1
2
18pF
50V
C511
18pF
50V
C523
31.875MHz
X502
crystal_2
4
GND_2
1
X-TAL_1
2
GND_1
3
X-TAL_2
SC1_TV_VOUT
0 . 1 u F
C566
+5V_TU
0 . 1 u F
16V
16V
C561
+5V_TU
TUNER_CVBS_IF_P
390
R552
ISA1530AC1
Q501
E
B
C
680
R556
TV_CVBS+
001:M6
390
R550
ISA1530AC1
Q503
Q503
E
B
C
+5V_TU
2K
R537
390
R541
ISA1530AC1
Q502
Q502
E
B
C
2SC3875S(ALY)
Q505
0.1uF
C560
10pF
C567
100
R538
SC1_VOUT_MUTE
KRA102S
Q504
1
2
3
2.7uH
L502
0 . 1 u F
16V
16V
C565
DTV_IF_P
680
R555
+5V_TU
2.7uH
L501
0 . 1 u F
C563
390
R554
SIF+
001:V7
+5V_TU
0
R557
ISA1530AC1
Q506
E
B
C
390
R542
ISA1530AC1
Q507
E
B
C
DTV_IF_N
005:Y4
0 . 1 u F
C564
TUNER_SIF_IF_N
10pF
C562
1K
R501
1K
R502
TU_TS_VAL
TU_TS_DATA[3]
TU_TS_DATA[6]
TU_TS_DATA[5]
TU_TS_DATA[2]
TU_TS_CLK
TU_TS_DATA[7]
TU_TS_DATA[1]
TU_TS_SYNC
TU_TS_DATA[0]
TU_TS_DATA[4]
Tuner
5 1 1
EAX57566204
ACTIVE LOW
ACTIVE HIGH
NEED TO CHANGE NEW PAL SHIELD CASE
2 0 0 8 . 0 8 . 3 0
2 . E M S S 1 I m p r o v e
1 . F r a n c e A T V c h a n n e l s k i p
08.09.25 CHANGE LOAD CAP AND CRYSTAL
2 0 0 9 . 0 4 . 1 5
08.10.06 CHANGE LOAD CAP 22pF -> 27pF
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