DOWNLOAD LG 47LH85 (CHASSIS:LA92F) Service Manual ↓ Size: 39.68 MB | Pages: 76 in PDF or view online for FREE

Model
47LH85 (CHASSIS:LA92F)
Pages
76
Size
39.68 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD
File
47lh85-chassis-la92f.pdf
Date

LG 47LH85 (CHASSIS:LA92F) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
TS_DATA[1]
TS_DATA[6]
TS_DATA[2]
TS_DATA[4]
TS_DATA[5]
TS_DATA[0]
TS_DATA[3]
TS_DATA[0-7]
TS_DATA[0-7]
TS_DATA[7]
C1028
10uF
16V
3216
D1.2V_DVDD_PVSB
D3.3V_PVSB
C1023
10uF
16V
3216
C1038
10uF
16V
3216
R1034
0
1/4W
5%
D1.2V_PVSB
D3.3V_AVDD_PVSB
D3.3V_DVDD_PVSB
D3.3V_PVSB
VSB_RESET
TS_DATA[0-7]
C1068
0.1uF
TS_SYNC
R1077
22
TS_SYNC
C1067
0.1uF
R1065 0
TS_VALID
D3.3V_DVDD_PVSB
TS_CLK
R1078
22
D3.3V_DVDD_PVSB
R1073
0
OPT
AR1072
100
1/16W
LD1000
OPT
FE_DEMOD_SCL
JP1004
D1000
1N4148W
FE_DEMOD_SDA
D3.3V_AVDD_PVSB
JP1007
D3.3V_AVDD_PVSB
C1073
1uF
10V
R1076OPT
TS_VALID
C1070
0.01uF
R1066
OPT
JP1005
D1.2V_DVDD_PVSB
IF_AGC
JP1006
IF_N
C1069
0.01uF
R1064
100
IF_P
R1067
OPT
TS_CLK
C1026
0.1uF
50V
C1030
0.1uF
50V
C1032
0.1uF
50V
C1033
0.1uF
50V
C1043
0.1uF
50V
C1044
0.1uF
50V
C1066
0.1uF
IC1001
SC156515M-1.8TR
2
VIN
1
EN
3
GND
5
ADJ
4
VO
R1001
4.7K
C1002
100uF
16V
C1020
0.1uF
50V
R1014
15K
VSB_CTRL
L1000
MLB-201209-0120P-N2
C1018
100uF
16V
D3.3V_FE
R1015
8.2K
D5.0V_VSB
C1003
0.1uF
50V
R1002
1K
D3.3V_PVSB
L1007
CB3216PA501E
L1005
500
OPT
L1008
500
VCOMO
009:B4
C1051
10uF
10V
OPT
IF_P
R1019
270
+5V_TU
FE_SIF
009:E3
FE_TUNER_SDA
R1027
0
C1008
0.01uF
25V
C1004
82pF
50V
L1004
CM2012F6R8KT
6.8uH
+5V_TU
FE_VMAIN
009:B4
FE_TUNER_SCL
R1022
22
+5V_TU
C1011
10uF
10V
R1026
0
IF_N
SIFMO
009:E3
L1006 500
OPT
C1017
100pF
50V
R1006
10K
OPT
C1009
0.01uF
50V
R1020
270
C1021 0.1uF
OPT
C1005
0.1uF
50V
R1023
22
L1003 500
L1001
CM3216F100KE
10uH
C1007
0.1uF
50V
C1025
27pF
50V OPT
C1014
0.1uF
50V
OPT
C1052
0.1uF
50V
OPT
+5V_TU
C1012
0.047uF
50V
OPT
IF_AGC
C1015
100pF
50V
C1053
0.01uF
25V OPT
C1024
27pF
50V
OPT
+5V_TU
R1031
0
OPT
C1072
27pF
50V
C1071
27pF
50V
C1013
220uF
16V
C1054
220uF
16V OPT
C1045
36pF
50V
IF_Cap
C1046
36pF
50V
IF_Cap
L1012
220nH OPT
R1011
20K
IC1000
SC4215ISTRT
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
C1019
100uF
16V
D1.2V_PVSB
C1022
0.1uF
50V
R1012
10K
C1001
2.2uF
16V
C1000
2.2uF
16V
R1003
0
Q1000
ISA1530AC1
E
B
C
Q1001
ISA1530AC1
E
B
C
C1074
OPT
C1075
OPT
R1030
100
OPT
D1.2V_EN
012:F3
C1010
1uF
16V
R1010
470
R1069
470
OPT
R1018 0
OPT
R1005
0
R1007
12K
AR1071 100
R1074
47K
R1017
4.7K
R1009
OPT
R1008
10K
R1072
1M
R1016
47
OPT
R1068
5.1K
OPT
R1060
1K
R1063
1K
R1004
2.2K
OPT
R1013
4.7K
R1021
0
AR1070
100
R1075
OPT
C1029
0.1uF
16V
C1039
0.01uF
50V
C1016
100uF
16V
IC1002
BA50BC0WFP-E2 
1
CTL
2
VCC
3
GND
4
OUT
5
NC
P6.0V
C1036
0.1uF
16V
R1028
1K
C1035
47uF
16V
C1031
0.1uF
16V
C1040
0.01uF
50V
C1027
100uF
16V
IC1003
BA50BC0WFP-E2 
1
CTL
2
VCC
3
GND
4
OUT
5
NC
D5.0V_VSB
P6.0V
C1037
0.1uF
16V
R1029
1K
IC1004
LGDT3305
1
NC_1
2
VINA2
3
VINA1
4
INCAP
5
VSSAAD10A
6
I2CSEL
7
ANTCON
8
VDD_1
9
I2CRPT_SCL
10
I2CRPT_SDA
11
IFOUT
12
RFOUT
13
TPERR
14
VDD33_1
15
TPVALID
16
TPDATA[0]
17
VSS33_1
18
TPDATA[1]
19
TPDATA[2]
20
TPDATA[3]
21
TPDATA[4]
22
TPDATA[5]
23
TPDATA[6]
24
TPDATA[7]
25
TPCLK
26
TPSOP
27
NIRQ
28
SDA
29
VDD33_2
30
SCL
31
VSS_1
32
VDD_2
33
VSS_2
34
VSS33_2
35
PLLAVDD
36
PLLAVSS
37NRST
38OPM
39VDD33_3
40NC_2
41VSS33_3
42XTALI
43XTALO
44VSS_3
45XM
46VDD_3
47VSSDAD10
48VCCAAD10A
C1055
0.1uF
50V
L1016
CB3216PA501E
X1005
25MHz
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V_TU
R1000
20K
GND
L1011
220nH OPT
C1045-*2
0
IF_short
1/10W
5%
C1046-*2
0
IF_short
1/10W
5%
TU1001
TDVW-H154F
14
IF_AGC
13
DIF[-]
5
RF_AGC
12
DIF[+]
11
NC_4
NC_2
2
19
VIDEO
18
AUDIO
10
AS
4
+B1
NC_1
1
17
NC_5
9
CLOCK
8
DATA
3
GND_1
16
SIF
7
GND_2
6
NC_3
15
+B2
20
SHIELD
R1032
0
R1033
0
R1061
100
R1062
100
C1041
0.1uF
OPT
GND
L1009
500
C1034
100uF
16V
OPT
C1042
220uF
16V
R1079
0
1/10W
5%
2012
C1006
47pF
L1002
270nH
VSB +1.0V B+ BLOCK
VSB +3.3V B+ BLOCK
POWER
VDD33
VSSAD10
VCCAAD10A
VDD
VSS33
SLIM_SCAN
OPM
VSS
XTALI
TPDATA[1]
TPDATA[2]
TPDATA[3]
TPDATA[4]
TPDATA[5]
TPDATA[6]
TPERR
TPDATA[7]
VDD33
JTAG
TPVALID
TPDATA[0]
VSS33
VSSAAD10A
IF OUT
I2CRPT_SDA
I2CRPT_SCL
VINA1
I2CSEL
VINA2
RF OUT
VDD
INCAP
ANTCON
VROA
VSS
VDD33
SCL
TPCLK
SDA
VSS33
VDD
PLLAVDD
PLLAVSS
TPSOP
VSS
NIRQ
XM
XTALO
NRST
 (I2C Channel 6)
Close to tuner
Option for FM Rejection
The value of coil & cap’ could be changed to optimized each
V0 = 0.8(R1+R2) / R2
R1
R2
HA JAE MIN
MStar Application
MStar Application
6
D
E
F
A
G
C
H
1
2
3
B
4
5
JUNO-BOX
TUNER
05
17
+5.0V For TUNER
+5.0V For DEMODULATOR
09.02.05
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
SDDR_A[12]
SDDR_A[11]
SDDR_A[10]
SDDR_A[9]
SDDR_A[0]
SDDR_A[1]
SDDR_A[2]
SDDR_A[3]
SDDR_A[4]
SDDR_A[5]
SDDR_A[6]
SDDR_A[7]
SDDR_A[8]
SDDR_A[1]
SDDR_A[10]
SDDR_A[12]
SDDR_A[7]
SDDR_A[0]
SDDR_A[2]
SDDR_A[4]
SDDR_A[6]
SDDR_A[11]
SDDR_A[8]
TDDR_A[4]
TDDR_A[11]
TDDR_A[3]
TDDR_A[10]
TDDR_A[12]
TDDR_A[2]
TDDR_A[5]
TDDR_A[8]
TDDR_A[1]
TDDR_A[0-12]
TDDR_A[1]
TDDR_A[4]
TDDR_A[3]
TDDR_A[11]
TDDR_A[5]
TDDR_A[12]
TDDR_A[6]
TDDR_A[2]
TDDR_A[10]
TDDR_A[0]
TDDR_A[8]
TDDR_A[9]
TDDR_A[7]
TDDR_A[0]
TDDR_A[6]
TDDR_A[9]
SDDR_D[10]
SDDR_D[11]
SDDR_D[12]
SDDR_D[10]
SDDR_D[8]
SDDR_D[3]
SDDR_D[8]
SDDR_D[1]
SDDR_D[9]
SDDR_D[4]
SDDR_D[3]
SDDR_D[5]
SDDR_D[1]
SDDR_D[6]
SDDR_D[2]
SDDR_D[4]
SDDR_D[14]
SDDR_D[15]
SDDR_D[6]
SDDR_D[9]
SDDR_D[7]
SDDR_D[0]
SDDR_D[13]
SDDR_D[5]
SDDR_D[2]
SDDR_D[0]
SDDR_D[12]
SDDR_D[13]
SDDR_D[14]
SDDR_D[15]
SDDR_D[7]
SDDR_D[11]
TDDR_D[2]
TDDR_D[6]
TDDR_D[1]
TDDR_D[5]
TDDR_D[11]
TDDR_D[3]
TDDR_D[7]
TDDR_D[4]
TDDR_D[9]
TDDR_D[1]
TDDR_D[8]
TDDR_D[3]
TDDR_D[8]
TDDR_D[10]
TDDR_D[12]
TDDR_D[11]
TDDR_D[15]
TDDR_D[10]
TDDR_D[14]
TDDR_D[13]
TDDR_D[12]
TDDR_D[0]
TDDR_D[2]
TDDR_D[5]
TDDR_D[13]
TDDR_D[0]
TDDR_D[7]
TDDR_D[9]
TDDR_D[6]
TDDR_D[15]
TDDR_D[14]
TDDR_D[4]
SDDR_BA[0]
SDDR_BA[1]
ADDR2_BA[2]
/ADDR2_MCLK
SDDR_CKE
ADDR2_CKE
/SDDR_CK
SDDR_CK
/SDDR_RAS
/SDDR_CAS
/SDDR_WE
SDDR_DQS1_P
SDDR_DQS0_P
SDDR_DQM1_P
SDDR_DQM0_P
SDDR_DQS1_N
SDDR_DQS0_N
/ADDR2_RAS
ADDR2_ODT
/ADDR2_CAS
/ADDR2_WE
ADDR2_DQS1_P
ADDR2_DQS0_P
ADDR2_DQM1_P
ADDR2_DQM0_P
ADDR2_DQS0_N
ADDR2_DQS1_N
BDDR2_DQM0_P
BDDR2_DQS1_P
BDDR2_ODT
BDDR2_DQS0_N
TDDR_CKE
TDDR_MCLK
BDDR2_DQS0_P
BDDR2_MCLK
/TDDR_MCLK
TDDR_DQM1_P
BDDR2_DQS1_N
BDDR2_DQM1_P
/TDDR_CAS
BDDR2_BA[2]
TDDR_BA[1]
/TDDR_WE
TDDR_DQS1_P
TDDR_BA[0]
TDDR_DQS1_N
TDDR_DQS0_P
BDDR2_BA[0]
/TDDR_RAS
BDDR2_BA[1]
TDDR_DQM0_P
/BDDR2_MCLK
TDDR_DQS0_N
SDDR_A[3]
SDDR_A[0-12]
ADDR2_A[0-12]
ADDR2_A[0]
ADDR2_A[1]
ADDR2_A[3]
ADDR2_A[2]
ADDR2_A[5]
ADDR2_A[7]
ADDR2_A[6]
ADDR2_A[4]
ADDR2_A[9]
ADDR2_A[8]
ADDR2_A[10]
ADDR2_A[11]
ADDR2_A[12]
ADDR2_A[3]
ADDR2_A[1]
ADDR2_A[10]
ADDR2_A[9]
ADDR2_A[12]
ADDR2_A[7]
ADDR2_A[0]
ADDR2_A[2]
ADDR2_A[4]
ADDR2_A[6]
ADDR2_A[11]
ADDR2_A[8]
ADDR2_BA[0]
ADDR2_BA[1]
ADDR2_MCLK
BDDR2_A[0-12]
BDDR2_A[0]
BDDR2_A[1]
BDDR2_A[2]
BDDR2_A[3]
BDDR2_A[4]
BDDR2_A[5]
BDDR2_A[6]
BDDR2_A[7]
BDDR2_A[8]
BDDR2_A[9]
BDDR2_A[10]
BDDR2_A[11]
BDDR2_A[12]
BDDR2_A[9]
BDDR2_A[3]
BDDR2_A[1]
BDDR2_A[10]
BDDR2_A[5]
BDDR2_A[12]
BDDR2_A[0]
BDDR2_A[2]
BDDR2_A[4]
BDDR2_A[6]
BDDR2_A[11]
BDDR2_A[8]
BDDR2_CKE
/BDDR2_RAS
/BDDR2_CAS
/BDDR2_WE
ADDR2_D[0-15]
ADDR2_D[0]
ADDR2_D[1]
ADDR2_D[3]
ADDR2_D[2]
ADDR2_D[5]
ADDR2_D[4]
ADDR2_D[6]
ADDR2_D[7]
ADDR2_D[12]
ADDR2_D[9]
ADDR2_D[8]
ADDR2_D[14]
ADDR2_D[10]
ADDR2_D[15]
ADDR2_D[11]
ADDR2_D[13]
ADDR2_D[11]
ADDR2_D[12]
ADDR2_D[4]
ADDR2_D[3]
ADDR2_D[1]
ADDR2_D[6]
ADDR2_D[9]
ADDR2_D[14]
ADDR2_D[15]
ADDR2_D[13]
ADDR2_D[10]
ADDR2_D[8]
ADDR2_D[5]
ADDR2_D[7]
ADDR2_D[2]
ADDR2_D[0]
SDDR_D[0-15]
BDDR2_D[0-15]
BDDR2_D[0]
BDDR2_D[1]
BDDR2_D[2]
BDDR2_D[3]
BDDR2_D[6]
BDDR2_D[4]
BDDR2_D[7]
BDDR2_D[5]
BDDR2_D[10]
BDDR2_D[8]
BDDR2_D[12]
BDDR2_D[14]
BDDR2_D[15]
BDDR2_D[11]
BDDR2_D[9]
BDDR2_D[13]
BDDR2_D[11]
BDDR2_D[12]
BDDR2_D[14]
BDDR2_D[9]
BDDR2_D[13]
BDDR2_D[10]
BDDR2_D[8]
BDDR2_D[15]
BDDR2_D[4]
BDDR2_D[3]
BDDR2_D[1]
BDDR2_D[6]
BDDR2_D[7]
BDDR2_D[5]
BDDR2_D[0]
BDDR2_D[2]
TDDR_D[0-15]
SDDR_A[9]
SDDR_A[5]
ADDR2_A[5]
BDDR2_A[7]
TDDR_A[7]
SDDR_ODT
TDDR_BA[2]
SDDR_BA[2]
D1.8V_DDR
C329
10uF
C314
10uF
C340
0.1uF
C341
0.1uF
C338
0.1uF
C339
0.1uF
C337
0.1uF
L300
BLM18PG121SN1D
C342
0.1uF
C323
0.1uF
D1.8V_S_DDR
D1.8V_S_DDR
D1.8V_S_DDR
AR300
56
AR301
56
AR302
56
AR303
56
AR305
56
AR304
56
AR306
56
AR308
56
AR307
56
AR309
56
AR310
56
AR312
56
AR311
56
AR313
56
R306
22
R307
22
R300
150
OPT
R344
150
OPT
R331
22
R330
22
D1.8V_S_DDR
D1.8V_S_DDR
C311
1000pF
C300
1000pF
C335
1000pF
C308
0.1uF
C305
0.1uF
C332
0.1uF
C325
0.1uF
C310
0.1uF
C318
0.1uF
C313
0.1uF
C312
0.1uF
C331
0.1uF
C328
0.1uF
C327
0.1uF
C320
0.1uF
C330
0.1uF
C316
0.1uF
C306
0.1uF
C315
0.1uF
C317
0.1uF
C307
0.1uF
C334
0.1uF
C302
0.1uF
C309
0.1uF
C301
0.1uF
C304
0.1uF
C326
0.1uF
C319
0.1uF
C336
0.1uF
C333
0.1uF
R325
56
R310
56
R313
56
R317
56
R308
56
R311
56
R316
56
R342
56
R304
56
R326
56
R303
56
R338
56
R314
56
R336
56
R340
56
R341
56
R312
56
R339
56
R319 56
R327
56
R337
56
R334
56
R318
56
R315
56
R309
56
R320
56
R332
56
R335
56
R328
56
R329
OPT
R333
56
R305
56
R301
1K
1%
R302
1K
1%
R345
1K
1%
R321
1K
1%
R343
1K
1%
R322
1K
1%
C324
10uF
C303
10uF
R346
OPT
R347
OPT
R348
OPT
R349
OPT
D1.8V_S_DDR
R350
OPT
R351
0
D1.8V_S_DDR
D1.8V_S_DDR
D1.8V_S_DDR
D1.8V_S_DDR
C345
0.1uF
IC100
LGE3369A (Saturn6 Non RM)
@compC
B_DDR2_A0
T26
B_DDR2_A1
AF26
B_DDR2_A2
T25
B_DDR2_A3
AF23
B_DDR2_A4
T24
B_DDR2_A5
AE23
B_DDR2_A6
R26
B_DDR2_A7
AD22
B_DDR2_A8
R25
B_DDR2_A9
AC22
B_DDR2_A10
AD23
B_DDR2_A11
R24
B_DDR2_A12
AE22
B_DDR2_BA0
AC23
B_DDR2_BA1
AC24
B_DDR2_BA2
AB22
B_DDR2_MCLK
V25
/B_DDR2_MCLK
V24
B_DDR2_CKE
AB23
B_DDR2_ODT
U26
/B_DDR2_RAS
U25
/B_DDR2_CAS
U24
/B_DDR2_WE
AB24
B_DDR2_DQS0
AB26
B_DDR2_DQS1
AA26
B_DDR2_DQM0
AC25
B_DDR2_DQM1
AC26
B_DDR2_DQSB0
AB25
B_DDR2_DQSB1
AA25
B_DDR2_DQ0
W25
B_DDR2_DQ1
AE26
B_DDR2_DQ2
W24
B_DDR2_DQ3
AF24
B_DDR2_DQ4
AF25
B_DDR2_DQ5
V26
B_DDR2_DQ6
AE25
B_DDR2_DQ7
W26
B_DDR2_DQ8
Y26
B_DDR2_DQ9
AD25
B_DDR2_DQ10
Y25
B_DDR2_DQ11
AE24
B_DDR2_DQ12
AD26
B_DDR2_DQ13
Y24
B_DDR2_DQ14
AD24
B_DDR2_DQ15
AA24
A_MVREF
D15
A_DDR2_A0
C13
A_DDR2_A1
A22
A_DDR2_A2
B13
A_DDR2_A3
C22
A_DDR2_A4
A13
A_DDR2_A5
A23
A_DDR2_A6
C12
A_DDR2_A7
B23
A_DDR2_A8
B12
A_DDR2_A9
C23
A_DDR2_A10
B22
A_DDR2_A11
A12
A_DDR2_A12
A24
A_DDR2_BA0
C24
A_DDR2_BA1
B24
A_DDR2_BA2
D24
A_DDR2_MCLK
B14
/A_DDR2_MCLK
A14
A_DDR2_CKE
D23
A_DDR2_ODT
D14
/A_DDR2_RAS
D13
/A_DDR2_CAS
D12
/A_DDR2_WE
D22
A_DDR2_DQS0
B18
A_DDR2_DQS1
C17
A_DDR2_DQM0
C18
A_DDR2_DQM1
A19
A_DDR2_DQSB0
A18
A_DDR2_DQSB1
B17
A_DDR2_DQ0
B15
A_DDR2_DQ1
A21
A_DDR2_DQ2
A15
A_DDR2_DQ3
B21
A_DDR2_DQ4
C21
A_DDR2_DQ5
C14
A_DDR2_DQ6
C20
A_DDR2_DQ7
C15
A_DDR2_DQ8
C16
A_DDR2_DQ9
C19
A_DDR2_DQ10
B16
A_DDR2_DQ11
B20
A_DDR2_DQ12
A20
A_DDR2_DQ13
A16
A_DDR2_DQ14
B19
A_DDR2_DQ15
A17
IC300
HY5PS1G1631CFP-S6 
EAN55706101
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC301
H5PS5162FFR-S6C
EAN55705501
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
DDR2 1.8V By CAP - Place these Caps near Memory
PI Result
6
D
E
DDR2
F
A
G
C
H
1
2
3
B
4
5
JUNO-BOX
DDR2
06
17
HONG YEON HYUK
512MB
Hynix
09.02.05
 1GB
Hynix
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
R429
0
TP402
MICOM_SDA_S
014:E2
R444
3.3K
MICOM_RESETb
012:C2
R441
22
R416
4.7K
PWR_CTRL
004:C2
R400
47K
P5.0V_ST
R418
100
FRONT_RESETb
014:E2
R420
OPT
R406
0
TP400
R451
1K
R403
4.7K
WIHD_TX_RESETb
014:G4
R433
220
R440
22
D402
SML-201MT
OPT
X400
24MHz
TP408
TP407
SDA_MCU
009:G8
R424
47K
IC402
KIA7029AF
2
G
3
O
1
I
D3.3V_EN
004:G3
R432
220
RGB_DDC_SDA
001:H1
R452
4.7K
D1.2V_EN
005:G5
R401
27K
R408
22
TP405
R438
100
R450
1K
R412
22
R413
100
FAN_W_ONOFF
014:C4
IC400
M24C16-WMN6T
3
3
2
2
4
4
1
1
5
5
6
6
7
7
8
8
FAN_W_DETECT
014:C4
R415
OPT
WIHD_PWR_EN
004:F5
D5.0V_1
R419
100
R430
0
R407
100
C404
20pF
50V
D3.3V_L
MICOM_RESETb
012:F5
D3.3V_L
C402
0.1uF
16V
R421
OPT
C406
0.1uF
16V
R447
6.8K
MICOM_SDA_M
012:D5
R417
4.7K
R449
1K
R422
4.7K
R405
100
D401
SML-201MT
OPT
R425
1K
C403
20pF
50V
C405
0.1uF
16V
WIHD_TX_INT
014:G4;009:F5;009:I3
R431
22
R437
OPT
WIHD_PWR_MNT
017:F4
D3.3V_L
TP401
R423
4.7K
R435
100
D3.3V_L
D400
SML-201MT
OPT
R453
4.7K
OPT
TP404
R434
100
R445
3.3K
C401
0.1uF
16V
TP406
R454
4.7K
OPT
R436
OPT
R414
100
MICOM_UART_RXD
014:C5
SCL_MCU
009:G8
MICOM_SCL_S
014:E2
MICOM_SCL_M
012:C3
UART_SELECT
014:F6
P5.0V_ST
P5.0V_ST
MICOM_UART_TXD
014:F6
FRONT_INT
014:E2
D3.3V_1
RGB_DDC_SCL
001:H1
MICOM_SDA_M
012:C3
R410
22
C400
47uF
16V
R426
100
R404
4.7K
R439
100
TP409
MICOM_SCL_M
012:D5
R411
22
R448
0
R446
6.8K
TP403
R428
0
D3.3V_L
R409
22
HDMI_CEC_TX
017:F2;017:F4
HDMI_CEC_RX
002:F1;009:B3
R427
100
IC401
WT61P8-RG480WT
1
NC1
2
VDD33V
3
GND
4
OSCO
5
OSCI
6
GPIOB6/SSDA
7
GPIOB5/SSCL
8
GPIOB4/P05
9
GPIOB3/P04
10
GPIOB2/IR
11
GPIOB1/IRQ3/CEC
12
GPIOB0/IRQ2
13
NC2
14
GPIOC7/P17/IRQ1
15
GPIOC6/P16/IRQ0
16
GPIOC5/P15/TXD0
17
GPIOC4/P14/RXD0
18
GPIOC3/AD3
19
GPIOC2/AD2
20
GPIOC1/AD1
21
GPIOC0/AD0
22
DSDA1
23
DSCL1
24
NC3
25
GPIOA5/DSDA2
26
GPIOA4/DSCL2
27
GPIOA3/PWM7/P03
28
GPIOA2/PWM6/P02
29
GPIOA1/PWM5/P01
30
GPIOA0/PWM4/P00
31
GPIOD7/RXD1
32
GPIOD6/TXD1
33
GPIOD5/P13/AD7
34
GPIOD4/P12/AD6
35
GPIOD3/P11/AD5
36
GPIOD2/P10/AD4
37
GPIOD1/HIN2
38
GPIOD0/HIN1
39
GPIOE7/VIN1
40
GPIOE6/VIN2
41
GPIOE5/P07
42
GPIOE4/LPWM/P06
43
GPIOE3/PWM3
44
GPIOE2/PWM2
45
GPIOE1/PWM1
46
NRST
47
GPIOE0/PWM0
48
NC5
S6_Reset_IN
009:G1
FAN_S_ONOFF
014:E4
FAN_S_DETECT
014:E4
R442
100
R443
100
R455
4.7K
R456
4.7K
D3.3V_L
R458
4.7K
R457
4.7K
12
JUNO-BOX
MICOM
17
G
D
F
H
E
A
C
B
1
2
3
4
5
6
POWER
MONITORING
WIRELESS STATUS
INDICATOR
MICRO-CONTROLLER
CHIP    : 3.3V - U.S.
PRODUCT : 3.3V - JUNO 
WIHD I2C (BACK-UP)
MODEL CONFIGURATION
LIM KYOUNG RYUL
EEPROM
MICOM RESET
09.02.05
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