LG 47LH80YD (CHASSIS:LB91F) Service Manual ▷ View online
- 21 -
DDR_M
I/F
3D
Gr
aphic
s
P
ro
cesso
r
T
V
Sound
P
ro
cesso
r
Dual
US
B
2
.0
Vid
eo
Fr
o
nt-E
nd
HDM
I
RxC
GP
IO
/IR
/U
A
R
T
Data
X-
po
rt
MSD336
8
A
udio S
w
it
c
h
&
A
D
C, D
S
P
M
PEG
-2
/4
/H.264
V
ideo De
c
o
der
NT
S
C
/P
A
L
Deco
der
A
udio
DA
C
NA
N
D
I/F
CI I/F
Dual
LV
D
S
Tx
DDR_
A
I/F
HDM
I
Rx
A
/B
AN
T
/
CA
B
L
E
IN
A
C
IN
RF
T
ra
nscei
ver
S
B
9110
Net
w
ork
P
ro
cesso
r
S
B
9120
Wireless
Module
HDM
I
Receiv
er
SiI9125
SiBE
A
M
I/
F
MAIN
SMPS
+
6
.0V
+
3
.3V
+5.0V_
ST
Pow
er Conn
.
NT
SC/VSB
HA
LF-NIM
HDM
I
Sw
it
c
h
(4
-t
o
-1
)
T
D
A
9996
LVDS
Re
c
e
iv
e
r
D
T
C30L
M
3
6
HD
M
I
Transmitter
A
N
X
856
0
HD
M
I
DEM
U
X
PI3H
DM
I
1210
DD
R2
64M
x16
DD
R2
64M
x16
Se
rial
Flas
h
4M
B
NA
N
D
Flas
h
128MB
(x8)
VSB
/Q
A
M
De
M
o
d
.
L
G
D
T
330
5
16-
Bi
t
16-
Bi
t
Mi
CO
M
WT
61P8S
I2C_1
I2C_
M
CE
C
_
RX
CE
C
_
TX
IN
Tb
RS
T
b
PW
R_CT
RL
I2C_0
R
S
232
A
Dr
iv
e
r
CE
C
_
TX
CE
C
_
RX
CE
C
_
RX
SE
L
SE
L
I2S
I2C_1
IN
Tb
RS
T
b
I2C_
M
IN
Tb
US
B
PW
R
SW
M
IC200
9
I2C_0
ED
ID
ROM
EEPR
OM
256KB
EEPR
OM_
I2
C
S/P
DIF
W
IR
E
LESS
TV
COM
P
1
COM
P
2
AV
1
AV
2
HDM
I1
HDM
I2
HDM
I3
HDM
I4
RGB
PO
W
E
R
TOUCH
I/F
CY
8C21434
FRONT
I/
F
A
u
di
o
-L/R
A
u
di
o
-L/R
A
u
di
o
-L/R
A
u
di
o
-L/R
RGB-
Aud
io
RGB
S-
Vide
o
C
o
mposit
e
-1
C
o
mposit
e
-2
C
o
mpone
n
t-
1
C
o
mpone
n
t-
2
F
E
_
T
UNE
R_I
2C
HDC
P-K
E
Y
RO
M
EEPR
OM_
I2
C
I2C_0
MST
AR MSD3368 (SA
TURN6) Platform
BLOCK DIAGRAM_AV BOX
- 22 -
26.8
22
9.2
24
24
19
39
280
32
24
15
10
16
26.8
16
16
16
12
120
140
8
8
8
30.8
8.6
12
27
160
TU1001
IC100
IC502
IC502
IC800
IC900
JK1201
IC401
P1102
P1103
P700
92.8
18.2
12
15.2
8.6
30
10
10
24
IC1004
14.5
30
JK1205
JK601
JK502
JK501
JK503
JK500
IC301
IC300
P1100
P1101
J1100
P1104
P1105
IC
8
0
1
P800
J801
J800
IC102
PCB Layout
BLOCK DIAGRAM_AV BOX
- 23 -
BACK VIEW
26
14
15
98
14
14
14
14
14
14
14
I/O Board
98
??
14
33
2.5
2.5
14
14
14
14
14
14
14
10
??
26.8
22
24
24
19
39
32
24
15.2
30
24
85
42.5
280
BACK Panel Layout
BLOCK DIAGRAM_AV BOX
- 24 -
NTS
C/VSB
Half-NIM
TUN
ER
LCD/PD
P
DIGITAL T
V
P
R
O
C
ES
SOR
[MSD3
36
8
G
V]
HD
M
I
Sw
it
c
h
(4-to-1)
[T
D
A
9996]
CE
C
_
RX
HDM
I
DDC_
RGB
A
V
1
_
CV
BS
_
IN
A
V
2
_
CV
BS
_
IN
CO
M
P
1-Y
/Pb/P
r
CO
M
P
2-Y
/Pb/P
r
DS
UB
-R
/G
/B
IF
AN
A
L
O
G
VI
D
E
O
IN
PUT
DIGI
T
A
L
VI
D
E
O
IN
PUT
MiCOM
[W
T61P8S]
I2C_CH4
CE
C
_
RX
DDC_
RGB
I2C_CH1
LVD
S
Recei
v
e
r
[D
T
C
30
L
M
36
]
DU
A
L
LV
D
S
HD
M
I
Transmitter
[S
iI
9134]
HD
M
I
De
MUX
[P
I3HDM
I1210
]
RF
Transcei
v
e
r
[S
B9
1
1
0
]
Ne
w
ork
Processor
[S
B
9
20]
HD
M
I
R
e
ce
iv
er
[S
i
9125]
30
I2C_CH2
HDM
I
3.3V_2
3.3V_L
3.3V_2
3.3V_2
1.8V_1
3.3V_2
5.0V_1
TX
_
S
E
L
1.26V_1
1.8V_D
DR
3.3V_1
CE
C
_
TX
SiBEA
M I/
F
I2C_CH4
24
Wireless Module
5.0V_
ST
3.3V_L
2.5V_L
1.0V_L
2.5V_L
1.5V_L
1.2V_L
1.0V_L
3.3V_L
1.8V_L
Composi
te
Video
IN
Componen
t
(Y,Pb,Pr)
IN
AN
T
/
CA
B
L
E
IN
RGB
IN
HD
M
I
IN
(x4)
HD
M
I
OUT
5.0V_T
U
I2C_CH6
FE
_
V
M
A
IN
FRONT
BA
C
K
TX
_
S
E
L
CE
C
_
TX
I2C_CH2
VSB
/Q
A
M
De
modu
lator
[L
GD
T3305]
3.3V_
V
S
B
1.2V_
V
S
B
I2C_CH2
TS
I2C_CH2
I2C_CH4
I2C_CH6
1.8V_1
C
VBS0/R
F_C
VBS
FE_VMA
IN
C
VBS3/S
ID
E_C
VBS
AV1_C
VBS_IN
C
VBS2/SC2_C
VBS
AV2_C
VBS_IN
RIN2P/COMP_PR+,
G
IN2P/COMP_Y
+,
BIN2P/COMP_P
B+
C
O
M
P2_Pr
, C
OM
P2_
Y
, C
OM
P2_Pb
H
SYNC1, VSY
N
C
1
RIN1P/DSUB_
R
, G
IN1P/DSUB_G
,
G
IN1P/D
S
UB_B
DS
UB_
H
YS
N
C
,
DSUB_
V
S
Y
N
C
DS
UB
_
R
, DS
UB
_
G
,
DS
UB
_
B
R
IN
0
P/SC1_
R
,
G
IN
0P/SC1_G
,
B
IN
0
P/SC1_B
C
O
M
P
1_Pr
, C
OM
P1_
Y
, C
O
M
P
1_Pb
RX
BC
KP/N
R
X
B0P/N
RX
B1P/N
R
X
B2P/N
DDCD
_B_
D
A
/C
K
H
D
MI CLK+
/-
RX
0+
/-
R
X
1+
/-
RX2+
/-
H
D
MI_SCL/SDA
SA
TURN6 PORT
VID
E
O INP
U
T
V
ideo Path Diagram
BLOCK DIAGRAM_AV BOX
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