LG 32LC7D (CHASSIS:LA73E) Service Manual ▷ View online
- Block diagram for CI DTV
- 17 -
Side A
V
V,LR
Rear A
V
V, LR
Rear S
YC, LR
Side S
YC, LR
MNT_V_Out
IN1
OUT
1
IN4
IN1
IN4
IN5
OUT
3
Comp_1
YCbCr
Comp_2
YCbCr
IN3
IN4
CVBS
CVBS
ATSC/NT
SC
Tune
r
Cable
ANT.
64-Bit I/F
BCM3560
12
LVDS
Trans
C
X
A2069(
AV S/W
)
VDEC_CV
B
S/S_Y
VSB/Q
A
M/NT
SC/SIF
SPDIF Out
I2S Outp
ut
SPDIF_OUT
Flash
M
e
mory
16
MB
HDMI/DVI
RS-232C
X-
ta
l
54MHz
Reset IC
Audio
PWM L/R
Su
b Mic
o
m
(MTV416)
EEP
ROM
HDMI & Comp
o
n
ent
RGB-PC
Au
di
o
Tune
r
Comp_1
LR
Comp_2
LR
RGB(Phone
)
LR
AU
D
IO
A
D
C
Audio R/L
I2S
I2S A
udio
In
p
u
t
MST3361
R/G/B
H/V Sy
nc
DVI Inp
u
t
Digita
l Output.
SDRAM
256Mbit
DD
S
D
a
ta
[24]
H
s
yn
c/
Vs
ync
/D
E
/C
lk
2X
1
S/W
2X
1
S/W
HDC
P
IIC
TMDS
DD
S
SPDIF
Y,C
IF P/N
for D
T
V
SIF for N
T
SC
SIF for N
T
SC
U
S
B for
upgr
a
d
e
S/
W
LR
MNT_Out
AU
D
IO
D
A
C
IIS
TMDS
- 18 -
- Powr flow diagram
+
12.0V
+
12.0V
KIA
7
8R09
KIA
7
8R09
F
A
N1
,2,3
F
A
N1
,2,3
FAN
4
FAN
4
S
I4925
D
Y
S
I4925
D
Y
M
P
1593
M
P
1593
CMO, AU
O
CMO, AU
O
+9
.0
V
+9
.0
V
M
C
3
307
M
C
3
307
C
X
A2069
C
X
A2069
ST_5V
ST_5V
BA033
FP
BA033
FP
M
T
V
416G
M
F
M
T
V
416G
M
F
3
.3V
ST
_MIC
OM
A3
.3
V
_
BCM
A3
.3
V
_
BCM
B
C
M
3560
B
C
M
3560
P_
+19V
P_
+19V
T
P
A3100
T
P
A3100
+3
.3
V
+3
.3
V
S
C
1566
-2.5
S
C
1566
-2.5
B
C
M
3560
B
C
M
3560
HY
D
U
561622
HY
D
U
561622
S
C
1566
-2.5
S
C
1566
-2.5
D2.
6
V
_
BCM
A2
.6V_
B
C
M
B
C
M
3560
B
C
M
3560
S
C
1566
-2.5
S
C
1566
-2.5
+2.5V
_
MST
M
S
T
3361
M
S
T
3361
B
C
M
3560
B
C
M
3560
S29GL128
M
S29GL128
M
T
H
C
63LV
D
T
H
C
63LV
D
74LV
C
14A
74LV
C
14A
M
S
T
3361
M
S
T
3361
3
.3V
_MST
DDC
DDC
A1
.2V_
B
C
M
, D
1
.2V_
B
C
M
B
C
M
3560
B
C
M
3560
+6
.0
V
+6
.0
V
PQ
05
D
Z
1
U
PQ
05
D
Z
1
U
C
S
4344
C
S
4344
+5.
0V
MM17
3
2
MM17
3
2
C
S
5331A
C
S
5331A
F
M
S
6407
F
M
S
6407
F
M
S
6400
F
M
S
6400
T
P
S2042
T
P
S2042
74
F08
D
74
F08
D
M
6
2320F
P
M
6
2320F
P
TUNER
TUNER
F
S
A1156
F
S
A1156
+5V
_TU
LM7
5
C
IMX
LM7
5
C
IMX
A
Z
1117
H
-3.3
A
Z
1117
H
-3.3
B
C
M
3560
B
C
M
3560
D3.
3
V
_
BCM
KIA
7
8R09
KIA
7
8R09
5V_
P
A
NEL
A
T
24
C512
W
A
T
24
C512
W
AT24C02N
AT24C02N
- 19 -
- 12C Control block diagram
B
CM3560
AV S/
W(CXA2069)
Main EEPROM
4.
7
K
5.
0
V
I2C_
Chann
e
l 0
I2C_
Chann
e
l 1
ATSC/NTS
C T
u
n
er
I2C_
Chann
e
l 2
I2C_
Chann
e
l 3
Sub-Micom
I2C0_5V
I2C1_5V
I2C1_3.3
V
I2C2_3.3
V
I2C3_3.3
V
2.
7
K
2.
7
K
3.
3
V
M62
3
20
4.
7
K
5.
0
V
PD
P Module
I2C Address
0x90
0xC2
0x74
0xA6
0x1C
0x50
0x9C
MST3361
3.
3
V
- 20 -
- Video signal path for Composite/S-Video/IF
MNT_V_Out
SD_CVB
S
CXA2069
OUT
3
Side A
V
V,LR
Rear A
V
V, LR
Rear S
YC, LR
Side S
YC, LR
IN1
IN4
IN1
IN4
IN3
IN4
Comp_1
LR
Comp_2
LR
RGB(Phone
)
LR
BCM3550
SD_Y
SD_C
ANT/ Cabl
e
T
V
IN
CVBS from
T
UNER
FMS6400
Y/CVBS
C
OUT
1/
Y
OUT
1/
C
M_CVBS/Y
C
M_CVBS
C
Y
LPF f
o
r
CVBS
TUNER
IF_P
IF_N
IF_P from
T
U
N
ER for DT
V
IF_N from T
UNER for DT
V
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