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¤

 2005 Microchip Technology Inc.

DS39663A-page 1

• Operating voltage range: 2.0V to 3.6V

• 5.5V tolerant input (digital pins only)

• On-chip 2.5V regulator

• Low-power, high-speed CMOS Flash technology

• C compiler optimized architecture: 

- Optional extended instruction set designed to 

optimize re-entrant code

• Priority levels for interrupts

• 8 x 8 Single-Cycle Hardware Multiplier

• Extended Watchdog Timer (WDT):

- Programmable period from 4 ms to 131s

• Single-Supply In-Circuit Serial Programming™ 

(ICSP™) via two pins

• In-Circuit Debug (ICD) with three Break points via 

two pins

• Power-Managed modes:

- Run: CPU on, peripherals on

- Idle: CPU off, peripherals on

- Sleep: CPU off, peripherals off

• Two Crystal modes, up to 40 MHz

• 4x Phase Lock Loop (PLL)

• Two External Clock modes, up to 40 MHz

• Internal 31 kHz oscillator

• Secondary oscillator using Timer1 @ 32 kHz

• Two-Speed Oscillator Start-up

• Fail-Safe Clock Monitor:

- Allows for safe shutdown if peripheral clock 

stops

• High-current sink/source 25 mA/25 mA 

(PORTB and PORTC)

• Four programmable external interrupts

• Four input change interrupts

• Two Capture/Compare/PWM (CCP) modules

• Three Enhanced Capture/Compare/PWM (ECCP) 

modules:

- One, two or four PWM outputs

- Selectable polarity

- Programmable dead time

- Auto-Shutdown and Auto-Restart

• Two Master Synchronous Serial Port (MSSP) 

modules supporting 3-wire SPI™ (all 4 modes) 
and I

2

C™ Master and Slave modes

• Two Enhanced Addressable USART modules:

- Supports RS-485, RS-232 and LIN 1.2

- Auto-Wake-up on Start bit

- Auto-Baud Detect

• 10-bit, up to 15-channel Analog-to-Digital 

Converter module (A/D): 

- Auto-acquisition capability

- Conversion available during Sleep

- Self-calibration feature

• Dual analog comparators with input multiplexing

• Address capability of up to 2 Mbytes

• 8-bit or 16-bit interface

• 12-bit, 16-bit and 20-bit Addressing modes

5

1

DS39663A-page 2

¤

 2005 Microchip Technology Inc.

PIC18F65J10

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1
2
3
4
5
6
7
8
9
10
11
12
13
14

38
37
36
35

34
33

50

49

17

18

19

20

21

22

23

24

25

26

RE2

/CS

/P

2B

RE3

/P

3

C

RE4

/P

3

B

RE5

/P

1

C

RE6

/P

1

B

RE7

/E

CCP2

/P

2A

RD0

/PS

P

0

V

DD

V

SS

RD1

/PS

P

1

RD2

/PS

P

2

RD3

/PS

P

3

RD4

/P

S

P

4

/S

D

O2

RD5

/P

S

P

5

/S

D

I2/S

DA

2

RD6

/PS

P

6

/SCK2

/SCL

2

RD7

/PS

P

7

/SS2

RE1/WR/P2C

RE0/RD/P2D

RG0/ECCP3/P3A

RG1/TX2/CK2

RG2/RX2/DT2

RG3/CCP4/P3D

MCLR

RG4/CCP5/P1D

V

SS

V

DDCORE

/V

CAP

RF7/SS1

RF6/AN11

RF5/AN10/CV

REF

RF4/AN9
RF3/AN8

RF2/AN7/C1OUT

RB0/INT0/FLT0
RB1/INT1

RB2/INT2
RB3/INT3
RB4/KBI0
RB5/KBI1
RB6/KBI2/PGC
V

SS

OSC2/CLKO
OSC1/CLKI
V

DD

RB7/KBI3/PGD

RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A

ENVREG

RF

1

/AN6

/C2

OUT

AV

DD

AV

SS

RA3

/AN3

/V

RE

F

+

RA2

/AN2

/V

RE

F

-

RA1

/AN1

RA0

/AN0

V

SS

V

DD

RA

4

/T

0

CKI

RA5

/AN4

RC1/T

1

O

S

I/ECCP2

/P

2A

RC0/

T

1

O

SO/T

13

CK

I

R

C

7/R

X

1/

D

T

1

RC6/T

X

1

/CK

1

RC5/SDO1

15
16

31

40
39

27

28

29

30

32

48
47
46
45

44
43
42
41

54

53

52

51

58

57

56

55

60

59

64

63

62

61

 The ECCP2/P2A pin placement depends on the setting of the CCP2MX configuration bit.

5

2

•

•

•

•

•

•

•

•

•

•

•

•

•

•

The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec-
trically erasable and programmable read-only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT24C01A/02/04/08/16 is available in space-saving 8-lead PDIP, 
8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8-
lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial inter-
face. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to
5.5V) versions. 

Table 1.  Pin Configuration

A0 - A2

Address Inputs

SDA

Serial Data

SCL

Serial Clock Input 

WP

Write Protect

NC

No Connect

GND

Ground

VCC

Power Supply

(1)

(2)

0180T–SEEPR–12/04

Note: 1. This device is not recom-

mended for new designs.
Please refer to AT24C08A.

2. This device is not recom-

mended for new designs.
Please refer to AT24C16A.

8-lead SOIC

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

8-lead PDIP

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

8-lead MAP

Bottom View

1

2

3

4

8

7

6

5

VCC

WP

SCL

SDA

A0

A1

A2

GND

5-lead SOT23

1

2

3

5

4

SCL

GND

SDA

WP

VCC

8-ball dBGA2

Bottom View

VCC

WP

SCL

SDA

A0

A1

A2

GND

1

2

3

4

8

7

6

5

8-lead TSSOP

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

5

3

LOW DROP FIXED AND ADJUSTABLE

POSITIVE VOLTAGE REGULATORS



March 2001

■

LOW DROPOUT VOLTAGE (1V TYP)

■

2.85V DEVICE PERFORMANCES ARE

SUITABLE FOR SCSI-2 ACTIVE
TERMINATION

■

OUTPUT CURRENT UP TO 800mA

■

FIXED OUTPUT VOLTAGE OF: 1.8V, 2.5V,

2.85V, 3.0V, 3.3V, 5.0V

■

ADJUSTABLE VERSION AVAILABILITY

(V

ref

=1.25V)

■

INTERNAL CURRENT AND THERMAL LIMIT

■

AVAILABLE IN

±

1% (AT 25

o

C) AND 2% IN

FULL TEMPERATURE RANGE

■

SUPPLY VOLTAGE REJECTION : 75 dB (TYP)

■

TEMPERATURE RANGE : 0

o

C TO 125

o

C

The LD1117 is a LOW DROP Voltage Regulator
able to provide up to 800mA of Output Current,
available

even

in

adjustable

version

(V

ref

=1.25V). Concerning fixed versions, are

offered the following Output Voltages: 2.5V,
2.85V, 3.0V 3.3V and 5.0V. The 2.85V type is
ideal for SCSI-2 lines active termination. The
device is supplied in: SOT-223, DPAK, SO-8
and TO-220. The SOT-223 and DPAK surface
mount

packages

optimize

the

thermal

characteristics even offering a relevant space
saving effect. High efficency is assured by NPN

pass transistor. In fact in this case, unlike than
PNP one, the Quiescent Current flows mostly
into the load. Only a very common 10

µ

F

minimum capacitor is neede d for stability. On
chip trimming allows the regulator to reach a
very tight output voltage tolerance, within

±

1%

at 25

o

C. The ADJUSTABLE LD1117 is pin to

pin

compatible

with

the

other

standard

Adjustable voltage regulators maintaining the
bette r performances in terms of Drop and
Tolerance.

1/18

5

4