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AN8814SB

■

Electrical Characteristics at T

a

 

=

 

25

°

C

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Current consumption with no load

I

TOT

V

CC 

=

 5 V

5

10

15

mA

Motor driver 1 to motor driver 4

Input offset voltage

V

IOF

V

CC

 

=

 5 V, V

PC1

 

=

 V

PC2

 =

 0 V,

−

10

0

10

mV

R

L1

 to R

L4

 

= 8 

k

Ω

, R

1

 to R

4

 = 10 

k

Ω

Output offset voltage

V

OOF

V

CC

 

=

 5 V, V

PC1

 

=

 V

PC2

 =

 0 V,

−

50

0

50

mV

R

L1

 to R

L4

 

= 8 

k

Ω

, R

1

 to R

4

 = 10 

k

Ω

Gain

G

V

CC

 

=

 5 V, V

PC1

 

=

 V

PC2

 =

 0 V,

18.0

20.0

22.0

dB

R

L1

 to R

L4

 

= 8 

k

Ω

, R

1

 to R

4

 = 10 

k

Ω

Maximum output amplitude (

+

)

V

L

+

V

CC

 

=

 5 V, V

PC1

 

=

 V

PC2

 =

 0 V,

2.4

2.7



V

R

L1

 to R

L4

 

= 8 

k

Ω

, R

1

 to R

4

 = 10 

k

Ω

Maximum output amplitude (

−

)

V

L

−

V

CC

 

=

 5 V, V

PC1

 

=

 V

PC2

 =

 0 V,



−

2.7

−

2.4

V

R

L1

 to R

L4

 

= 8 

k

Ω

, R

1

 to R

4

 = 10 

k

Ω

Motor driver 1

High-level threshold voltage

V

PCH1

V

CC

 

=

 5 V, R

L1

 

=

 8 

Ω

, R

1

 

=

 10 k

Ω

2.0





V

Low-level threshold voltage

V

PCL1

V

CC

 

=

 5 V, R

L1

 

=

 8 

Ω

, R

1

 

=

 10 k

Ω





0.5

V

Motor driver 2

High-level threshold voltage

V

PCH2

V

CC

 

=

 5 V, R

L2

 

=

 8 

Ω

, R

2

 

=

 10 k

Ω

2.0





V

Low-level threshold voltage

V

PCL2

V

CC

 

=

 5 V, R

L2

 

=

 8 

Ω

, R

2

 

=

 10 k

Ω





0.5

V

Reset circuit

Reset operation release supply

V

RST

I

IN

 

=

 10 

µ

A, R

1

 to R

 4

 

=

 10 k

Ω

2.1

2.3

2.5

V

voltage

3.3 V regulator

Output voltage

V

REG

V

CC

 

=

 5 V

3.1

3.3

3.5

V

Output load fluctuation

∆

V

R

V

CC

 

=

 5 V

−

50

0

50

mV

Supply voltage fluctuation

∆

V

V

V

CC

 

=

 5 V/12 V

−

5

0

5

mV

Op-amp.

Input offset voltage

V

OF

V

CC

 

=

 5 V

−

10

0

10

mV

Input bias current

I

BOP

V

CC

 

=

 5 V



150

500

nA

High-level output voltage

V

OH

V

CC

 

=

 5 V

4.0





V

Low-level output voltage

V

OL

V

CC

 

=

 5 V





1.5

V

Output driving current sink

I

SIN

V

CC

 

=

 5 V

2.0





mA

Output driving current source

I

SOU

V

CC

 

=

 5 V

2.0





mA

29

AN8814SB

■

Electrical Characteristics at T

a

 

=

 

25

°

C (continued)

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Thermal protection circuit

Operating temperature

T

THD



180



°

C

equilibrium value

Operating temperature

∆

T

THD



45



°

C

hysteresis width

•

Design reference data

Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

■

Usage Notes

1. Avoid the short-circuits between output and V

CC

 , and between output pin and GND.

Otherwise, the IC is likely to break down or emit smoke.

2. An appropriate prior study should be done for use of dip soldering.

■

Application Notes

•

P

D

 



 T

a

 curves of HSOP042-P-0400

P

D

 



 T

a

0.000

0

25

50

75

100

125

150

2.500

1.500

1.000

2.240

2.000

1.042

0.500

Ambient temperature   T

a

 (

°

C)

Po

wer dissipation

   P

D

 (W)

Mounted on standard board
(glass epoxy: 
 75 mm 

×

 75 mm 

×

 t1.6 mm)

R

th(j-a)

 

=

 55.8

°

C/W

Independent IC
without a heat sink
R

th(j-a)

 

=

 119.9

°

C/W

30

®

TM

●

∆Σ

●

●

●

●

●

●

±

●

●

●

© 1999 Burr-Brown Corporation

®

The PCM1732 is designed for mid- to high-grade
digital audio applications which achieve 96kHz sam-
pling rates with 24-bit audio data, such as High Defi-
nition Compatible Digital (HDCD) CD players, DVD
players, mini-disc players and AV receivers.

PCM1732 uses a newly-developed “enhanced, multi-
level delta-sigma modulator” architecture that im-
proves audio dynamic performance and reduces jitter
sensitivity.

The internal digital filter operates at 8x oversampling
at a 96kHz sampling rate, with –120dB stopband
attenuation.

®

HDCD

®

 is a registered trademark of Pacific Microsonics, Inc.

HDCD

®

 technology is provided under license from Pacific Microsonics

Inc. The PCM1732’s design is covered by the following patents:
In the USA: 45,479,168,  5,638,074,  5,640,161,  5,808,574,  5,838,274
5,854,600,  5,864,311,  5,872,531.
In Australia: 669,114.
Other patents pending.

Serial

Input

I/F

Mode

Control

I/F

HDCD

Hidden

Code

Recovery  

HDCD

8x

Oversampling

Digital Filter

Enhanced

Multi-Level

∆Σ

Modulator

Crystal/OSC

XTI

SCK

XTO

CLKO

V

CC1

AGND1

V

DD

DGND

HDCD

Amplitude

Decoding

V

OUT

L

V

CC2

L

V

CC2

R

AGND2R

AGND2L

EXTL

Open
Drain

DAC

Low-Pass

Filter

Low-Pass

Filter

BPZ Control

V

OUT

R

EXTR

ZERO

DAC

ML/I

2

S

MC/DEM

MD/FSS

CS/IWO

MODE

MUTE

RST

LRCIN

DIN

BCKIN

Power Supply

Power-On Reset

31

®

All specifications at +25

°

C, +V

CC

 = +V

DD 

= +5V, f

S

 = 44.1kHz, and SYSCLK = 384f

S

, unless otherwise noted.

24

Bits

DATA FORMAT
Audio Data Interface Format

Standard/I

2

S

Data Bit Length

16/20/24 Selectable

Audio Data Format

MSB-First, Binary Two’s Complement

Sampling Frequency (f

S

)

16

96

kHz

System Clock Frequency

(1)

256/384/512/768f

S

System Clock Duty Cycle

40

60

%

DIGITAL INPUT/OUTPUT LOGIC LEVEL
Input Logic Level (except XTI): V

IH

2.0

V

V

IL

0.8

V

Output Logic Level (CLKO):

V

OH

I

OH 

= 2mA

4.5

V

V

OL

I

OL 

= 4mA

0.5

V

Output Rise Time

20 ~ 80% V

DD

, 10pF

5.5

ns

Output Fall Time

80 ~ 20% V

DD

, 10pF

4

ns

Output Duty Cycle

10pF Load

30

%

THD+N

V

O

 = 0dB

f

S

 = 44.1kHz

–96

–90

dB

f

S

 = 96kHz

–94

dB

V

O

 = –60dB

f

S

 = 44.1kHz

–42

dB

Dynamic Range

f

S

 = 44.1kHz, EIAJ A-weighted

98

104

dB

f

S

 = 96kHz, A-weighted

103

dB

Signal-to-Noise Ratio

(5)

f

S

 = 44.1kHz, EIAJ A-weighted

98

104

dB

f

S

 = 96kHz, A-weighted

103

dB

Channel Separation

f

S

 = 44.1kHz

96

104

dB

f

S

 = 96kHz

101

dB

DC ACCURACY
Gain Error

±

1.0

±

3.0

% of FSR

Gain Mismatch Channel-to-Channel

±

1.0

±

3.0

% of FSR

Bipolar Zero Error

V

O

 = 0.5V

CC

 at Bipolar Zero

±

30

±

60

mV

ANALOG OUTPUT
Output Voltage

(6)

Full Scale (0dB)

0.57 V

CC

Vp-p

Center Voltage

0.5 V

CC

V

Load Impedance

AC Load

5

k

Ω

(f

S

 = 44.1kHz/48kHz optimal)

Passband

±

0.002dB

0.471f

S

–3dB

0.487f

S

Stopband

0.515f

S

Passband Ripple

< 0.453f

S

±

0.0001

dB

Stopband Attenuation

Stopband = 0.515f

S

–109

dB

Stopband = 0.520f

S

–123

dB

Delay Time

81/f

S

sec

Filter Characteristics 2
 (f

S

 = 88.2kHz/96kHz optimal)

Passband

±

0.005dB

0.395f

S

–3dB

0.441f

S

Stopband

0.538f

S

Passband Ripple

< 0.341f

S

±

0.0001

dB

Stopband Attenuation

Stopband = 0.538f

S

–132

dB

Delay Time

31/f

S

sec

De-Emphasis Error

±

0.1

dB

INTERNAL ANALOG FILTER
–3dB Bandwidth

100

kHz

Passband Response

f = 20kHz

–0.16

dB

POWER SUPPLY REQUIREMENTS
Voltage Range

V

DD,

 V

CC

4.5

5

5.5

VDC

Supply Current: I

CC 

+ I

DD

f

S

 = 44.1kHz

35

105

mA

f

S

 = 96kHz

93

mA

Power Dissipation

f

S

 = 44.1kHz

425

525

mW

f

S

 = 96kHz

465

mW

TEMPERATURE RANGE
Operating

–25

+70

°

C

Storage

–55

+100

°

C

Thermal Resistance, 

θ

JA

67

°

C/W

NOTES: (1) Refer to the System Clock section of this data sheet. (2) An external buffer is recommended. (3) Dynamic performance specifications are tested with 20kHz low-pass
filter and THD+N specifications are tested with 30kHz LPF, 400Hz HPF, Average Mode. (4) Dynamic performance specifications are tested with HDCD gain scaling set to analog
gain scaling. (5) SNR is tested with infinite zero detection off. (6) Output level is for sine wave. DAC outputs 0.64 V

CC

 (peak-to-peak) due to filter response as transient.

32