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  • KDL-40W580B, KDL-40W590B, KDL-40W600B, KDL-40W605B, KDL-40W607B, KDL-40W609B, KDL-48W580B, KDL-48W590B, KDL-48W600B, KDL-48W605B, KDL-48W607B, KDL-48W609B, KDL-60W605B, KDL-60W607B, KDL-60W610B, KDL-60W630B

DOWNLOAD Sony KDL-40W580B / KDL-40W590B / KDL-40W600B / KDL-40W605B / KDL-40W607B / KDL-40W609B / KDL-48W580B / KDL-48W590B / KDL-48W600B / KDL-48W605B / KDL-48W607B / KDL-48W609B / KDL-60W605B / KDL-60W607B / KDL-60W610B / KDL-60W630B Service Manual ↓ Size: 15.73 MB | Pages: 118 in PDF or view online for FREE

Model
KDL-40W580B KDL-40W590B KDL-40W600B KDL-40W605B KDL-40W607B KDL-40W609B KDL-48W580B KDL-48W590B KDL-48W600B KDL-48W605B KDL-48W607B KDL-48W609B KDL-60W605B KDL-60W607B KDL-60W610B KDL-60W630B
Pages
118
Size
15.73 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LEVEL3
File
kdl-40w580b-kdl-40w590b-kdl-40w600b-kdl-40w605b-kd.pdf
Date
PREV: Sony KDL-32W700B / KDL-42W700B / KDL-42W800B / KDL-42W805B / KDL-50W700B / KDL-50W790B / KDL-50W800B / KDL-50W805B / KDL-50W807B / KDL-55W700B / KDL-55W790B / KDL-55W800B / KDL-55W805B / KDL-55W807B Service Manual

Sony KDL-40W580B / KDL-40W590B / KDL-40W600B / KDL-40W605B / KDL-40W607B / KDL-40W609B / KDL-48W580B / KDL-48W590B / KDL-48W600B / KDL-48W605B / KDL-48W607B / KDL-48W609B / KDL-60W605B / KDL-60W607B / KDL-60W610B / KDL-60W630B Service Manual ▷ View online

Chassis: 
RB2G, 
HM 
                                                       
 
 
 
 
 
93 
 
              
 
 
 
 
Chassis: 
RB2G, 
HM
A BOARD SCHEMATIC DIAGRAM (4 OF 24)
Compatible
DESCRIPTION
A
4
H
11
MODEL
B
5
I
12
ORIGINAL
C
6
J
13
SHEET
D
7
K
14
1
E
8
L
15
2
F
9
PART NO.
16
3
G
10
GPIO_22/DAMP_IC_SEL
BAX_L BOARD
SYSTEM(MAIN)
ALL resistors are in ohms,W unless otherwise noted.
ALL capacitors are in uF(p;pF)unless otherwise noted.
2014/02/27
20:15
RB2_BAX_L_CVDA_270214.cir/004.sht
5004103813
RB2
4/18
To PCB System
CL7006
C7036
XX
C7029
XX
X_SYSTEM_RST
012:10G;018:3K;009:6I;015:6B
X_SHORT_DET
009:5E
T_HTL_VOL_UP
009:8E
0
R7004
GND_D
C7040
XX
T_HTL_SP_MUTE
009:8E
I2CC_SDA
016:9D
XX
R7006
I2CA_SCL
011:9G
UARTE_RX
005:2H
PICTURE_MUTE_INT
018:6I
I2CC_SCL
016:9E
CL7007
XX
R7005
CI_OINT
013:5F
C7043
XX
CCP_INT
018:6I
T_HTL_VOL_DOWN
009:8E
GND_D
C7030
XX
C7033
XX
GND_D
JACK_DET
002:4C
LNB_CONT
009:5E
DENEB_INT
011:9G
I2CB_SDA
018:6F;009:6I
C7044
0.1
16V
X7R
XX
R7007
C7042
XX
I2CB_SCL
018:6E;009:6I
C7037
XX
IC7001
MM3285FNRE
1
SCL
2
GND
3
A1
4
VDD
5
A0
6
SDA
C7039
XX
C7031
XX
C7035
XX
I2CA_SDA
011:9G
C7038
XX
C7027
XX
+3.3V_MAIN
XX
R7015
CR_DET
009:6E
XX
R7003
SC_LED_PWM_W
005:14J
ACT_STBY
002:3B
C7025
XX
XX
R7014
X_ARM_SRST
005:15E
C7041
XX
JL7007
XX
R7054
JL7002
JL7004
JL7006
XX
R7049
XX
R7050
JL7005
XX
R7051
GND_D
XX
R7052
XX
R7053
JL7001
JL7003
+3.3V_MAIN
DEBUG_LED3
004:4E
XX
*R7055
DAUOA_LRCK_CLK
012:7G;012:9G
DAUOC_LRCK_CLK
018:6F;018:13G
DAUOA_BCK_CLK
012:7G;012:9G
DEBUG_LED2
004:4E
*RB7003
XX
2
1
4
3
6
5
8
7
*D7001
XX
DAUOC_BCK_CLK
018:6F;018:13G
*D7002
XX
XX
*R7056
XX
*R7048
*D7003
XX
DEBUG_LED1
005:9B
STBY_+3.3V
GND_D
*S7001
XX
1
2
3
4
5
6
7
8
+3.3V_MAIN
GND_D
C7016
XX
C7018
XX
C7020
XX
C7022
XX
C7024
XX
C7026
XX
C7028
XX
C7032
XX
C7034
XX
XX
R7008
XX
R7009
XX
R7012
XX
R7013
XX
R7019
XX
R7020
XX
R7025
XX
R7030
XX
R7029
XX
R7031
XX
R7032
XX
R7034
XX
R7035
XX
R7038
0
R7039
CL7013
XX
R7024
XX
R7040
XX
R7041
XX
R7042
XX
R7043
XX
R7044
XX
R7045
XX
R7046
0
R7047
UARTE_TX
005:2H
XX
R7026
GPIO_3
006:8B
0
R7010
0
R7011
DEBUG_LED3
004:15D
GPIO_4
006:8B
PANEL_PWR
002:4C;016:8E;016:8E;016:14B
GPIO_10
006:8B
GPIO_11
006:8B
XX
R7016
XX
R7017
XX
R7018
X_AUDIO_MON
012:10G
DEBUG_LED2
004:15D
LD_STBY
002:5C
GPIO_9
006:8B
XX
R7021
XX
R7022
XX
R7023
NMI1
004:3C
NMI2
004:3D
NMI1
004:4F
CL7001
GND_D
GND_D
+3.3V_MAIN
CL7003
CL7002
+3.3V_MAIN
NMI2
004:4F
CL7004
XX
R7002
XX
R7001
GPIO_15
006:8C
GPIO_16
006:8C
GPIO_14
006:8C
C7023
XX
C7021
XX
C7019
XX
C7017
XX
C7015
XX
C7013
XX
C7011
XX
C7009
XX
C7007
XX
C7005
XX
C7003
XX
C7001
XX
GPIO_35
006:8C
XX
R7033
GPIO_44
006:8C
XX
R7036
XX
R7037
XX
R7027
XX
R7028
C7014
XX
C7012
XX
C7010
XX
C7008
XX
C7006
XX
C7004
XX
C7002
XX
PC_CON_DET
009:6E
VIDEOB_DET
009:6E
VIDEOA_DET
009:6E
LED_PWM_R
005:3B
SC_LED_PWM_B
005:14J
SC_LED_PWM_G
005:14J
SC_BT_CTS
005:14I
JL7010
JL7015
MS_SCK
JL7016
MS_DATA
MS_BS
*CN7001
XX
GND
MS_PON
MS_INS
MS_BS
GND
MS_DATA
GND
MS_SCK
VCC
VCC
MS_PON
018:13J
MS_INS_X
JL7011
JL7014
JL7009
JL7012
+3.3V_MAIN
GND_D
JL7013
CL7010
CL7009
RB7002
2.2k
2
1
4
3
6
5
8
7
RB7001
2.2k
2
1
4
3
6
5
8
7
HP_DET
012:13D
X_BROWNIE_RST
018:3K
X_CAMERA_RST
004:12E
X_MIC_RST
004:12E
X_CAMERA_RST
004:11E
X_MIC_RST
004:11E
CL7011
CL7012
PANEL_DET
016:10E
*Q7002
XX
*Q7001
XX
*Q7003
XX
*IC9000
CXD4748GB
AC2
GPIO_0/IOEXB_CLK
AB3
GPIO_1/IOEXB_DATA/JTAG_SRST
AC3
GPIO_2
AJ4
GPIO_5
AB2
GPIO_6/PCDC_OUT/FE_CLKINB
AC1
GPIO_7/PCDD_OUT/FE_PWMA
AH3
GPIO_8/PCDE_OUT/FE_CLKINA
AA1
GPIO_12/TIMER_CMPD/SPDIF_SEL
E1
GPIO_13/TIMER_CAPC/FE_WPMB/CK_EXT_PCD
AB1
GPIO_17/IOEXC_CLK/PCDA_OUT
AE4
GPIO_18/IOEXC_DATA/PCDA_IN
AA2
GPIO_19/IOEXC_LATCH
A3
GPIO_20/TIMER_CAPA/LVDS_HS
B4
GPIO_21/TIMER_CAPB/LVDS_VS
D1
GPIO_22/DAUIB_MCK/IOEXD_CLK/PCDB_OUT
C1
GPIO_23/DAUIB_LRCK/IOEXD_DATA/PCDB_IN
D2
GPIO_24/DAUIB_BCK/IOEXD_LATCH
D3
GPIO_25/DAUIB_DAT
B5
GPIO_38/UART_D_TX/UARTE_TX
A5
GPIO_39/UART_D_RX/UARTE_RX
AD2
GPIO_45/FE_PWMC
D5
GPIO_46/FE_CLKINC
AA3
GPIO_47/DAUI_SPDIF_0
AK4
GPIO_63
AH4
GPIO_64
AK3
I2CA_SDA
AJ3
I2CA_SCL
AE1
I2CB_SDA
AE2
I2CB_SCL
E3
I2CC_SDA
E2
I2CC_SCL
AB4
GPIO_26/I2CD_SDA/UARTE_TX
AA4
GPIO_27/I2CD_SCL/UARTE_RX
0
*R7057
GND_D
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
A-side
Temp sensor
B-side mount
Temp Sensor
Panel
TUNER
HSYNC_MON
HDMI_EQ, TEMP_Sensor
VPC
Select:InternalPU
SYSTEM(MAIN) (7001-7300)
VSYNC_MON
For HW debug.
UART_RX
MODEL MATRIX for factory
B side
■ 00:Disable (default)
*** Strap Setting ***
DAUOA_BCK  = STRAP_G[4](InternalPD)
JTAG Select
□ 01:MAIN CPU
DAUOC_LRCK = STRAP_G[6](InternalPD)
■ 00:STBY CPU (default)
DAUOA_LRCK = STRAP_G[3](InternalPD)
DEBUG LED
□ 10:VPC CPU
□ 01:ICC
□ 11:Reserved
MeP E-JTAG Select
ICC SEL Strap Setting
□ 11:Reserved
□ 10:LD
DAUOC_BCK  = STRAP_G[7](InternalPD)
ACT_STBY is needed with 2 G-board model.
Internal PU
Internal PU
Internal PD
Internal NO
Internal PD
Internal NO
Internal PD
Internal PD
Internal PD
Non Maskable Interrupt for software debug
Put CL near each other,
easy to short in A side.
Put CL near each other,
easy to short in A side.
Internal pull up by STBY FW
GPIO 32:PANEL_CTRL
GPIO 33:PANEL_CTRL
GPIO 34:PANEL_CTRL
GPIO 36:MS_PON
GPIO 37:MS_INS_X
GPIO 40:PANEL_CTRL
GPIO 41:PANEL_CTRL
GPIO 42:PANEL_CTRL
GPIO 43:PANEL_CTRL
GPIO 48:DAUOA_DAT_1
GPIO 49:DAUOA_DAT_2
GPIO 50:DAUO_SPDIF_1
GPIO 51:LED_MUTE
GPIO 52:TSIO_CK
GPIO 53:TSIO_EN
GPIO 54:TSIO_STRT
GPIO 55:TSIO_DAT0
GPIO 56:TSIO_DAT1
GPIO 57:TSIO_DAT2
GPIO 58:TSIO_DAT3
GPIO 59:TSIO_DAT4
GPIO 60:TSIO_DAT5
GPIO 61:TSIO_DAT6
GPIO 62:TSIO_DAT7
GPIO 31:USB_OVCD_1
GPIO 30:USB_PEN_1
GPIO 29:USB_OVCD_0
GPIO 28:USB_PEN_0
Up date MS connector
MS
Internal pull up by STBY FW
PU for I2CC is not needed (same as RB1)
JIG setting
JIG setting
JIG setting
For W-Audio debug
For W-Audio debug
PU for I2CD is not ready for ray-out reason
Internal PU
2014/01/06 17:32
[ JIG ]
┌────────┬────────┬────────┐
│                │No              │Yes             │
├────────┼────────┼────────┤
│CN7001          │XX              │10P             │
│                │                │                │
├────────┼────────┼────────┤
│D7001           │XX              │SML-D13M8WT86S  │
├────────┼────────┼────────┤
│D7002           │XX              │SML-D13M8WT86S  │
├────────┼────────┼────────┤
│D7003           │XX              │SML-D13M8WT86S  │
├────────┼────────┼────────┤
│Q7001           │XX              │PDTC114EU       │
├────────┼────────┼────────┤
│Q7002           │XX              │PDTC114EU       │
├────────┼────────┼────────┤
│Q7003           │XX              │PDTC114EU       │
├────────┼────────┼────────┤
│R7048           │XX              │1.5k            │
│                │                │1/16W           │
│                │                │CHIP            │
├────────┼────────┼────────┤
│R7055           │XX              │1.5k            │
│                │                │1/16W           │
│                │                │CHIP            │
├────────┼────────┼────────┤
│R7056           │XX              │1.5k            │
│                │                │1/16W           │
│                │                │CHIP            │
├────────┼────────┼────────┤
│RB7003          │XX              │2.2k            │
├────────┼────────┼────────┤
│S7001           │XX              │169227021       │
└────────┴────────┴────────┘
2014/01/06 17:32
[ SOC ]
┌────────┬────────┬────────┐
│                │60              │60AVS           │
├────────┼────────┼────────┤
│IC9000          │CXD4748GB       │CXD4748GB-1     │
└────────┴────────┴────────┘
2014/01/06 17:32
[ DAMP ]
┌────────┬────────┬────────┐
│                │IC YDA178-SZE2  │IC YDA179-SZE2  │
├────────┼────────┼────────┤
│R7057           │0               │XX              │
│                │                │                │
│                │CHIP            │                │
└────────┴────────┴────────┘
1
2
3
4
5
6
7
8
9
10
PERI(Normal)
Chassis: 
RB2G, 
HM 
                                                       
 
 
 
 
 
95 
 
              
 
 
 
 
Chassis: 
RB2G, 
HM
A BOARD SCHEMATIC DIAGRAM (6 OF 24)
FIF_RND_DAT[6]
FIF_RND_DAT[5]
FIF_RND_DAT[4]
FIF_RND_DAT[7]
FIF_RND_DAT[3]
FIF_RND_DAT[2]
FIF_RND_DAT[1]
FIF_RND_DAT[0]
FIF_RND_DAT[4]
FIF_RND_DAT[0]
FIF_RND_DAT[1]
FIF_RND_WE_X
FIF_RND_DAT[3]
FIF_RND_WP_X
FIF_RND_ALE
FIF_RND_CLE
FIF_RND_DAT[2]
FIF_RND_RE_X
FIF_RND_RB
FIF_RND_DAT[6]
FIF_RND_DAT[5]
FIF_RND_DAT[7]
FIF_RND_WP_X
FIF_RND_WE_X
FIF_RND_CE_X
FIF_RND_RB
FIF_RND_RB
FIF_RND_RE_X
FIF_RND_ALE
FIF_RND_CLE
FIF_RND_CE_X
C1013
0.1
RB1001
68
RB1000
68
CL1009
CL1010
CL1008
CL1012
C1014
XX
0
R1043
CL1014
+3.3V_NAND
C1007
XX
0
R1042
CL1013
+3.3V_NAND
GND_D
0
R1037
CL1011
0
R1038
CL1015
47
R1019
XX
R1039
0
R1041
CL1039
0
R1040
CL1038
CL1040
CL1042
CL1044
C1015
XX
STBY_+3.3V
CL1043
CL1041
CL1017
CL1018
CL1048
CL1016
CL1047
CL1046
CL1020
CL1045
C1012
0.1
RB1008
68
2
1
4
3
6
5
8
7
+3.3V_NAND
CL1051
47
R1020
RB1007
68
2
1
4
3
6
5
8
7
100k
R1003
CL1019
CL1049
CL1050
GND_D
CL1052
XX
R1012
CL1022
C1000
0.1
CL1021
NAND1_PWR
005:9B
10k
R1008
1005
47
R1022
XX
R1010
GND_D
GND_D
GND_D
SPID_DI
018:6H;018:11I
SPIC_DI
018:6G;018:11H
STBY_+3.3V
+3.3V_MAIN
BAX_L BOARD
FLASH MEMORY INTERFACE
ALL resistors are in ohms,W unless otherwise noted.
ALL capacitors are in uF(p:pF)unless otherwise noted.
2014/02/27
20:15
RB2_BAX_L_CVDA_270214.cir/006.sht
5004103813
RB2
6/18
To PCB System
XX
R1000
XX
R1001
+3.3V_NAND
47k
R1027
GND_D
GND_D
+3.3V_NAND
+3.3V_NAND
1k
R1026
47k
R1028
IC1000
TC58NVG3S0FTAI0B4Q
NC
NC
NC
NC
NC
NC
R/B#
RE#
CE#
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE#
WP#
NC
NC
NC
NC
NC
NC
NC
NC
NC
IO0
IO1
IO2
IO3
NC
NC
NC
VSS
VCC
NC
NC
NC
IO4
IO5
IO6
IO7
NC
NC
NC
NC
STBY_GPIO_19 005:12C
GPIO_11
004:7F
GPIO_3
004:7E
GPIO_4
004:7E
GPIO_9
004:7E
GPIO_10
004:7E
GPIO_15
004:7F
GPIO_16
004:7F
GPIO_14
004:7F
GPIO_35
004:7G
GPIO_44
004:7G
RB1009 47
2
1
4
3
6
5
8
7
GND_D
+3.3V_MAIN
C1006
XX
C1002
XX
C1003
XX
C1016
XX
C1017
XX
C1018
XX
C1019
XX
*IC9000
CXD4748GB
AB18
VDD_NAND
AB19
VDD_NAND
AC18
VDD_NAND
AC19
VDD_NAND
H18
VDD_NAND_STBY
AG30
RND_IO_0/RND_IO_0
AG29
RND_IO_1/RND_IO_1
AF28
RND_IO_2/RND_IO_2
AH30
RND_IO_3/RND_IO_3
AG28
RND_IO_4/RND_IO_4
AH29
RND_IO_5/RND_IO_5
AJ30
RND_IO_6/RND_IO_6
AH28
RND_IO_7/RND_IO_7
AF27
GPIO_3/RND_IO_8
AJ27
GPIO_4/RND_IO_9
AK27
GPIO_9/RND_IO_10
AH26
GPIO_10/RND_IO_11
AJ26
GPIO_11/RND_IO_12
AK26
GPIO_14/RND_IO_13
AG26
GPIO_15/RND_IO_14
AF26
GPIO_16/RND_IO_15
AH27
RND_RE_X/RND_RE_X
AJ29
RND_WE_X/RND_WE_X
AK28
RND_RB/RND_RB
AJ28
RND_ALE/RND_ALE
AK29
RND_CLE/RND_CLE
AE26
GPIO_35/RND_TEST_0
AE27
SYNC_4K2K/RND_TEST_1/GPIO_44
A24
STBY_RND_CE0_X/STBY_RND_CE0_X
B17
STBY_SPIA_DO/STBY_GPIO_19/STBY_RND_CE1_X
B24
STBY_RND_WP_X/STBY_RND_WP_X
Q1000
PDTC144EU
Q1001
PMV32UP
RB1002
47k
FET SW for RawNAND
40m ohm_@Vgs=-2.5V
I = 1A
RawNAND_0_lower
[Strap][Flash Construction Settings]
SPID_DI:SPIC_DI
=STRAP_G[14:13]
=11:
=10:
=01:
=00:
"Boot"
RawNAND
RawNAND
RawNAND
RawNAND
"Bit Width"
8x2
16x1
8x2
8x1
Current Setting: [ALL]    00
For Micron
 25:NC -> GND
 48:NC -> GND
 
 34:NC -> VCC
 39:NC -> VCC
WP and CE are STBY domain line.
Each R is put near STBY domain.
Integrate PullUp/Down R to RB
for cost down
Integrate Dumping R to RB
for cost down
For upper NAND data line
For cascade toporogy
PLEASE PUT B-side
2013/07/05 18:18
[ SOC ]
┌────────┬────────┬────────┐
│                │60              │60AVS           │
├────────┼────────┼────────┤
│IC9000          │CXD4748GB       │CXD4748GB-1     │
└────────┴────────┴────────┘
1234567
42
43
44
4
5
46
47
48
41
40
39
38
37
36
35
34
33
16
15
14
13
1
2
11
10
98
32
31
30
29
28
27
26
25
17
18
19
20
21
22
23
24
FIF
S
DESCRIPTION
A
4
H
11
MODEL
B
5
I
12
ORIGINAL
C
6
J
13
SHEET
D
7
K
14
1
E
8
L
15
2
F
9
PART NO.
16
3
G
10
Chassis: 
RB2G, 
HM 
                                                       
 
 
 
 
 
96 
 
              
 
 
 
 
Chassis: 
RB2G, 
HM
A BOARD SCHEMATIC DIAGRAM (7 OF 24)
DDR3
DESCRIPTION
A
4
H
11
MODEL
B
5
I
12
ORIGINAL
C
6
J
13
SHEET
D
7
K
14
1
E
8
L
15
2
F
9
PART NO.
16
3
G
10
DDR3_1_B_DQ9_HSS
DDR3_1_B_DQ8_HSS
DDR3_1_B_DQ7_HSS
DDR3_1_B_DQ6_HSS
DDR3_1_B_DQ5_HSS
DDR3_1_B_DQ4_HSS
DDR3_1_B_DQ3_HSS
DDR3_1_B_DQ2_HSS
DDR3_1_B_DQ1_HSS
DDR3_1_B_DQ0_HSS
DDR3_1_B_DQ15_HSS
DDR3_1_B_DQ14_HSS
DDR3_1_B_DQ13_HSS
DDR3_1_B_DQ12_HSS
DDR3_1_B_DQ11_HSS
DDR3_1_B_DQ10_HSS
DDR3_1_A14_HSS
DDR3_1_BA2_HSS
DDR3_1_BA0_HSS
DDR3_1_A13_HSS
DDR3_1_A12_HSS
DDR3_1_A11_HSS
DDR3_1_A10_HSS
DDR3_1_A9_HSS
DDR3_1_A8_HSS
DDR3_1_A7_HSS
DDR3_1_A6_HSS
DDR3_1_BA1_HSS
DDR3_1_A5_HSS
DDR3_1_A4_HSS
DDR3_1_A3_HSS
DDR3_1_A2_HSS
DDR3_1_A1_HSS
DDR3_1_A0_HSS
DDR3_1_B_UDQS_HSS_P
DDR3_1_B_LDM_HSS
DDR3_1_B_UDM_HSS
DDR3_1_B_LDQS_HSS_N
DDR3_1_B_LDQS_HSS_P
DDR3_1_B_UDQS_HSS_N
DDR3_1_CKE_HSS
DDR3_1_CS1_HSS
DDR3_1_M_RAS_HSS
DDR3_1_CAS_HSS
DDR3_1_M_WE_HSS
DDR3_1_M_ODT_HSS
DDR3_1_A_DQ0_HSS
DDR3_1_A_DQ1_HSS
DDR3_1_A_DQ2_HSS
DDR3_1_A_DQ3_HSS
DDR3_1_A_DQ4_HSS
DDR3_1_A_DQ5_HSS
DDR3_1_A_DQ6_HSS
DDR3_1_A_DQ7_HSS
DDR3_1_A_DQ8_HSS
DDR3_1_A_DQ9_HSS
DDR3_1_A_DQ10_HSS
DDR3_1_A_DQ11_HSS
DDR3_1_A_DQ12_HSS
DDR3_1_A_DQ13_HSS
DDR3_1_A_DQ14_HSS
DDR3_1_A_DQ15_HSS
DDR3_1_B_DQ0_HSS
DDR3_1_RESET_HSS
DDR3_1_M_WE_HSS
DDR3_1_CS1_HSS
DDR3_1_CS0_HSS
DDR3_1_CAS_HSS
DDR3_1_M_RAS_HSS
DDR3_1_M_ODT_HSS
DDR3_1_CKE_HSS
DDR3_1_B_UDQS_HSS_N
DDR3_1_B_UDQS_HSS_P
DDR3_1_B_LDQS_HSS_N
DDR3_1_B_LDQS_HSS_P
DDR3_1_A_UDQS_HSS_N
DDR3_1_A_UDQS_HSS_P
DDR3_1_A_LDQS_HSS_N
DDR3_1_A_LDQS_HSS_P
DDR3_1_B_UDM_HSS
DDR3_1_B_LDM_HSS
DDR3_1_A_UDM_HSS
DDR3_1_A_LDM_HSS
DDR3_1_BA2_HSS
DDR3_1_BA1_HSS
DDR3_1_BA0_HSS
DDR3_1_A14_HSS
DDR3_1_A13_HSS
DDR3_1_A12_HSS
DDR3_1_A11_HSS
DDR3_1_A10_HSS
DDR3_1_A9_HSS
DDR3_1_A8_HSS
DDR3_1_A7_HSS
DDR3_1_A6_HSS
DDR3_1_A5_HSS
DDR3_1_A4_HSS
DDR3_1_A3_HSS
DDR3_1_A2_HSS
DDR3_1_A1_HSS
DDR3_1_A0_HSS
DDR3_1_B_DQ15_HSS
DDR3_1_B_DQ14_HSS
DDR3_1_B_DQ13_HSS
DDR3_1_B_DQ12_HSS
DDR3_1_B_DQ11_HSS
DDR3_1_B_DQ10_HSS
DDR3_1_B_DQ9_HSS
DDR3_1_B_DQ8_HSS
DDR3_1_B_DQ7_HSS
DDR3_1_B_DQ6_HSS
DDR3_1_B_DQ5_HSS
DDR3_1_B_DQ4_HSS
DDR3_1_B_DQ3_HSS
DDR3_1_B_DQ2_HSS
DDR3_1_B_DQ1_HSS
DDR3_1_A0_HSS
DDR3_1_A1_HSS
DDR3_1_A2_HSS
DDR3_1_A3_HSS
DDR3_1_A4_HSS
DDR3_1_A5_HSS
DDR3_1_A6_HSS
DDR3_1_A7_HSS
DDR3_1_A8_HSS
DDR3_1_A9_HSS
DDR3_1_A10_HSS
DDR3_1_A11_HSS
DDR3_1_A12_HSS
DDR3_1_A13_HSS
DDR3_1_A14_HSS
DDR3_1_A_DQ0_HSS
DDR3_1_A_DQ1_HSS
DDR3_1_A_DQ2_HSS
DDR3_1_A_DQ3_HSS
DDR3_1_A_DQ4_HSS
DDR3_1_A_DQ5_HSS
DDR3_1_A_DQ6_HSS
DDR3_1_A_DQ7_HSS
DDR3_1_A_DQ8_HSS
DDR3_1_A_DQ9_HSS
DDR3_1_A_DQ10_HSS
DDR3_1_A_DQ11_HSS
DDR3_1_A_DQ12_HSS
DDR3_1_A_DQ13_HSS
DDR3_1_A_DQ14_HSS
DDR3_1_A_DQ15_HSS
DDR3_1_M_ODT_HSS
DDR3_1_M_WE_HSS
DDR3_1_CAS_HSS
DDR3_1_M_RAS_HSS
DDR3_1_CS0_HSS
DDR3_1_CKE_HSS
DDR3_1_A_LDQS_HSS_N
DDR3_1_A_LDQS_HSS_P
DDR3_1_A_UDQS_HSS_N
DDR3_1_A_UDQS_HSS_P
DDR3_1_A_LDM_HSS
DDR3_1_A_UDM_HSS
DDR3_1_BA2_HSS
DDR3_1_BA1_HSS
DDR3_1_BA0_HSS
DDR3_1_RESET_HSS
DDR3_1_RESET_HSS
C1410
0.1
16V
X7R
1005
10k
1/16W
RN-CP
R1409
1%
DDR3_1_CLK_P
007:4G;007:11I
GND_D
GND_D
DDR3_1_CLK_N
007:4G;007:11I
100
1/16W
RN-CP
R1404
1%
10k
1/16W
RN-CP
R1410
1%
1005
240
1/16W
RN-CP
R1407
1%
GND_D
C1408
0.1
16V
X7R
1005
DDR3_1_CLK_P
007:4G;007:11D
10k
1/16W
RN-CP
R1411
1%
1005
10k
1/16W
RN-CP
R1408
1%
10k
1/16W
RN-CP
R1412
1%
GND_D
C1409
0.1
16V
X7R
1005
GND_D
GND_D
10k
1/16W
RN-CP
R1413
1%
240
1/16W
RN-CP
R1406
1%
GND_D
DDR3_1_CLK_N
007:4G;007:11D
10k
1/16W
RN-CP
R1415
1%
1005
10k
1/16W
RN-CP
R1414
1%
1005
GND_D
C1407
0.1
16V
X7R
1005
10k
1/16W
RN-CP
R1401
1%
GND_D
10k
1/16W
RN-CP
R1402
1%
220
1/16W
CHIP
R1403
5%
GND_D
DDR3_1_CLK_N
007:11I;007:11D
DDR3_1_CLK_P
007:11I;007:11D
GND_D
C1404
3300p
50V
X7R
1005
GND_D
C1501
0.1
16V
X7R
1005
C1503
0.1
16V
X7R
1005
C1504
0.1
16V
X7R
1005
C1506
0.1
16V
X7R
1005
C1505
0.1
16V
X7R
1005
GND_D
GND_D
C1512
0.1
16V
X7R
1005
C1531
0.1
16V
X7R
1005
BAX_L BOARD
DDR3
ALL resistors are in ohms,W unless otherwise noted.
ALL capacitors are in uF(p:pF)unless otherwise noted.
2014/02/27
20:15
RB2_BAX_L_CVDA_270214.cir/007.sht
5004103813
RB2
7/18
To PCB System
D+1.0V
D+1.0V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
DDR3_+1.5V
GND_D
C1401
22
C1560
0.1
16V
X7R
1005
C1561
0.1
16V
X7R
1005
GND_D
C1533
0.1
16V
X7R
1005
C1511
0.1
16V
X7R
1005
C1510
1
6.3V
X6S
1005
C1551
22
6.3V
X6S
2012
C1534
22
6.3V
X6S
2012
C1532
0.1
16V
X7R
1005
C1509
0.1
16V
X7R
1005
C1556
10
16V
X6S
2012
C1563
XX
C1562
XX
C1565
XX
C1564
XX
C1566
XX
C1662
XX
C1557
22
6.3V
X6S
2012
*IC9000
CXD4748GB
M19
DDR_VDDO
N19
DDR_VDDO
T19
DDR_VDDO
U19
DDR_VDDO
AA25
DDR_A_VREF0
R25
DDR_A_VREF1
M23
DDR_A_ZQ_1_
A29
SSCGFILTERDDR
G22
SSCGVDDDDR
H21
SSCGVSSDDR
AA28
DDR_A_DQ_0_
Y28
DDR_A_DQ_1_
Y30
DDR_A_DQ_2_
Y29
DDR_A_DQ_3_
W29
DDR_A_DQ_4_
W30
DDR_A_DQ_5_
AB28
DDR_A_DQ_6_
W28
DDR_A_DQ_7_
AC29
DDR_A_DQ_8_
AD28
DDR_A_DQ_9_
AB29
DDR_A_DQ_10_
AE30
DDR_A_DQ_11_
AC30
DDR_A_DQ_12_
AE29
DDR_A_DQ_13_
AB30
DDR_A_DQ_14_
AD29
DDR_A_DQ_15_
N28
DDR_A_DQ_16_
M28
DDR_A_DQ_17_
M30
DDR_A_DQ_18_
M29
DDR_A_DQ_19_
L29
DDR_A_DQ_20_
L30
DDR_A_DQ_21_
P28
DDR_A_DQ_22_
L28
DDR_A_DQ_23_
R29
DDR_A_DQ_24_
T28
DDR_A_DQ_25_
P29
DDR_A_DQ_26_
U30
DDR_A_DQ_27_
R30
DDR_A_DQ_28_
U29
DDR_A_DQ_29_
P30
DDR_A_DQ_30_
T29
DDR_A_DQ_31_
E30
DDR_A_ADDR_A_0_
F29
DDR_A_ADDR_A_1_
E28
DDR_A_ADDR_A_2_
E29
DDR_A_ADDR_A_3_
H30
DDR_A_ADDR_A_4_
D29
DDR_A_ADDR_A_5_
H28
DDR_A_ADDR_A_6_
C30
DDR_A_ADDR_A_7_
H29
DDR_A_ADDR_A_8_
D28
DDR_A_ADDR_A_9_
F28
DDR_A_ADDR_A_10_
G28
DDR_A_ADDR_A_11_
F30
DDR_A_ADDR_A_12_
C29
DDR_A_ADDR_A_13_
G29
DDR_A_ADDR_A_14_
J28
DDR_A_BA_0_
J30
DDR_A_BA_1_
J29
DDR_A_BA_2_
AA29
DDR_A_DM_0_
AC28
DDR_A_DM_1_
N29
DDR_A_DM_2_
R28
DDR_A_DM_3_
W26
DDR_A_DQSP_0_
W27
DDR_A_DQSN_0_
AB26
DDR_A_DQSP_1_
AB27
DDR_A_DQSN_1_
N27
DDR_A_DQSP_2_
N26
DDR_A_DQSN_2_
T27
DDR_A_DQSP_3_
T26
DDR_A_DQSN_3_
K27
DDR_A_CKP
K26
DDR_A_CKN
B30
DDR_A_CKE
H25
DDR_A_ODT
J25
DDR_A_RASN
H27
DDR_A_CASN
F25
DDR_A_CSN_0
F27
DDR_A_CSN_1
H26
DDR_A_WEN
C28
DDR_A_RESETN
M25
DDR_A_PLL_AVD
IC1403
H5TQ4G63AFR-PBCR
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13/NC
T7
A14/NC
M7
A15/NC
M2
BA0
N8
BA1
M3
BA2
D3
DMU
E7
DML
C7
DQSU
B7
DQSU#
F3
DQSL
G3
DQSL#
J7
CK
K7
CK#
K9
CKE
L2
CS#
J3
RAS#
K3
CAS#
L3
WE#
K1
ODT
E1
VSS
M1
VSS
P1
VSS
T1
VSS
J2
VSS
B3
VSS
G8
VSS
J8
VSS
A9
VSS
M9
VSS
P9
VSS
T9
VSS
B1
VSSQ
D1
VSSQ
G1
VSSQ
E2
VSSQ
D8
VSSQ
E8
VSSQ
B9
VSSQ
F9
VSSQ
G9
VSSQ
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
T2
RESET#
M8
VREFCA
J1
NC
L1
NC
J9
NC
L9
NC
H1
VREFDQ
L8
ZQ
N1
VDD
R1
VDD
B2
VDD
K2
VDD
G7
VDD
K8
VDD
D9
VDD
N9
VDD
R9
VDD
A1
VDDQ
C1
VDDQ
F1
VDDQ
D2
VDDQ
H2
VDDQ
A8
VDDQ
C9
VDDQ
E9
VDDQ
H9
VDDQ
IC1402
H5TQ4G63AFR-PBCR
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13/NC
T7
A14/NC
M7
A15/NC
M2
BA0
N8
BA1
M3
BA2
D3
DMU
E7
DML
C7
DQSU
B7
DQSU#
F3
DQSL
G3
DQSL#
J7
CK
K7
CK#
K9
CKE
L2
CS#
J3
RAS#
K3
CAS#
L3
WE#
K1
ODT
E1
VSS
M1
VSS
P1
VSS
T1
VSS
J2
VSS
B3
VSS
G8
VSS
J8
VSS
A9
VSS
M9
VSS
P9
VSS
T9
VSS
B1
VSSQ
D1
VSSQ
G1
VSSQ
E2
VSSQ
D8
VSSQ
E8
VSSQ
B9
VSSQ
F9
VSSQ
G9
VSSQ
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
T2
RESET#
M8
VREFCA
J1
NC
L1
NC
J9
NC
L9
NC
H1
VREFDQ
L8
ZQ
N1
VDD
R1
VDD
B2
VDD
K2
VDD
G7
VDD
K8
VDD
D9
VDD
N9
VDD
R9
VDD
A1
VDDQ
C1
VDDQ
F1
VDDQ
D2
VDDQ
H2
VDDQ
A8
VDDQ
C9
VDDQ
E9
VDDQ
H9
VDDQ
C1502
1
6.3V
X6S
1005
C1507
1
6.3V
X6S
1005
C1508
1
6.3V
X6S
1005
DDR
検電ポイント
DDR
のリファレンスパターン領域に影響を与えないよう
貫通VIAから内層経由で表層へ抜く
Part Near DDCON Side
PLEASE PUT B SIDE
PLEASE PUT B SIDE
PLEASE PUT B SIDE
PLEASE PUT B SIDE
2013/07/05 18:12
[ SOC ]
┌────────┬────────┬────────┐
│                │60              │60AVS           │
├────────┼────────┼────────┤
│IC9000          │CXD4748GB       │CXD4748GB-1     │
└────────┴────────┴────────┘
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