Sony KDE-V42A12U / KE-V42A10E Service Manual ▷ View online
3.3 Main function of Each Assembly
3.3.1 X-Main board
The X-main board generates a drive signal by switching the FET in synchronization with Logic
Main board timing and supplies the X electrode of the panel with the drive signal through the
connector.
1) Maintain voltage waveforms (including ERC)
2) Generate X rising ramp signal
3) Maintain Ve bias between Scan intervals
3.3.2 Y-Bain board
The Y-main board generates a drive signal by switching the FET in synchronization with the
Logic Main board timing and sequentially supplies the Y electrode of the panel with the drive
signal through the scan driver IC on the Y-buffer board. This board connected to the panel’s Y
terminal has the following main functions.
1) Maintain voltage waveforms (including ERC)
2) Generate Y-rising Falling Ramp
3) Maintain V scan bias
3.3.3 Logic Main board
The logic main board generates and outputs the address drive output signal and the X ,Y drive
signal by processing the video signals. This Board buffers the address dirve output signal and
feeds it to the address drive IC (COF module)
(video signal- X Y drive signal generation , frame memory circuit / address data rearrangement)
3.3.4 Logic Buffer (E, F)
The logic buffer transmits data signal and control signal.
3.3.5 Y-Buffer board (Upper, Lower)
The Y-buffer board consisting of the upper and lower boards supplies theY-terminal with scan
waveforms. The board comprises 8 scan driver IC’s(ST microelectronics STV 7617 : 64 or 65
output pins) , but 4 ICs for the SD class
3.3.6 TCP (Tape Carrier Package )
The TCP applies Va pulse to the address electrode and constitutes address discharge by the
potential difference between the Va pulse and the pulse applied to the Y electrode. The TCP
comprise 4 data driver Ics (STV7610A : 96 pins output pins) 7 TCPs are required for signal scan
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3.4 PRODUCT/ SERIAL LABEL LOCATION
3.4.1 Serial No.
2 4 1 5 5 0 3 0 0 1 2 9
Serial No
00001~99999
Date 01~31
Month
1~9, A(Oct), B(Nov), C(Dec)
Year 1(2001)~9(2009)
Line No
1 ~ 9 (1 : 1
st
Production Line)
Type
24 (42SD v4)
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4. OPERATION CHECKING AFTER RECTIFICATION
4.1 Flow chart
* A/S Check Point *
4.1.1 No voltage output
Check PSU.
1.Checking the voltage for each assembly
2. Judging the Logic board working or not
3. Adjusting the output signal through test points
4. Checking the panel’s crack
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4.1.2 NO display (operating Voltage but an image doesn’t exist on Screen)
⇒ No Display is related with Y-MAIN, X-MAIN, Logic Main and so on.
This page shows you how to check the boards, and the following pages show you how to
find the defective board.
OK
OK
Logic B’d
Check
① PSU to Logic Cable
② Fuse F2000, F2001
③ LED 2000;Green
④ Each Connector
Replace Logic B’d
NG
Y-Main
Check
① Fuse Open
(F5001, 5002, 5003)
② FET Short/Open
(Q5011, 5013, 5016,
Q5017)
③ FFC Connection
NG
Replace Logic B’d
X-Main
Check
① Fuse Open
(F4001, 4002, 4003)
② FET Short/Open
(Q4010, 4011, 4014,
Q4015)
③ FFC Connection
NG
Replace Logic B’d
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