Sony DVP-CX985V Service Manual ▷ View online
109
DVP-CX985V
Pin No.
Pin Name
I/O
Description
119
IOVSS06
—
Ground terminal (for digital system)
120
SDAD11O
O
Address signal output to the SD-RAM
121, 122
SDCS0ON,
SDCS1ON
O
Chip select signal output to the SD-RAM
123
IOVDD07
—
Power supply terminal (+3.3V) (for digital system)
124
SDCKEO
O
Clock enable signal output to the SD-RAM
125
SDRASON
O
Row address strobe signal output to the SD-RAM
126
IOVSS07
—
Ground terminal (for digital system)
127
SDCLKO
O
Clock (108 MHz) signal output to the SD-RAM
128
IOVDD08
—
Power supply terminal (+3.3V) (for digital system)
129
SDCASON
O
Column address strobe signal output to the SD-RAM
130
SDWEON
O
Write enable signal output to the SD-RAM
131
CVS06
—
Ground terminal (for digital system)
132, 133
SDDQM0O,
SDDQM1O
O
DQM signal output to the SD-RAM
134
IOVSS08
—
Ground terminal (for digital system)
135 to 138
SDDQ6 to SDDQ9
I/O
Two-way data bus with the SD-RAM
139
CVD06
—
Power supply terminal (+1.8V) (for digital system)
140 to 143
SDDQ4, SDDQ5,
SDDQ10,
SDDQ11
I/O
Two-way data bus with the SD-RAM
144
IOVDD09
—
Power supply terminal (+3.3V) (for digital system)
145 to 148
SDDQ2, SDDQ5,
SDDQ12,
SDDQ13
I/O
Two-way data bus with the SD-RAM
149
IOVSS09
—
Ground terminal (for digital system)
150, 151
SDDQ1, SDDQ14
I/O
Two-way data bus with the SD-RAM
152
IOVDD10
—
Power supply terminal (+3.3V) (for digital system)
153, 154
SDDQ0, SDDQ15
I/O
Two-way data bus with the SD-RAM
155
IOVSS10
—
Ground terminal (for digital system)
156
CRPCLKI
I
Not used
157
TESTI
I
Input terminal for the test (normally: fixed at “H”)
158
CLKI
I
Clock (27 MHz) signal input from the clock generator
159
PAVDD18P
—
Power supply terminal (+3.3V) (for analog system)
160
SCLKI
I
System clock (27 MHz) signal input from the clock generator
161
PAVSS18G
I
Ground terminal (for analog system)
162
MBIST_EN
I
Not used
163
SCAN_MOD
I
Not used
164
SCAN_EN
I
Not used
165
IOVDD11
—
Power supply terminal (+3.3V) (for digital system)
166, 167
HAD22I, HAD23I
I
Chip select signal input from the system controller
168, 169
HAD20I, HAD21I
I
Address signal input terminal
170
CVS07
—
Ground terminal (for digital system)
171 to 174
HAD16I to HAD19I
I
Address signal input terminal
175
IOVSS11
—
Ground terminal (for digital system)
176 to 179
HAD12I to HAD15I
I
Address signal input terminal
180
CVD07
—
Power supply terminal (+1.8V) (for digital system)
181 to 184
HAD8I to HAD11I
I
Address signal input terminal
185
IOVDD12
—
Power supply terminal (+3.3V) (for digital system)
110
DVP-CX985V
Pin No.
Pin Name
I/O
Description
186 to 189
HAD4I to HAD7I
I
Address signal input terminal
190
CVS08
—
Ground terminal (for digital system)
191 to 194
HAD3I to HAD0I
I
Address signal input terminal
195
IOVSS12
—
Ground terminal (for digital system)
196
HCSN
I
Read enable signal input from the system controller
197
HRWN
I
Write enable signal input from the system controller
198
HCPUMDI
I
CPU mode selection signal input terminal
199
HIRQON
O
Interrupt signal output to the system controller
200
HWAITON
O
Wait signal output to the system controller
201
CVD08
—
Power supply terminal (+1.8V) (for digital system)
202
DMACK1IN
I
Acknowledge signal input from the system controller
203
DMARQ1ON
O
Request signal input from the system controller
204
DMACK0IN
I
Acknowledge signal input from the system controller
205
DMARQ0ON
O
Request signal input from the system controller
206
IOVDD13
—
Power supply terminal (+3.3V) (for digital system)
207
RSTN
I
Reset signal input from the system controller “L”: reset
208
IOVSS13
—
Ground terminal (for digital system)
111
DVP-CX985V
•
MB BOARD IC501 CXD1938AR (AUDIO DIGITAL SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
CVD00
—
Power supply terminal (+1.8V) (digital system)
2
DSP1ACKO2
O
Acknowledge signal output terminal Not used
3, 4
DSP1ACKO0,
DSP1ACKO1
O
Acknowledge signal output to the AV decoder
5
GND00
—
Ground terminal (digital system)
6
RESET_NI
I
Reset signal input from the system controller “L”: reset
7
GND01
—
Ground terminal (digital system)
8
DSP1DIACKI
I
Audio clock signal input terminal Not used
9
GND02
—
Ground terminal (digital system)
10
DSP1DII
I
Digital audio data input from the DSP
11
IOVDD0
—
Power supply terminal (+3.3V) (digital system)
12
GND03
—
Ground terminal (digital system)
13
CVD01
—
Power supply terminal (+1.8V) (digital system)
14
PLL27_CLNI
I
PLL clock divider reset signal input terminal Not used
15
PLL_ENNI
I
PLL enable signal input terminal Not used
16
PLL_CLNI
I
PLL clock divider reset signal input terminal Not used
17
GND04
—
Ground terminal (digital system)
18
PLL_CLKO
O
PLL clock signal output terminal Not used
19
IOVDD1
—
Power supply terminal (+3.3V) (digital system)
20
PLL_AVDD
O
Power supply terminal (+3.3V) (analog system)
21
GND05
—
Ground terminal (digital system)
22
SCLKI
I
Clock (27 MHz) signal input from the clock generator
23
GND06
—
Ground terminal (digital system)
24
PLL_TST1I
I
Input terminal for the test (normally: fixed at “L”)
25, 26
PLL_TST2I,
PLL_TST3I
I
Input terminal for the test (normally: fixed at “H”)
27
PLL_TST4I
I
Input terminal for the test (normally: fixed at “L”)
28
PLL_AVSS
—
Ground terminal (analog system)
29
IOVDD2
—
Power supply terminal (+3.3V) (digital system)
30
GND07
—
Ground terminal (digital system)
31
CVD02
—
Power supply terminal (+1.8V) (digital system)
32
DSP2DII
I
Digital audio data input from the DSP
33
GND08
—
Ground terminal (digital system)
34
DSP2DIACKI
I
Audio clock signal input terminal Not used
35
GND09
—
Ground terminal (digital system)
36 to 38
DSP2ACKO0 to
DSP2ACKO2
O
Acknowledge signal output terminal Not used
39
IOVDD3
—
Power supply terminal (+3.3V) (digital system)
40
GND10
—
Ground terminal (digital system)
41
CVD03
—
Power supply terminal (+1.8V) (digital system)
42
DSP2LRCKO
O
L/R sampling clock output to the D/A converter
43
DSP2BCKO
O
Bit clock output to the D/A converter
44
DSP2EMPO
O
Emphasis control signal output terminal Not used
45
DSP2DO
O
Digital audio data output terminal
46
IOVDD4
—
Power supply terminal (+3.3V) (digital system)
47
GND11
—
Ground terminal (digital system)
112
DVP-CX985V
Pin No.
Pin Name
I/O
Description
48
DSP2CH12O
O
Audio data (for front) output to the D/A converter
49
DSP2CH34O
O
Audio data (for rear) output to the D/A converter
50
DSP2CH56O
O
Audio data (for center and woofer) output to the D/A converter
51
DSP2CH78O
O
Audio data output to the D/A converter
52
CVD04
—
Power supply terminal (+1.8V) (digital system)
53
GND12
—
Ground terminal (digital system)
54
IOVDD5
—
Power supply terminal (+3.3V) (digital system)
55
DSP2LRCKI
I
L/R sampling clock input from the AV decoder
56
DSP2CH12I
I
Audio data (for front) input from the AV decoder
57
DSP2CH34I
I
Audio data (for rear) input from the AV decoder
58
DSP2CH56I
I
Audio data (for center and woofer) input from the AV decoder
59
DSP2EMPI
I
Emphasis control signal input terminal Not used
60
IOVDD6
—
Power supply terminal (+3.3V) (digital system)
61
GND13
—
Ground terminal (digital system)
62
CVD05
—
Power supply terminal (+1.8V) (digital system)
63
DSP2REQI
I
Request signal input terminal Not used
64
GND14
—
Ground terminal (digital system)
65
DSP2NMII
I
Non-maskable interrupt signal input terminal Not used
66
GND15
—
Ground terminal (digital system)
67
DSP2ACKI
I
Audio clock signal input from the clock generator
68
GND16
—
Ground terminal (digital system)
69
DSP2BCKI
I
Bit clock input from the AV decoder
70
GND17
—
Ground terminal (digital system)
71
IOVDD7
—
Power supply terminal (+3.3V) (digital system)
72
GND18
—
Ground terminal (digital system)
73
CVD06
—
Power supply terminal (+1.8V) (digital system)
74 to 77
ADDR015 to
ADDR018
—
Address signal output terminal Not used
78
IOVDD8
—
Power supply terminal (+3.3V) (digital system)
79
GND19
—
Ground terminal (digital system)
80 to 83
ADDR011 to
ADDR014
—
Address signal output terminal Not used
84
IOVDD9
—
Power supply terminal (+3.3V) (digital system)
85
GND20
—
Ground terminal (digital system)
86
CVD07
—
Power supply terminal (+1.8V) (digital system)
87 to 90
ADDR07 to
ADDR010
—
Address signal output terminal Not used
91
IOVDD10
—
Power supply terminal (+3.3V) (digital system)
92
GND21
—
Ground terminal (digital system)
93 to 96
ADDR03 to
ADDR06
—
Address signal output terminal Not used
97
IOVDD11
—
Power supply terminal (+3.3V) (digital system)
98
GND22
—
Ground terminal (digital system)
99
CVD08
—
Power supply terminal (+1.8V) (digital system)
100 to 102
ADDR00 to
ADDR02
—
Address signal output terminal Not used
103
SRM_RDNO
O
Read enable signal output terminal Not used
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