Sony BDP-N460 Service Manual ▷ View online
6-7
BDP-N460
Pin
Symbol
Type
Description
AA17
DVSS Ground
Digital
Ground
AA18
ADQ21
I/O
DRAM Data Bus Bit 21
AA19
ADQM3
O
DRAM Data Mask 3
AA20
VCC18IO
Power
1.8 V Digital IO Power
AA21
DVSS Ground
Digital
Ground
AA22
VCC18IO
Power
1.8 V Digital IO Power
AA23
AVSS33_DMXTAL
Ground
Analog Ground for DM_XTAL
AA24
VCC18IO
Power
1.8 V Digital IO Power
AA25
BDQ2
I/O
DRAM Data Bus Bit 2
AB1
RTCK
O
JTAG ICE Return Clock
AB2
TDI
I
JTAG ICE Data In/JTAG Boundary Scan Data In
AB3
EFPWRQ25
Power
2.5 V Power for E-Fuse Programming
AB4
VCCK
Power
1.1V Digital Power
AB5
VCCK
Power
1.1V Digital Power
AB6
DVSS Ground
Digital
Ground
AB7
ADQ3
I/O
DRAM Data Bus Bit 3
AB8
ADQ1
I/O
DRAM Data Bus Bit 1
AB9
VCC18IO
Power
1.8 V Digital IO Power
AB10
ADQM1
O
DRAM Data Mask 1
AB11
ADQ9
I/O
DRAM Data Bus Bit 9
AB12
DVSS Ground
Digital
Ground
AB13
ARA2
O
DRAM Address Bus Bit 2
AB14
ARA10
O
DRAM Address Bus Bit 10
AB15
VCC18IO
Power
1.8 V Digital IO Power
AB16
VDD_ARVREF
Power
DRAM Reference Voltage
AB17
ADQ20
I/O
DRAM Data Bus Bit 20
AB18
DVSS Ground
Digital
Ground
AB19
ADQ28
I/O
DRAM Data Bus Bit 28
AB20
ADQ25
I/O
DRAM Data Bus Bit 25
AB21
VCC18IO
Power
1.8 V Digital IO Power
AB22
DVSS Ground
Digital
Ground
AB23
VCC18IO
Power
1.8 V Digital IO Power
AB24
AVDD33_DMXTAL
Power
3.3V Analog Power for DM_XTAL
AB25
DMXTALI
I
Backup 27M Crystal I
AB26
DMXTALO
O
Backup 27M Crystal O
AC1
TRST_
I
JTAG ICE Reset
AC2
SCL
I/O
Serial Interface Control Line
AC3
VCCK
Power
1.1V Digital Power
AC4
VCCK
Power
1.1V Digital Power
AC5
DVCC3IO
Power
3.3 V Digital Power
AC6
DVSS Ground
Digital
Ground
AC7
ADQ0
I/O
DRAM Data Bus Bit 0
AC8
VCC18IO
Power
1.8 V Digital IO Power
AC9
ADQM0
O
DRAM Data Mask 0
AC10
ADQ14
I/O
DRAM Data Bus Bit 14
AC11
DVSS Ground
Digital
Ground
AC12
ARAS_
O
DRAM Row Address Strobe
AC13
ARA0
O
DRAM Address Bus Bit 0
AC14
VCC18IO
Power
1.8 V Digital IO Power
AC15
ABA2
O
DRAM Bank Address 2
AC16
ACKE
O
DRAM Clock Enable
AC17
DVSS Ground
Digital
Ground
AC18
ADQ18
I/O
DRAM Data Bus Bit 18
AC19
ADQM2
O
DRAM Data Mask 2
AC20
VCC18IO
Power
1.8 V Digital IO Power
AC21
ADQ30
I/O
DRAM Data Bus Bit 30
AC22
VCC18IO
Power
1.8 V Digital IO Power
AC23
DVSS Ground
Digital
Ground
AC24
VCC18IO
Power
1.8 V Digital IO Power
AC25
AVSS33_DMPLL
Ground
Analog Ground for DMPLL
AC26
AVDD33_DMPLL
Power
3.3V Analog Power for DMPLL
6-8
BDP-N460
Pin
Symbol
Type
Description
AD1
SDA
I/O
Serial Interface Data Line
AD2
VCCK
Power
1.1V Digital Power
AD3
VCCK
Power
1.1V Digital Power
AD4
GPIO1
I/O
START_BIT
AD5
VDATA
I/O
VFD Data
AD6
DVCC3IO
Power
3.3 V Digital Power
AD7
ADQ2
I/O
DRAM Data Bus Bit 2
AD8
ADQ12
I/O
DRAM Data Bus Bit12
AD9
VCC18IO
Power
1.8 V Digital IO Power
AD10
ADQ15
I/O
DRAM Data Bus Bit 15
AD11
AODT
O
DRAM On-Die Termination
AD12
DVSS Ground
Digital
Ground
AD13
ARA8
O
DRAM Address Bus Bit 8
AD14
ARA9
O
DRAM Address Bus Bit 9
AD15
VCC18IO
Power
1.8 V Digital IO Power
AD16
ABA1
O
DRAM Bank Address 1
AD17
ADQ22
I/O
DRAM Data Bus Bit 22
AD18
DVSS Ground
Digital
Ground
AD19
ADQ23
I/O
DRAM Data Bus Bit 23
AD20
ADQ27
I/O
DRAM Data Bus Bit 27
AD21
VCC18IO
Power
1.8 V Digital IO Power
AD22
ADQ24
I/O
DRAM Data Bus Bit 24
AD23
VCC18IO
Power
1.8 V Digital IO Power
AD24
DVSS Ground
Digital
Ground
AD25
VCC18IO
Power
1.8 V Digital IO Power
AD26
TEXTDN
I
DRAM Driving Calibration
AE1
GPIO10
I/O
JIG_MODE0
AE2
VCCK
Power
1.1V Digital Power
AE3
GPIO0
I/O
SYSCON_REQ (Communication Request for Front Micon)
AE4
N.C.
I/O
Not Used
AE5
VCLK
I/O
VFD Clock
AE6
ADQ7
I/O
DRAM Data Bus Bit 7
AE7
ADQS0
I/O
DRAM Data Strobe 0
AE8
ADQSB1
I/O
DRAM Data Strobe 1 Inverted
AE9
ADQ11
I/O
DRAM Data Bus Bit 11
AE10
ADQ13
I/O
DRAM Data Bus Bit 13
AE11
ARCLK
O
DRAM Clock 0
AE12
ACAS_
O
DRAM Column Address Strobe
AE13
ARA13
O
DRAM Address Bus Bit 13
AE14
ARA7
O
DRAM Address Bus Bit 7
AE15
ARA5
O
DRAM Address Bus Bit 5
AE16
ABA0
O
DRAM Bank Address 0
AE17
ADQ16
I/O
DRAM Data Bus Bit 16
AE18
ADQ17
I/O
DRAM Data Bus Bit 17
AE19
ADQS2
I/O
DRAM Data Strobe 2
AE20
ADQSB3
I/O
DRAM Data Strobe 3 Inverted
AE21
ADQ31
I/O
DRAM Data Bus Bit 31
AE22
ADQ29
I/O
DRAM Data Bus Bit 29
AE23
ARCLK1
O
DRAM Clock 1
AE24
VCC18IO
Power
1.8 V Digital IO Power
AE25
VCC18IO
Power
1.8 V Digital IO Power
AE26
VCC18IO
Power
1.8 V Digital IO Power
AF1
GPIO11
I/O
JIG_MODE1
AF2
IR
I/O
Infrared Input
AF3
GPIO2
I/O
USB Power Control 2
AF4
GPIO3
I/O
USB Power Control 1
AF5
LCDRD
I/O
LCD Read Strobe
AF7
ADQSB0
I/O
DRAM Data Strobe 0 Inverted
AF8
ADQS1
I/O
DRAM Data Strobe 1
AF10
ADQ8
I/O
DRAM Data Bus Bit 8
AF11
ARCLKB
O
DRAM Clock 0 Inverted
6-9E
BDP-N460
Pin
Symbol
Type
Description
AF13
ARA6
O
DRAM Address Bus Bit 6
AF14
ARA11
O
DRAM Address Bus Bit 11
AF16
ARA3
O
DRAM Address Bus Bit 3
AF17
ADQ19
I/O
DRAM Data Bus Bit 19
AF19
ADQSB2
I/O
DRAM Data Strobe 2 Inverted
AF20
ADQS3
I/O
DRAM Data Strobe 3
AF22
ADQ26
I/O
DRAM Data Bus Bit 26
AF23
ARCLK1B
O
DRAM Clock 1 Inverted
AF24
REXTUP
I
DRAM Driving Calibration
AF25
VCC18IO
Power
1.8 V Digital IO Power
Main function
■
En
te
r
Se
rv
ic
eM
od
e
Th
e
se
t
di
sc
on
ne
ct
A
C,
a
nd
P
us
h
fr
on
t
pa
ne
l
ke
y(
[O
PE
N/
CL
OS
E]
+
[
PL
AY
]
+
[S
TO
P]
)
an
d
AC
I
N
Th
e
ke
ys
w
il
l
be
r
el
ea
se
d
if
t
he
c
ha
ra
ct
er
o
f
"S
ER
VI
CE
"
di
sp
la
ys
o
n
a
fr
on
t
pa
ne
l
di
sp
la
y.
Af
tr
er
th
at
,
th
e
sc
re
en
i
n
se
rv
ic
e
mo
de
i
s
di
sp
la
ye
d
on
a
m
on
it
or
.
Co
nt
or
l
vi
a
Re
mo
te
C
on
tr
ol
le
r
Ca
ut
io
n)
p
le
as
e
co
nn
ec
t
TV
v
ia
H
DM
I
be
fo
re
A
C
IN
.
Ev
en
i
f
HD
MI
i
s
co
nn
ec
te
d
af
te
r
it
e
nt
er
s
Se
rv
ic
e
Mo
de
,
it
i
s
no
t
di
sp
la
ye
d.
Ev
en
i
f
HD
MI
i
s
pu
ll
ed
o
ut
a
nd
p
ul
le
d
in
a
ft
er
i
t
en
te
rs
S
er
vi
ce
M
od
e,
i
t
is
n
ot
d
is
pl
ay
ed
.
■
Di
sp
la
y
Er
ro
rL
og
/C
om
ma
nd
Lo
g
Er
ro
r
lo
g
an
d
Co
mm
an
d
lo
g
ar
e
di
sp
la
ye
d.
Th
e
di
sp
la
ye
d
lo
gs
c
an
b
e
sa
ve
d
in
a
U
SB
m
em
or
y.
■
Di
ag
Th
e
un
it
t
es
t
of
t
he
d
ev
ic
e
mo
un
te
d
on
t
he
M
ai
nB
oa
rd
.
■
Fa
ct
or
y
In
it
ia
li
ze
Re
tu
rn
a
ll
o
f
th
e
pl
ay
er
s
et
ti
ng
t
o
th
ei
r
fa
ct
or
y
de
fa
ul
ts
.
Ca
ut
io
n)
p
le
as
e
ch
ec
k
bo
ot
n
or
ma
ll
y
af
te
r
th
at
.
(S
ee
:
“
Fa
ct
or
y
In
it
ia
li
ze
”
Pa
ge
)
■
Ne
tw
or
k
Co
nf
ir
m
Ne
tw
or
k
co
nn
ec
ti
on
.
1.
I
fc
on
fi
g:
T
he
s
et
ti
ng
o
f
th
e
ne
tw
or
k
of
t
he
s
et
i
s
di
sp
la
ye
d.
Th
e
ex
ec
ut
io
n
re
su
lt
o
f
th
e
if
co
nf
ig
co
mm
an
d
is
d
is
pl
ay
ed
.
2.
Pi
ng
:T
he
c
on
ne
ct
io
n
of
t
he
n
et
wo
rk
w
it
h
th
e
te
rm
in
al
s
pe
ci
fi
ed
b
y
IP
a
dd
re
ss
i
s
co
nf
ir
me
d.
Th
e
ex
ec
ut
io
n
re
su
lt
o
f
th
e
pi
ng
c
om
ma
nd
i
s
di
sp
la
ye
d.
■
Ve
rs
io
n
Up
Th
e
se
t
up
da
te
s
by
U
pd
at
e
DI
SC
.
■
Sy
st
em
I
nf
or
ma
ti
on
Sy
st
em
i
nf
or
ma
ti
on
o
f
th
e
se
t
is
d
is
pl
ay
ed
.
Th
e
In
fo
rm
at
io
n
on
a
s
of
t
ve
rs
io
n
an
d
dr
iv
e
in
fo
rm
at
io
n,
e
tc
.
is
di
sp
la
ye
d.
BDP-N460
SECTION 7
SERVICE MODE
7-1
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