Sony XAV-722 / XAV-72BT / XAV-E722 Service Manual ▷ View online
XAV-72BT/722/E722
77
Pin No.
Pin Name
I/O
Description
56
MOTOR–
O
Monitor open/close motor drive signal (reverse direction) output to the monitor open/close
motor driver
motor driver
57 to 59
NCO
O
Not used
60
VCC2
-
Power supply terminal (+3.3V)
61
DISPON
O
Power supply on/off control signal output terminal for liquid crystal display Not used
62
VSS
-
Ground terminal
63
V_MUTE
O
Video muting on/off control signal output to the video amplifi er for REAR VIDEO OUT
“L”: muting on
“L”: muting on
64
VSW_0
O
Video signal selection signal output to the video amplifi er “L”: DVD, “H”: AUX
65
NCO
O
Not used
66
AUX_SEL
O
AUX video signal selection signal output to the video selector “L”: AUX1, “H”: AUX2
67
SYNC_SEL
O
Sync selection signal output terminal Not used
68, 69
NCO
O
Not used
70
NCO (PND)
O
Not used
71
NAVI_RST
O
Reset signal output terminal for external navigation section Not used
72
NAVI_POW_ON
O
Power supply on/off control signal output terminal for external navigation section Not used
73, 74
NCO
O
Not used
75
GERDA_TX
O
Serial data output to the video processor
76
GERDA_RX
I
Serial data input from the video processor
77
GERDA_RST
O
Reset signal output to the video processor and fl ash memory “L”: reset
78
GERDA_IF
O
Communication start signal output to the video processor
79 to 81
NCO
O
Not used
82
TP_Y
I
Y axis input from the touch panel switch
83
TP_X
I
X axis input from the touch panel switch
84
TEMP
I
Temperature detection signal input terminal
85
I_DET
I
Monitor open/close motor drive current detection signal input from the monitor open/close
motor driver
motor driver
86
SA_IN
I
Spectrum analyzer level input from the spectrum analyzer controller
87 to 89
SA_A, SA_B, SA_C
O
Spectrum analyzer level frequency selection signal output to the spectrum analyzer controller
Not used
Not used
90
NCO
O
Not used
91
TP_WAIT
O
Touch panel wait signal output terminal
92
X_SEL
O
X axis selection signal output terminal for touch panel switch
93
Y_SEL
O
Y axis selection signal output terminal for touch panel switch
94
AVSS
-
Ground terminal
95
DOOR_IND
O
LED drive signal output terminal for disc slot indicator “H”: LED on
96
VREF
I
Reference voltage (+3.3V) input terminal (for A/D converter)
97
AVCC
-
Power supply terminal (+3.3V)
98 to 100
NCO
O
Not used
XAV-72BT/722/E722
78
VISUAL BOARD IC2201 MN103SH23UB (VIDEO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
OSCXO
O
System clock output terminal (33 MHz)
2
OSCXI
I
System clock input terminal (33 MHz)
3 to 7
SDRA3, SDRA4,
SDRA2, SDRA5,
SDRA2, SDRA5,
SDRA1
O
Address signal output to the SD-RAM
8
VSS
-
Ground terminal
9
SDRA6
O
Address signal output to the SD-RAM
10
VDD
-
Power supply terminal (+3.3V)
11, 12
SDRA0, SDRA7
O
Address signal output to the SD-RAM
13
VDDI
-
Power supply terminal (+1.2V)
14, 15
SDRA10, SDRA8
O
Address signal output to the SD-RAM
16
SDRBA1
O
Bank address signal output to the SD-RAM
17
SDRA9
O
Address signal output to the SD-RAM
18
VSS
-
Ground terminal
19
VDD
-
Power supply terminal (+3.3V)
20
SDRBA0
O
Bank address signal output to the SD-RAM
21
SDRA11
O
Address signal output to the SD-RAM
22
NSDRCS
O
Chip select signal output to the SD-RAM
23
SDRA12
O
Address signal output to the SD-RAM
24
NSDRRAS
O
Row address select signal output to the SD-RAM
25
SDRCKE
O
Clock enable signal output to the SD-RAM
26
NSDRCAS
O
Column address select signal output to the SD-RAM
27
SDCKI
I
Clock signal input from the SDRCKO (pin 30)
28
VDD
-
Power supply terminal (+3.3V)
29
VSS
-
Ground terminal
30
SDRCKO
O
Clock signal output to the SDCKI (pin 27) and SD-RAM
31
NSDRWE
O
Write enable signal output to the SD-RAM
32
SDRDQM1
O
Data mask signal output to the SD-RAM (upper byte)
33
SDRDQM0
O
Data mask signal output to the SD-RAM (lower byte)
34 to 37
SDRD8, SDRD7,
SDRD9, SDRD6
I/O
Two-way data bus with the SD-RAM
38
VDD
-
Power supply terminal (+3.3V)
39
VSS
-
Ground terminal
40 to 48
SDRD10,
SDRD5, SDRD11,
SDRD4,SDRD12,
SDRD3, SDRD13,
SDRD2, SDRD14
I/O
Two-way data bus with the SD-RAM
49
VDD
-
Power supply terminal (+3.3V)
50
VSS
-
Ground terminal
51
VDDI
-
Power supply terminal (+1.2V)
52 to 54
SDRD1, SDRD15,
SDRD0
I/O
Two-way data bus with the SD-RAM
55
NRST
I
Reset signal input from the visual controller “L”: reset
56
NMI
I
Non-maskable interrupt signal input terminal Fixed at “H” in this unit
57
LCDICLK
I
Clock signal input terminal Not used
58
TSTC0
I
Test signal input terminal Fixed at “L” in this unit
59
TSTCK
I
Test signal input terminal Fixed at “L” in this unit
60
VSS
-
Ground terminal
61, 62
TSTC1, TSTC2
I
Test signal input terminal Fixed at “L” in this unit
63
PINMD1
I
Mode signal input terminal Fixed at “L” in this unit
64
SDATA
I/O
Two-way data bus terminal Not used
65
VSS
-
Ground terminal
66
VDD
-
Power supply terminal (+3.3V)
67
SCLOCK
I
Clock signal input terminal Not used
68
PINMD0
I
Mode signal input terminal Fixed at “L” in this unit
69
VDDI
-
Power supply terminal (+1.2V)
70, 71
NFRCS0, NFRCS1
O
Chip enable signal output to the fl ash memory
72
NFRWE
O
Write enable signal output to the fl ash memory
73
VSS
-
Ground terminal
XAV-72BT/722/E722
79
Pin No.
Pin Name
I/O
Description
74
VDD
-
Power supply terminal (+3.3V)
75
NFROE
O
Output enable signal output to the fl ash memory
76 to 83
FAD0 to FAD7
O
Address signal output to the fl ash memory
84
VSS
-
Ground terminal
85
VDD
-
Power supply terminal (+3.3V)
86 to 93
FAD8 to FAD15
O
Address signal output to the fl ash memory
94
PVPPDRAM
-
Internal D-RAM monitor terminal
95
VDD
-
Power supply terminal (+3.3V)
96
VSS
-
Ground terminal
97
AVDDR
-
Power supply terminal (+3.3V)
98 to 102
FAD16 to FAD20
O
Address signal output to the fl ash memory
103
VDDI
-
Power supply terminal (+1.2V)
104, 105
FAD21, FAD22
O
Address signal output to the fl ash memory
106
VDDI
-
Power supply terminal (+1.2V)
107
VDD
-
Power supply terminal (+3.3V)
108
VSS
-
Ground terminal
109 to
119
FDATA0 to FDATA10
I/O
Two-way data bus with the fl ash memory
120
VDD
-
Power supply terminal (+3.3V)
121
VSS
-
Ground terminal
122 to
126
FDATA11 to FDATA15
I/O
Two-way data bus with the fl ash memory
127
GPIO0 (OE)
O
Output enable signal output to the liquid crystal display
128
GPIO1 (NOR_W)
I
Flash writing terminal “L”: normally operation mode, “H”: writing mode
129
GPIO2 (NC)
I/O
Not used
130
GPIO3 (GERDA_IF)
I
Communication start signal input from the visual controller
131
GPIO4 (RX)
I
Serial data input from the visual controller
132
GPIO5 (TX)
O
Serial data output to the visual controller
133
GPIO6 (DEBUG-RX)
I
Serial data input terminal Not used
134
VSS
-
Ground terminal
135
VDD
-
Power supply terminal (+3.3V)
136
GPIO7 (DEBUG-TX)
O
Serial data output terminal Not used
137
GPIO8 (LOAD)
O
LOAD signal output to the liquid crystal display
138
GPIO9 (POLC)
I/O
Not used
139 to
144
DVOB0 to DVOB5
I
Digital RGB video signal (blue) input from the video decoder
145
VDDI
-
Power supply terminal (+1.2V)
146 to
151
DVOG0 to DVOG5
I
Digital RGB video signal (green) input from the video decoder
152 to
154
DVOR0 to DVOR2
I
Digital RGB video signal (red) input from the video decoder
155
VSS
-
Ground terminal
156
DVOR3
I
Digital RGB video signal (red) input from the video decoder
157
VDD
-
Power supply terminal (+3.3V)
158, 159
DVOR4, DVOR5
I
Digital RGB video signal (red) input from the video decoder
160
DVOCLK
I
Clock signal input from the video decoder
161
DVOVSY
I
Vertical sync signal input from the video decoder
162
DVOHSY
I
Horizontal sync signal input from the video decoder
163
CMPAOUT
O
External capacitor connection terminal for comparator low-pass fi lter
164
AVOIREF
O
External resistor connection terminal for A/D converter bias
165
AVOVREFH
O
Reference voltage output terminal
166
AVOVREFL
O
Reference voltage output terminal
167
AVOVCMO
O
Reference voltage output terminal
168
AVOINA
I
Analog video signal input terminal Not used
169
AVDDA
-
Power supply terminal (+3.3V)
170
AVOINB
I
Analog composite video signal input from the DVD processor
(XAV-72BT: E (PAL), Saudi Arabia, South African and Hong Kong models/XAV-722)
(XAV-72BT: E (PAL), Saudi Arabia, South African and Hong Kong models/XAV-722)
171
AVSSA
-
Ground terminal
172
AV1VREFH
O
Reference voltage output terminal
173
AV1VREFL
O
Reference voltage output terminal
174
AV1VCMO
O
Reference voltage output terminal
Ver. 1.1
XAV-72BT/722/E722
80
Pin No.
Pin Name
I/O
Description
175
AV1IN
I
Analog composite video signal input from the AUX1 VIDEO IN jack
(XAV-72BT: E (PAL), Saudi Arabia, South African and Hong Kong models/XAV-722)
(XAV-72BT: E (PAL), Saudi Arabia, South African and Hong Kong models/XAV-722)
176
AVDDA2
-
Power supply terminal (+3.3V)
177
AV2VREFH
O
Reference voltage output terminal
178
AV2VREFL
O
Reference voltage output terminal
179
AVSSA2
-
Ground terminal
180
AV2VCMO
O
Reference voltage output terminal
181
AV2IN
I
Analog composite video signal input from the AUX2 VIDEO IN jack
(XAV-72BT: E (PAL), Saudi Arabia, South African and Hong Kong models/XAV-722)
(XAV-72BT: E (PAL), Saudi Arabia, South African and Hong Kong models/XAV-722)
182
AVDDP
-
Power supply terminal (+3.3V)
183
TSTIO (NC)
I/O
Internal PLL inspection terminal Not used
184
AVSSP
-
Ground terminal
185 to
188
LCDOB0 to LCDOB3
O
Digital RGB video signal (blue) output to the liquid crystal display
189
VSS
-
Ground terminal
190
VDD
-
Power supply terminal (+3.3V)
191, 192
LCDOB4, LCDOB5
O
Digital RGB video signal (blue) output to the liquid crystal display
193 to
195
LCDOG0 to LCDOG2
O
Digital RGB video signal (green) output to the liquid crystal display
196
VDDI
-
Power supply terminal (+1.2V)
197 to
199
LCDOG3 to LCDOG5
O
Digital RGB video signal (green) output to the liquid crystal display
200
VSS
-
Ground terminal
201
VDD
-
Power supply terminal (+3.3V)
202 to
207
LCDOR0 to LCDOR5
O
Digital RGB video signal (red) output to the liquid crystal display
208
LCDOC0
O
Horizontal sync signal output to the liquid crystal display
209
LCDOC1
O
Vertical sync signal output to the visual controller and liquid crystal display
210
VDD
-
Power supply terminal (+3.3V)
211
VSS
-
Ground terminal
212
LCDOC2
O
Voltage control signal output to the liquid crystal display
213
LCDOC3 (POLS)
O
Polarity inversion control output terminal
214
LCDOCLK
O
Clock signal output to the liquid crystal display
215
LCDOC4 (NPOLS)
O
Polarity non-inversion control output terminal
216
N.C.
-
Not used
Ver. 1.1
Click on the first or last page to see other XAV-722 / XAV-72BT / XAV-E722 service manuals if exist.