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(1) When network signal input to each part, MPU(IC101) decode the signal.

(2) MPU(IC101) sends the sound data to HDD for data recording.

(3) MPU(IC101) reads the sound data from HDD for sound playback. Then, 

MPU(IC101) sends the sound data to FPGA(IC001) for sound processing.

(4) FPGA(IC001) and AUDIO DSP(IC702) operates Audio digital signal 

processing.

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FPGA(IC001) operates for over sampling processing and AUDIO DSP(IC702) 

operates DSEE signal processing. The processed sound data is sent back from 
AUDIO DSP(IC702) to FPGA(IC001). 

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(1) FPGA(IC001) outputs processed HDD sound data to DATA/CLOCK 

SELECTER(IC4007).

(2) OPTICAL and COAXIAL digital signals input to DIGITAL AUDIO 

INTERFACE RECEIVER(IC4004).     DIGITAL AUDIO INTERFACE 
RECEIVER selects the output signal by signal communication with 
SYSTEM CONTROLLER(IC5006). The selected PCM signal is input to 
DATA/CLOCK SELECTOR(IC4007). 

(3) DATA/CLOCK SELECTOR(IC4007) selects the sound data from HDD or

(3) DATA/CLOCK SELECTOR(IC4007) selects the sound data from HDD or 

DIGITAL IN by SYSTEM CONTROL(IC5006).

(4) D/A CONVERTER(IC405) converts the digital sound data to analog 

differential sound signals and output to LINE AMP(IC401, IC402).

(5) Analog sound signal outputs through LINE AMP(IC401, IC402) and MIX 

AMP(IC400).

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(1) Analog sound signal is output to D/A DIRECT LINE OUT. This output is 

muted by MUTING SWITCH(Q217-Q219) from SYSTEM 
CONTROLLER(IC5006)’s muting control signal when this set boot or shut 
down.

(2) Analog sound signal is output to TONE CONTROL ELECTRICAL 

VOLUME(IC206) through RELAY(RY203). RELAY is controlled by 
SYSTEM CONTROLLER(IC5006).

(3) LINE IN signal inputs through RELAY(RY202) RELAY is controlled by

(3) LINE IN signal inputs through RELAY(RY202). RELAY is controlled by 

SYSTEM CONTOLLER(IC5006). 

(4) TONE CONTROL ELECTRICAL VOLUME(IC206) adjusts sound signal. 

The output is muted by MUTING SWITCH(Q209,Q210) from SYSTEM 
CONTROLLER(IC5006)’s muting control signal when this set boot or shut 
down.

(5) Analog sound signal is output to SPEAKER terminal through POWER 

( )

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AMP(IC350, IC351) and RELAY(RY201). 

(6) The connection of Head Phone is detected by SYSTEM 

CONTROLLER(IC5006) HP DETECT(2pin). Analog sound signal outputs to 
PHONES terminal through RELAY(RY200).

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This part explains the different points between HAP-S1 and HAP-Z1ES. Please 
refer the block diagram of HAP-Z1ES in this part only.

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