Sony MEX-DV800 / MEX-DV808 / MEX-DV80EE / MEX-DV80M Service Manual ▷ View online
MEX-DV80EE/DV80M/DV800/DV808
33
IC201 TDA7333013TR
1
VDDA
2
REF3
3
REF2
4
REF1
5
VSS
6
TM
7
VDDD
8
RESETN
16 MPX
15 INTN
14 CSN
13 SA_DATAOUT
12 SDA_DATAIN
11 SCL_CLK
15 INTN
14 CSN
13 SA_DATAOUT
12 SDA_DATAIN
11 SCL_CLK
10 XTO
9 XTI
SIGMA DELTA
CONVERTER
RDS DEMODULATOR
&
SYNCHRONISATION
RAM BUFFER
&
CONTROL LOGIC
TEST LOGIC
&
PIN MIX'S
SINC4
FILTER
I2C/SPI
INTERFACE
BANDPASS
FILTER
INTERPOLATOR
OSCILLA
TOR
TESTREG
SPL
SCK
SDAIN
SDAOUT
MPX
SINC4
REG
IC301 BD3442FS-E2
1
2
A1
100k
100k
100k
100k
100k
100k
250k
250k
250k
A2
B1 3
4
B2
5
C1
6
C2
7
DP1
8
DN
9
DP2
10
DS32
11
DS12
12
DS22
13
EBIAS
14
DS21
15
DS11
16
DS31
26 OUTF1
27 VCC
VCC
VCC2
28 MUTE
29 SCL
30 SDA
31 GND
32 FIL
INPUT
SELECTOR
VOLUME1
/MUTE
VOLUME2
I2C
BUS
LOGIC
TREBLE
/BASS
/MIDDLE
SPECTRUM
ANALYZER
FADER
25 OUTF2
24 OUTR1
23 OUTR2
FADER
FADER
22 OUTS1
21
20
OUTS2
19
ADJ
18
SOUT
17
DATA
CLK
FADER
FADER
LPF
EFFECT
INPUT
GAIN
FADER
MEX-DV80EE/DV80M/DV800/DV808
34
IC302 BA3121F
AMP
8
4
3
2
1
OUT1
VM1
IN1
GND
VCC
OUT2
VM2
IN2
AMP
7
6
5
IC504 BR24L02FV-WSE2
1
5
A0
2
A1
3
A2
4
GND
SDA
6 SCL
7 WP
8 VCC
2kbit EEPROM ARRAY
8bit
8bit
ADDRESS
DECODER
SLAVE/ WORD
ADDRESS REGISTER
HIGH VOLTAGE
GENERATOR
VCC LEVEL
DETECT
DATA
REGISTER
ST
AR
T
ST
OP
ACK
CONTROL LOGIC
8bit
IC601 BD9778HFP
1
VIN
2
SW
6
RT
4
GND
5
INV
7
EN
3
FB
DRIVER
CURRENT
LIMIT
ERROR
AMP
SOFT
START
PWM
COMPARATOR
THERMAL
SHUT DOWN
LATCH
OSC
VREF
MEX-DV80EE/DV80M/DV800/DV808
35
IC701 NJM2561F1-TE2
1
POWER SAVE
2
VOUT
3
VSAG
6 VCC
5 GND
4 VIN
75 OHM
DRIVER
DRIVER
LOW-PASS
FILTER
CLAMP
IC802 TDA8588J/N2/R1
MUTING
IN3
12
SVR
VP
10
PGND1
8
VP2
6
SCL
4
SDA
2
IN4
14
PGND3
18
ACGND
16
VP1
20
STB
22
PGND4
24
RST
26
REG1
30
RES-CAP
28
GND
32
REG5
34
BU-CUP
36
OUT3– 3
PGND2/TAB 1
OUT3+ 5
MUTING
OUT1– 7
OUT1+ 9
IN1
REF
11
SGND 13
MUTING
OUT2+ 17
OUT2– 19
IN2 15
MUTING
TEMPERATURE & LOAD
DUMP PROTECTION
AMPLIFIER
TEMPERATURE & LOAD
DUMP PROTECTION
VOLTAGE REGULATOR
PROTECTION/
DIAGNOSTIC
CLIP DETECT/
DIAGNOSTIC
ENABLE
LOGIC
STANDBY/
MUTING
IIC-BUS
INTERFACE
OUT4+ 21
OUT4– 23
DIAG 25
SW2
(REGULATOR & SWITCH BLOCK)
27
SW1 29
REG3 31
REG4 33
VP 35
REG2 37
RESET
REGULATOR 1
REGULATOR 3
REGULATOR 4
REGULATOR 2
REGULATOR 5
MEX-DV80EE/DV80M/DV800/DV808
36
• IC Pin Function Description
SERVO BOARD IC4 ZR36886HLCG-A (DVD PROCESSOR)
Pin No.
Pin Name
I/O
Description
1 to 7
NOT USED
O
Not used
8
SSCCLK
I
Serial data transfer clock signal input terminal Not used
9
SSCTXD
O
Serial data output terminal Not used
10
SSCRXD
I
Serial data input terminal Not used
11
MEMCS1#
O
Chip enable signal output terminal Not used
12
VDDP
-
Power supply terminal (+3.3V)
13 to 17
MEMADD15,
MEMADD16,
MEMADD16,
MEMADD14 to
MEMADD12
O
Address signal output to the fl ash memory
18
MEMDAT15
I/O
Two-way data bus with the fl ash memory
19
MEMADD11
O
Address signal output to the fl ash memory
20
MEMDAT7
I/O
Two-way data bus with the fl ash memory
21
GNDP
-
Ground terminal
22
MEMADD10
O
Address signal output to the fl ash memory
23
MEMDAT14
I/O
Two-way data bus with the fl ash memory
24
MEMADD9
O
Address signal output to the fl ash memory
25
MEMDAT6
I/O
Two-way data bus with the fl ash memory
26
MEMADD8
O
Address signal output to the fl ash memory
27, 28
MEMDAT13,
MEMDAT5
I/O
Two-way data bus with the fl ash memory
29
MEMADD20
O
Address signal output to the fl ash memory
30
VDDP
-
Power supply terminal (+3.3V)
31
MEMDAT12
I/O
Two-way data bus with the fl ash memory
32
MEMWR#
O
Write enable signal output to the fl ash memory
33
MEMDAT4
I/O
Two-way data bus with the fl ash memory
34
VDDC
-
Power supply terminal (+1.8V)
35, 36
MEMDAT11,
MEMDAT3
I/O
Two-way data bus with the fl ash memory
37
MEMADD19
O
Address signal output to the fl ash memory
38
GNDC
-
Ground terminal
39
MEMDAT10
I/O
Two-way data bus with the fl ash memory
40
MEMADD18
O
Address signal output to the fl ash memory
41
GNDP
-
Ground terminal
42
MEMDAT2
I/O
Two-way data bus with the fl ash memory
43
MEMADD17
O
Address signal output to the fl ash memory
44
MEMDAT9
I/O
Two-way data bus with the fl ash memory
45
MEMADD7
O
Address signal output to the fl ash memory
46
MEMDAT1
I/O
Two-way data bus with the fl ash memory
47
MEMADD6
O
Address signal output to the fl ash memory
48
MEMDAT8
I/O
Two-way data bus with the fl ash memory
49
MEMADD5
O
Address signal output to the fl ash memory
50
VDDP
-
Power supply terminal (+3.3V)
51
MEMDAT0
I/O
Two-way data bus with the fl ash memory
52
MEMADD4
O
Address signal output to the fl ash memory
53
MEMRD#
O
Output enable signal output to the fl ash memory
54, 55
MEMADD3,
MEMADD2
O
Address signal output to the fl ash memory
56
MEMCS0#
O
Chip enable signal output to the fl ash memory
57, 58
MEMADD1,
MEMADD0
O
Address signal output to the fl ash memory
59
GNDP
-
Ground terminal
60, 61
VDD, VDDP
-
Power supply terminal (+3.3V)
62, 63
NOT USED
O
Not used
64
RAMCKE
O
Clock enable signal output to the SD-RAM
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