DOWNLOAD Sony MEX-1HD Service Manual ↓ Size: 7.32 MB | Pages: 124 in PDF or view online for FREE

Name: Sony MEX-1HD
Brand: Sony
SKU: 7730
Rating: 4 (1 reviews)

Model: MEX-1HD
Pages: 124
Size: 7.32 MB
Type: PDF
Document: Service Manual
Brand: Sony
Device: Car Audio
File: mex-1hd.pdf
Date: 2018-11-20

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85
MEX-1HD
Pin No.
Pin Name
I/O
Description
171
DVDD
—
Power supply terminal (+3.3V)
172, 173
VSS
—
Ground terminal
174
ED13
I/O
Two-way data bus terminal    Not used
175, 176
ED15, ED14
I/O
Two-way data bus terminal    Not used
177, 178
ED22, ED21
I/O
Two-way data bus terminal    Not used
179
ED23
I/O
Two-way data bus terminal    Not used
180
VSS
—
Ground terminal
181
DVDD
—
Power supply terminal (+3.3V)
182
CVDD
—
Power supply terminal (+1.8V)
183
DVDD
—
Power supply terminal (+3.3V)
184, 185
VSS
—
Ground terminal
186, 187
CVDD
—
Power supply terminal (+1.8V)
188
DVDD
—
Power supply terminal (+3.3V)
189
VSS
—
Ground terminal
190, 191
CVDD
—
Power supply terminal (+1.8V)
192
DVDD
—
Power supply terminal (+3.3V)
193
VSS
—
Ground terminal
194
EA21
O
Address signal output terminal    Not used
195
XBE1
O
Byte enable control signal output terminal    Not used
196
VSS
—
Ground terminal
197, 198
ED20, ED19
I/O
Two-way data bus terminal    Not used
199
CVDD
—
Power supply terminal (+1.8V)
200
ED16
I/O
Two-way data bus terminal    Not used
201
XBE3
O
Byte enable control signal output terminal    Not used
202
XCE3
O
Memory space enables signal output terminal    Not used
203, 204
EA3, EA5
O
Address signal output terminal    Not used
205, 206
EA8, EA10
O
Address signal output terminal    Not used
207
XSDCAS
O
SD-RAM column address strobe signal output terminal    Not used
208
XSDWE
O
SD-RAM write enable signal output terminal    Not used
209
DVDD
—
Power supply terminal (+3.3V)
210
EA12
O
Address signal output terminal    Not used
211
DVDD
—
Power supply terminal (+3.3V)
212
EA17
O
Address signal output terminal    Not used
213
XCE0
O
Memory space enables signal output terminal    Not used
214
CVDD
—
Power supply terminal (+1.8V)
215
DVDD
—
Power supply terminal (+3.3V)
216
XBE0
O
Byte enable control signal output terminal    Not used
217
VSS
—
Ground terminal
218
CVDD
—
Power supply terminal (+1.8V)
219
DVDD
—
Power supply terminal (+3.3V)
220
ED17
I/O
Two-way data bus terminal    Not used
221
VSS
—
Ground terminal
222
XCE2
O
Memory space enable signal output terminal    Not used
223, 224
EA4, EA6
O
Address signal output terminal    Not used
225
DVDD
—
Power supply terminal (+3.3V)
226
XSDRAS
O
SD-RAM row address strobe signal output terminal    Not used

86
MEX-1HD
Pin No.
Pin Name
I/O
Description
227
VSS
—
Ground terminal
228
DVDD
—
Power supply terminal (+3.3V)
229 to 
231
EA11, EA13, 
EA15
O
Address signal output terminal    Not used
232
VSS
—
Ground terminal
233
EA19
O
Address signal output terminal    Not used
234
XCE1
O
Memory space enables signal output terminal    Not used
235
CVDD
—
Power supply terminal (+1.8V)
236 to 
238
VSS
—
Ground terminal
239
ED18
I/O
Two-way data bus terminal    Not used
240
XBE2
O
Byte enable control signal output terminal    Not used
241
ARDY
I
Asynchronous memory ready signal input terminal    Not used
242
EA2
O
Address signal output terminal    Not used
243
DVDD
—
Power supply terminal (+3.3V)
244, 245
EA7, EA9
O
Address signal output terminal    Not used
246
ECLKOUT
O
EMIF clock signal output terminal    Not used
247
ECLKIN
I
EMIF clock signal input terminal    Not used
248
CLKOUT2
O
Clock output at half of device speed    Not used
249
VSS
—
Ground terminal
250 to 
252
EA14. EA16, 
EA18
O
Address signal output terminal    Not used
253
DVDD
—
Power supply terminal (+3.3V)
254
EA20
O
Address signal output terminal    Not used
255
VSS
—
Ground terminal
256
RSV5
O
Reserved terminal    Not used

87
MEX-1HD
•
 MAIN BOARD  IC4001 CXD1859AGA
Pin No.
Pin Name
I/O
Description
1
CLKSEL2
I
Clock mode setting terminal    Fixed at “L” in this set
2
XTAL0
O
Sub system clock output terminal (22.579MHz)
3
EXTAL0
I
Sub system clock input terminal (22.579MHz)
4
VSS0
—
Ground terminal
5
CLKSEL3
I
Clock mode setting terminal    Fixed at “H” in this set
6
CLKSEL4
I
Clock mode setting terminal    Fixed at “L” in this set
7
VDD0
—
Power supply terminal (+1.8V)
8
VDE0
—
Power supply terminal (+3.3V)
9
XTAL1
O
Main system clock output terminal (20MHz)
10
EXTAL1
I
Main system clock input terminal (20MHz)
11
XOSCSTP
O
Stop oscillating signal output terminal    “L”: stop oscillating    Not used
12
VSS1
—
Ground terminal
13
XRST
I
Reset signal input from the CPU
14
AVS1
—
Ground terminal (for PLL)
15
AVD1
—
Power supply terminal (+3.3V) (for PLL)
16
FS256
O
Clock signal (11.2896 MHz) output to the D/A converter
17
DP0
O
Ready/busy signal output to the EEPROM    “L”: busy,  “H”: ready
18
DP1
O
Reset signal output to the EEPROM
19
VSS2
—
Ground terminal
20
BS
O
Bus state signal output to a memory stick
21
SCLK
O
Clock signal output to a memory stick
22
DIO
I/O
Two-way data bus with a memory stick
23
VDE1
—
Power supply terminal (+3.3V)
24
VDD1
—
Power supply terminal (+1.8V)
25
DP2
O
USB communication on/off control signal output terminal    “H”: USB communication on
Not used
26
INS
I
Memory stick in/out detection signal input    “L”: memory stick is inserted
27
VSS3
—
Ground terminal
28
UDP
I/O
Two-way data bus of USB data    Not used
29
AVD2
—
Power supply terminal (+3.3V)
30
UDM
I/O
Two-way data bus of UBS data    Not used
31
BCLK
O
Bit clock signal output to the D/A converter
32
LRCK
O
L/R sampling clock signal output to the D/A converter
33
SDO
O
Audio signal output to the D/A converter
34
VSS4
—
Ground terminal
35
SDI
I
Audio signal input terminal    Not used
36
DAOUT
O
Digital audio signal output terminal    Not used
37
DAIN
I
Digital audio signal input terminal    Not used
38
VDE2
—
Power supply terminal (+3.3V)
39 to 44
DB0 to DB5
I/O
Two-way data bus with the CPU, CPU/ATA interface IC, USB interface IC, display controller, 
64MB flash memory and 128MB SD-RAM
45
VDD2
—
Power supply terminal (+1.8V)
46
VSS5
—
Ground terminal
47 to 52
DB6 to DB11
I/O
Two-way data bus with the CPU, CPU/ATA interface IC, USB interface IC, display controller, 
64MB flash memory and 128MB SD-RAM
53
VDE3
—
Power supply terminal (+3.3V)
(DIGITAL SIGNAL PROCESSOR,  MAGIC GATE CORE, MEMORY STICK INTERFACE)

88
MEX-1HD
Pin No.
Pin Name
I/O
Description
54 to 56
DB12 to DB14
I/O
Two-way data bus with the CPU, CPU/ATA interface IC, USB interface IC, display controller, 
64MB flash memory and 128MB SD-RAM
57
VSS6
—
Ground terminal
58
DB15
I/O
Two-way data bus with the CPU, CPU/ATA interface IC, USB interface IC, display controller, 
64MB flash memory and 128MB SD-RAM
59 to 63
ADR0 to ADR4
I
Address signal input from the CPU
64
VSS7
—
Ground terminal
65, 66
ADR5, ADR6
I
Address signal input from the CPU
67
VDD3
—
Power supply terminal (+1.8V)
68
VDE4
—
Power supply terminal (+3.3V)
69 to 71
ADR7 to ADR9
I
Address signal input from the CPU
72
VSS8
—
Ground terminal
73 to 77
ADR10 to ADR14
I
Address signal input from the CPU
78
XRD
I
Read enable signal input from the CPU
79
VSS9
—
Ground terminal
80
XWRU
I
Write enable signal input from the CPU (upper byte)
81
XWRL
I
Write enable signal input from the CPU (lower byte)
82
XCS
I
Chip select signal input from the CPU
83
VDE5
—
Power supply terminal (+3.3V)
84
VDD4
—
Power supply terminal (+1.8V)
85
XIRQ
O
Interrupt request signal output to the ATA interface
86
XDREQ0
O
USB DMA request signal output terminal    Not used
87
VSS10
—
Ground terminal
88
XDACK0
I
USB DMA acknowledge signal input terminal    Not used
89
XDREQ1
O
USB DMA request signal output terminal    Not used
90
XDACK1
I
USB DMA acknowledge signal input terminal    Not used
91
SIOSI
I
Serial data input from the EEPROM
92
SIOSO
O
Serial data output to the EEPROM
93
SIOCS
O
Chip select signal output to the EEPROM
94
VSS11
—
Ground terminal
95
SIOCK
O
Serial data transfer clock signal output to the EEPROM
96
ACLK
I
ATRAC3 data transfer clock signal input terminal    Not used
97
XARQ
O
ATRAC3 data request signal output terminal    Not used
98
VDE6
—
Power supply terminal (+3.3V)
99
XABS
I
ATRAC3 data request signal input terminal    Not used
100
ACDO
O
ATRAC3 data output terminal    Not used
101
ACDI
I
ATRAC3 data input terminal    Not used
102
DP3
O
System wake up request signal output terminal    Not used
103
TKURST
I
Not used
104
TKDBG
I
Not used
105
VDD5
—
Power supply terminal (+1.8V)
106
VSS12
—
Ground terminal
107
TKTCK
I
Not used
108
TKTDI
I
Not used
109
TKTMS
I
Not used
110
TKTDO
O
Not used

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