Sony MDX-CA680 / MDX-CA680X Service Manual ▷ View online
45
MDX-CA680/CA680X
•
SERVO BOARD IC501 CXP84340-231Q (MD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 5
TIN3 to TIN7
I/O
Input of the 4
×
8 matrix test keys (“L” is always output, except in test mode) Not used (open)
6
LOAD
O
Loading motor control signal output to the motor driver (IC305) “H” active *1
7
EJECT
O
Loading motor control signal output to the motor driver (IC305) “H” active *1
8, 9
—
O
Not used (open)
10
MDMON
O
Power supply on/off control signal output of the MD mechanism deck section main power supply
and loading motor drive (IC305) power supply “H”: power on
and loading motor drive (IC305) power supply “H”: power on
11
E-SW
I
Inputs a disc loading completion detect switch detection signal
“L”: When completed of a disc loading operation
“L”: When completed of a disc loading operation
12
AG-OK
O
Output of aging status in test mode “L”: under aging, “H”: aging completed Not used (open)
13
ADJ-OK
O
Output of status when aging completed in test mode “L”: aging NG, “H”: aging OK
Not used (open)
Not used (open)
14 to 17
—
O
Not used (open)
18
DFCTSEL
I
Select whether defect function is used for the CXD2662R (IC301)
“L”: used this function , “H”: not used this function (fixed at “H” in this set)
“L”: used this function , “H”: not used this function (fixed at “H” in this set)
19
DPLLSEL
I
Select whether double PLL function is used for the CXD2662R (IC301)
“L”: used this function , “H”: not used this function (fixed at “H” in this set)
“L”: used this function , “H”: not used this function (fixed at “H” in this set)
20
EMPHSEL
I
Select whether emphasis signal output from pin or unilink data
“L”: outputs from both pin and unilink data, “H”: output from pin only (fixed at “H” in this set)
“L”: outputs from both pin and unilink data, “H”: output from pin only (fixed at “H” in this set)
21
LOCK
O
Mini-disc lock detection signal output terminal Not used
22
—
O
Not used (open)
23
2M/4M
I
Select whether D-RAM capacitance 2M bit or 4M bit “L”: 4M bit (external D-RAM) , “H”: 2M
bit (internal D-RAM of CXD2652AR) (fixed at “L” in this set)
bit (internal D-RAM of CXD2652AR) (fixed at “L” in this set)
24, 25
—
O
Not used (open)
26
MNT0
I
Focus OK signal input from the CXD2662R (IC301)
“H” is input when focus is on (“L”: NG)
“H” is input when focus is on (“L”: NG)
27
MNT1
I
Track jump detection signal input from the CXD2662R (IC301)
28
MNT2
I
Busy monitor signal input from the CXD2662R (IC301)
29
MNT3
I
Spindle servo lock status monitor signal input from the CXD2662R (IC301)
30
RESET
I
System reset signal input from the system controller (IC501), reset signal generator (IC602) and
reset switch (S702) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
reset switch (S702) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31
EXTAL
I
Main system clock input terminal (10 MHz)
32
XTAL
O
Main system clock output terminal (10 MHz)
33
VSS
—
Ground terminal
34
TX
O
Sub system clock output terminal (32.768 kHz) Not used (open)
35
TEX
I
Sub system clock input terminal (32.768 kHz) Not used (fixed at “L”)
36
AVSS
—
Ground terminal (for A/D converter)
37
AVREF
I
Reference voltage input terminal (+5V) (for A/D converter)
38
INIT
I
Initial reset signal input terminal (A/D input) (fixed at “H”)
39
TEMP
I
Temperature sensor (TH501) input terminal (A/D input)
40
ACNT
I
Select the number of load/eject aging times (A/D input)
0h – 54h (30 times), 55h – 0A9h (20 times), 0AAh – 0FFh (10 times)
0h – 54h (30 times), 55h – 0A9h (20 times), 0AAh – 0FFh (10 times)
41
DO-SEL
I
Select the digital output bits (A/D input)
42
EE-CS
O
Chip select signal output to the external EEPROM device Not used (open)
43
EE-CKO
O
Serial data transfer clock signal output to the external EEPROM device Not used (open)
44
EE-SIO
I/O
Two way data bus with the external EEPROM device Not used (open)
45
MD-SO
O
Writing serial data signal output to the CXD2662R (IC301) and CXA2523AR (IC302)
46
MDX-CA680/CA680X
Pin No.
Pin Name
I/O
Description
46
LINKOFF
O
Unilink on/off control signal output for the SONY bus “L”: link on, “H”: link off
47
UNIREQ
O
Data request signal output terminal (for SONY bus) “H”: request on Not used (open)
48
UNICKIO
I/O
Serial clock signal input from the system controller (IC501) or serial clock signal output to the
SONY bus interface (IC505) and system controller (IC501) (for SONY bus)
SONY bus interface (IC505) and system controller (IC501) (for SONY bus)
49
UNISI
I
Serial data input from the SONY bus interface (IC505)
50
UNISO
O
Serial data output to the SONY bus interface (IC505)
51
MD-CKO
O
Serial data transfer clock signal output to the CXD2662R (IC301) and CXA2523AR (IC302)
52
MD-SI
I
Reading serial data signal input from the CXD2662R (IC301)
53
—
O
Not used (open)
54
SENS
I
Internal status (SENSE) input from the CXD2662R (IC301)
55
CC-XINT
I
Interrupt status input from the CXD2662R (IC301)
56
LIMIT-IN
I
Detection input from the sled limit-in detect switch
The optical pick-up is inner position when “L”
The optical pick-up is inner position when “L”
57
EJT-OK
I
Front panel open detection signal input terminal “L”: eject possible
58
ERROR-PWM
O
PWM error monitor output terminal (C1and ATER is output when test mode) Not used (open)
59
MD-RST
O
Reset signal output to the PCM1718E (IC101), CXD2662R (IC301) and BH6518FS (IC303)
“L”: reset
“L”: reset
60
BU-IN
I
Battery detect signal input from the SONY bus interface (IC505) and battery check circuit
“H”: battery on
“H”: battery on
61
BUS-ON
I
SONY bus on/off control signal input from the system controller (IC501) “L”: bus on
62
SQSY
I
Subcode Q sync (SCOR) input from the CXD2662R (IC301)
“L” is input every 13.3 msec Almost all, “H” is input
“L” is input every 13.3 msec Almost all, “H” is input
63
C-SW
I
Inputs a disc loading start or a disc eject completion detect switch detection signal
“L”: When loading start or eject completed of a disc loading operation
“L”: When loading start or eject completed of a disc loading operation
64
MD-LAT
O
Serial data latch pulse signal output to the CXD2662R (IC301) and CXA2523AR (IC302)
65
MD-ON
O
Power supply on/off control signal output of the MD mechanism deck section main power supply
“H”: power on
“H”: power on
66
DEEMP
O
De-emphasis on/off control signal output to the PCM1718E (IC101) “H”: de-emphasis on
67
A-MUTE
O
Audio muting on/off control signal output
68
—
O
Not used (open)
69
TSTCKO
O
Output of clock signal for the test mode display Not used (open)
70
TSTSO
O
Output of data for the test mode display Not used (open)
71
TSTMOD
I
Setting terminal for the test mode “L”: test mode, “H”: normal mode
72
VCC
—
Power supply terminal (+5V)
73
NC
I
Not used (fixed at “H”)
74 to 77
TOUT0 to TOUT3
O
Output of the 4
×
8 matrix test keys Not used (open)
78 to 80
TIN0 to TIN2
I/O
Input of the 4
×
8 matrix test keys (“L” is always output, except in test mode) Not used (open)
47
MDX-CA680/CA680X
•
MAIN BOARD IC501 MN101C49KTJ (US), MN101C49KTK (AEP, UK) (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VREF–
I
Reference voltage (0V) input terminal (for A/D converter)
2
VSM
I
FM and AM signal meter voltage detection signal input from the FM/AM tuner unit (TU10)
(A/D input)
(A/D input)
3
NIL
I
Not used (fixed at “L”)
4
KEYIN1
I
Key input terminal (A/D input) LSW902, LSW905 to LSW911 (LSW910 and LSW911 are AEP,
UK models only), S902 to S905 (MENU, SOUND, ENTER, S SCROLL, D DISPLAY, LIST,
AF, TA, > M SEEK +, . m SEEK –, DISC/PRESET +, DISC/PRESET –, )
UK models only), S902 to S905 (MENU, SOUND, ENTER, S SCROLL, D DISPLAY, LIST,
AF, TA, > M SEEK +, . m SEEK –, DISC/PRESET +, DISC/PRESET –, )
5
KEYIN0
I
Key input terminal (A/D input) LSW901, LSW903, LSW904, LSW914 to LSW919, S906, S907
(OFF, SOURCE, MODE, 6, 5, 4, 3, 2, 1, D-BASS, MBP)
(OFF, SOURCE, MODE, 6, 5, 4, 3, 2, 1, D-BASS, MBP)
6
RCIN0
I
Rotary remote commander key input terminal (A/D input)
7
QUALITY
I
Noise level detection signal input at SEEK mode (A/D input)
8
MPTH
I
Multi-path detection signal input from the RDS decoder (IC51) (A/D input)
9
DSTSEL
I
Destination setting terminal (fixed at “L” in this set)
10
VREF+
I
Reference voltage (+5V) input terminal (for A/D converter)
11
VDD
—
Power supply terminal (+5V)
12
OSCOUT
O
Main system clock output terminal (18.432 MHz)
13
OSCIN
I
Main system clock input terminal (18.432 MHz)
14
VSS
—
Ground terminal
15
XIN
I
Sub system clock input terminal (32.768 kHz)
16
XOUT
O
Sub system clock output terminal (32.768 kHz)
17
MMOD
I
Selection signal of memory mode input terminal “L”:single chip mode (fixed at “L”)
18
LCDSO
O
Serial data output to the liquid crystal display driver (IC900)
19
LCDCE
O
Chip enable signal output to the liquid crystal display driver (IC900) “H” active
20
LCDCKO
O
Serial data transfer clock signal output to the liquid crystal display driver (IC900)
21 to 23
NC
O
Not used (open)
24
SYSRST
O
Reset signal output to the SONY bus interface (IC505) “L”: reset
25
BUSON
O
Bus on/off control signal output to the SONY bus interface (IC505) “L”: bus on
26
KEYACK
I
Input of acknowledge signal for the key entry Acknowledge signal is input to accept function
and eject keys in the power off status On at input of “H”
and eject keys in the power off status On at input of “H”
27
DAVN
I
Synchronized detection signal of RDS data block input from the RDS decoder (IC51)
“H” active (AEP, UK models only)
“H” active (AEP, UK models only)
28
BUIN
I
Battery detection signal input from the SONY bus interface (IC505)
“L” is input at low voltage
“L” is input at low voltage
29
SIRCS
I
SIRCS remote control signal input from the remote control receiver (IC971)
30, 31
NIL
I
Not used (fixed at “L”)
32
NIH
I
Not used (fixed at “H”)
33
RESET
I
System reset signal input from the reset signal generator (IC602) and RESET switch (S702)
“L”: reset “L” is input for several 100 msec after power on, then it changes to “H”
“L”: reset “L” is input for several 100 msec after power on, then it changes to “H”
34
NOSESW
I
Front panel block remove/attach detection signal input from the nose detection switch (S701)
“L”: front panel is attached
“L”: front panel is attached
35
BEEP
O
Beep sound drive signal output to the power amplifier (IC611)
36
NCO
O
Not used (open)
37
TEST IN
I
Setting terminal for the test mode “L”: test mode, Normally: fixed at “H”
38
ACC IN
I
Accessory detection signal input “L”: accessory on
39
NCO
O
Not used (open)
40
TELATT
I
Telephone detection signal input terminal At input of “H”, the signal is attenuated by –20 dB
41
NIH
I
Not used (fixed at “H”)
48
MDX-CA680/CA680X
Pin No.
Pin Name
I/O
Description
42
UNISO
O
Serial data output to the SONY bus interface (IC505)
43
UNISI
I
Serial data input from the SONY bus interface (IC505)
44
UNICKO
O
Serial clock signal output to the MD mechanism controller (IC501) and SONY bus interface
(IC505)
(IC505)
45
IIC SIO
I/O
Two-way data IIC bus with the FM/AM tuner unit (TU10), RDS decoder (IC51) (AEP, UK
models only) and electrical volume (IC401)
models only) and electrical volume (IC401)
46
NCO
O
Not used (open)
47
IIC CKO
O
IIC bus clock signal output to the FM/AM tuner unit (TU10), RDS decoder (IC51) (AEP, UK
models only) and electrical volume (IC401)
models only) and electrical volume (IC401)
48
NCO
O
Not used (open)
49
TUNON
O
Tuner system power supply on/off control signal output to the BA4908 (IC601)
“H”: tuner power on
“H”: tuner power on
50
PW ON
O
Main system power supply on/off control signal output to the BA4908 (IC601) “H”: power on
51 to 65
NCO
O
Not used (open)
66
AMPATT
O
Power amplifier muting on/off control signal output to the power amplifier (IC611)
“L”: muting on
“L”: muting on
67
AMPON
O
Standby on/off control signal output to the power amplifier (IC611)
“L”: standby mode, “H”: ampifier on
“L”: standby mode, “H”: ampifier on
68
NCO
O
Not used (open)
69
ATT
O
Audio line muting on/off control signal output “H”: muting on
70
VOLATT
O
Pre amplifier muting on/off control signal output to the electrical volume (IC401)
“L”: muting on
“L”: muting on
71 to 75
NCO
O
Not used (open)
76
COLSW
I
Setting terminal for the illumination color “L”: 2 colors, “H”: 1 color
MDX-CA680: fixed at “L”, MDX-CA680X: fixed at “H”
MDX-CA680: fixed at “L”, MDX-CA680X: fixed at “H”
77
COLSEL
I
Setting terminal for the illumination color “L”: amber, “H”: green
MDX-CA680: not used (fixed at “L”), MDX-CA680X: fixed at “H”
MDX-CA680: not used (fixed at “L”), MDX-CA680X: fixed at “H”
78
DIMSEL
I
Setting terminal for the dimmer “L”: no dimmer, “H”: dimmer in (fixed at “L” in this set)
79 to 85
NCO
O
Not used (open)
86
EEP SIO
I/O
Two-way data EEPROM bus with the FM/AM tuner unit (TU10)
87
EEP CKO
O
EEPROM bus clock signal output to the FM/AM tuner unit (TU10)
88
NCO
O
Not used (open)
89
FLASHW
I
Internal flash memory data write mode detection signal input terminal “L”: data write mode
Not used (fixed at “H”)
Not used (fixed at “H”)
90
NS_MASK
O
Discharge control signal output for the noise detection circuit “H”: discharge
91
XKEYON
O
A/D converter power control signal output
When the KEYACK (pin wh) that controls reference voltage power for key A/D conversion input
is active, “L” is output from this terminal to enable the input
When the KEYACK (pin wh) that controls reference voltage power for key A/D conversion input
is active, “L” is output from this terminal to enable the input
92
DOORIND
O
LED drive signal output of the MD disc slot illumination and Z indicator (LED810, LSW810)
“H”: LED on “H” is output to turn on LED when front panel is opened
“H”: LED on “H” is output to turn on LED when front panel is opened
93
ILLON
O
Power on/off control signal output of the illumination LED and liquid crystal display driver
(IC900) “H”: power on
(IC900) “H”: power on
94
DOORSW
I
Front panel open/close detection signal input “L” is input when the front panel is closed
95
DAVSS
—
Ground terminal (for D/A converter)
96, 97
RE_IN1, RE_IN0
I
Dial pulse input of the rotary encoder (RE901) (for VOLUME control)
98
RCIN1
I
Rotary remote commander shift key input terminal “L”: shift key on
99
NIL
I
Not used (fixed at “L”)
100
DAVCC
—
Power supply terminal (+5V) (for D/A converter)
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