Sony MDX-C800REC (serv.man2) Service Manual ▷ View online
21
3
P 1.7x2
5
PS 2x4
6
CN551
7
sled motor assy
4
spring (SL), leaf
1
OWH flexible board
2
wire
2-11. SLED MOTOR ASSY
2-12. SENSOR BOARD
5
PS 2x4
claw
4
PS 2x4
2
CN552
3
CN551
7
SENSOR board
6
1
Removal the solders
22
1
P 1.7x6
2
over write head (RF325-74A)
1
P 1.7x2
3
spindle motor assy
2
P 1.7x2
2-13. SPINDLE MOTOR ASSY
2-14. OVER WRITE HEAD
23
3
K 2x3
4
K 2x3
5
optical pick-up
6
main shaft
1
OWH flexible board
2
OWH flexible board
2-15. OPTICAL PICK-UP
24
3-1. IC PIN DESCRIPTIONS
• IC560 MB90574FPV-G-297-BND (MD CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
SCTX
O
Write data transmission timing output to CXD2652AR, ON/OFF output of magnet
head
2
LDON
O
Laser ON/OFF control output (“H”: Laser ON)
3
LOAD
O
Loading motor control output (Loading direction)
4
EJECT
O
Loading motor control output (Eject direction)
5
MDMON
O
MD mechanism deck power supply control output
6
LNKOFF
O
LINK OFF output to SONY BUS (“H”: LINK OFF, “L”: LINK ON)
7
UNIREQ
O
Request output to SONY BUS (“H”: Request ON) (Not used in this set.)
8
VCC
—
Power supply pin (+5 V)
9, 10
NC
—
Not used (Open)
11
FLASH-W
I
Select input for flash write (“L”: Flash write mode)
12
RXD/DSPSI
I
UART RXD data input
13
TXD/DSPSO
O
UART TXD data output
14
LIMIT-IN
I
Sled innermost track detection switch input (“L”: Innermost track)
15
EE CKO
O
Serial clock output for EEPROM
16
EE SIO
I/O
EEPROM data input/output
17
SENS IN
I
Disk photo sensor input (“H”: With desk)
18, 19
NC
—
Not used (Open)
20
SRDT
I
Data input from MD servo IC
21
SWDT
O
Data output to MD servo IC
22
SCLK
O
Clock output to MD servo IC
23, 24
NC
—
Not used (Open)
25
UNISI
I
Data input from SONY BUS
26
UNISO
O
Data output to SONY BUS
27
UNCKI
I
Clock input from SONY BUS
28
MOD
O
Laser modulation select signal output
29, 30
NC
—
Not used (Open)
31
FOPEN
I
Front panel open signal input
32
CLOSE OK
O
Front panel open/close request signal output
33
VSS
—
Ground pin
34
C
—
Power stabilization capacitor pin
35
AGCHK
O
Effect output when aging operation end of test mode
36
AGING
O
Output of aging operation condition when test mode (Normally, open)
37
TFTON
O
Output of drop running condition when test mode (Normally, open)
38
DVCC
—
Power supply pin for D/A converter (+5 V)
39
DVSS
—
Ground pin for D/A converter
40
ERR-PWM
O
PWM output of error rate (Normally, open)
41
ADER-PWM
O
PWM output of AD error (Normally, open)
42
AVCC
—
Power supply pin for A/D converter (+5 V)
43
AVRH
—
External reference power supply for A/D converter (Connect to AVCC in this set.)
44
AVRL
—
External reference power supply for A/D converter (Connect to AVSS in this set.)
45
AVSS
—
Ground pin for A/D converter
46
NC
—
Not used (Open)
47
ACNT
I
A/D input for designation on aging times of LOADING/EJECT
48
DOB-SEL
I
A/D input for designation on digital out bit number (Fixed at “H” in this set)
49
INIT
I
Initial input when reset
50, 51
TEST 0, 1
I
Test pin (Normally, open)
52
REF-SEL
I
Reference select input (Fixed at “L” in this set.)
53
NC
—
Not used (Open)
54
VCC
—
Power supply pin (+5 V)
55
TSTMOD
I
Test mode input (“L”: Test mode)
SECTION 3
DIAGRAMS
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