DOWNLOAD Sony DSX-A50BT / DSX-A50BTE Service Manual ↓ Size: 3.64 MB | Pages: 43 in PDF or view online for FREE

Model
DSX-A50BT DSX-A50BTE
Pages
43
Size
3.64 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
dsx-a50bt-dsx-a50bte.pdf
Date

Sony DSX-A50BT / DSX-A50BTE Service Manual ▷ View online

DSX-A50BT/A50BTE
29
•  IC Pin Function Description
MAIN  BOARD  IC101  R5F3650KCDZ98FB (SYSTEM  CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
NOSE_SW
I
Front panel remove/attach detection signal input terminal    “L”: front panel is attached
2
SIRCS
I
Remote control signal input from the remote control receiver
3 to 5
NC
-
Not used 
6
BYTE
I
External data bus width selection signal input terminal
7
CNVSS
I
Processor mode selection signal input terminal
8
XIN
I
Sub system clock input terminal (32.768 kHz)
9
XOUT
O
Sub system clock output terminal (32.768 kHz)
10
RESET
I
System reset signal input from the reset signal generator    “L”: reset    
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
11
OSCOUT
O
Main system clock output terminal (7.92 MHz)
12
VSS
-
Ground terminal
13
OSCIN
I
Main system clock input terminal (7.92 MHz)
14
VCC1
-
Power supply terminal (+3.3V)
15
NMI
I
Non-maskable interrupt signal input terminal    Fixed at “H” in this unit
16
CMD_ERR
I
Command error signal input from the USB controller
17
BUSY
I
Busy signal input from the USB controller
18
SYSRST
O
Reset signal output to the USB controller    “L”: reset
19
CE
O
Chip enable signal output to the USB controller
20
SDI
I
Serial data input from the USB controller
21
SCK
O
Serial data transfer clock signal output to the USB controller
22
SDO
O
Serial data output to the USB controller
23
USB_IN
I
USB device detection signal input from the USB controller
24
SYNC_OUT
O
Frequency control signal output to the DC/DC converter
25
WDT_MON
I
Watch-dog timer status monitor input from the USB controller
26
BEEP
O
Beep sound output to the power amplifi er
27, 28
NC
-
Not used 
29
FW_TXD
O
Serial data output terminal for fl ash writing
30
FW_RXD
I
Serial data input terminal for fl ash writing
31
FW_CLK
I
Serial data transfer clock signal input terminal for fl ash writing
32
FW_BUSY
O
Busy signal output terminal for fl ash writing
33 to 38
NC
-
Not used 
39
EPM
O
EPM signal output terminal    Fixed at “L” in this unit
40 to 43
DEBUG_1 to 
DEBUG_4
O
Debug terminal    Not used
44
CE
O
Chip enable signal output terminal    Fixed at “H” in this unit
45
HIT2_SDA
I/O
Two-way serial data bus with the tuner unit
46
HIT2_SCL
O
Serial data transfer clock signal output to the tuner unit
47
HIT2_RESET
O
Reset signal output to the tuner unit    “L”: reset
48
EN_USB
O
USB power switch on/off control signal output to the DC/DC converter    “H”: switch on
49
NC
-
Not used 
50
FLT_USB
I
USB power supply switch fault status signal input from the DC/DC converter
51
EN_SYS
O
VBUS power supply on/off control signal output to the DC/DC converter    “H”: power on
52
IPOD
O
Not used 
53
NC
-
Not used 
54
TELATT
I
Telephone attenuator detection signal input terminal    Fixed at “L” in this unit
55
ACC_IN
I
Accessory power detection signal input terminal
56
ATT
O
Audio muting on/off control signal output terminal    “H”: muting on
57
AMP_MUTE
O
Amplifi er muting on/off control signal output to the power amplifi er    “H”: muting on
58
AMPSTB
O
Standby signal output to the power amplifi er    “L”: standby
59
ILL_ON
O
Power supply on/off control signal output terminal for illumination LED    “H”: power on
60
VCC2
-
Power supply terminal (+3.3V)
61
NC
-
Not used 
62
VSS
-
Ground terminal
63
PIC_ERR
I
Error detection signal input from the power amplifi er    “L”: error
64
NC
-
Not used 
65
BT_MUTE (A50)
I
Muting on/off control signal input from the Bluetooth section    “H”: muting on
66
BU_IN
I
Back-up power detection signal input terminal
DSX-A50BT/A50BTE
30
Pin No.
Pin Name
I/O
Description
67 to 71
NC
-
Not used 
72
AMP_REM
O
Amplifi er remote output on/off control signal output terminal    “H”: output on
73
SYS_EN
O
System power on/off control signal output to the DC/DC converter    “H”: power on
74
AUDIO_EN
O
Power supply on/off control signal output terminal for audio section    “H”: power on
75
BT_TX (A50)
O
Serial data output to the Bluetooth section
76
BT_RX (A50)
I
Serial data input from the Bluetooth section
77, 78
NC
-
Not used 
79
RE_IN0
I
Jog dial pulse signal input from the rotary encoder (A phase input) (for volume)
80
RE_IN1
I
Jog dial pulse signal input from the rotary encoder (B phase input) (for volume)
81
BT_MIC_ON (A50)
O
Power supply on/off control signal output terminal for microphone signal    “H”: power on
82
BT_RTS (A50)
O
Return to send signal output to the Bluetooth section
83
BT_CTS (A50)
I
Clear to send signal input from the Bluetooth section
84
BT_RESET (A50)
O
Reset signal output to the Bluetooth section    “L”: reset
85
BT_POWER (A50)
O
Power supply on/off control signal output to the Bluetooth section    “H”: power on
86
NC
-
Not used 
87
SYS_ON
O
System on/off control signal output terminal    “L”: system on
88
RCIN1
I
Rotary commander shift key input terminal
89
KEYACK0
I
Key acknowledge detection signal input terminal for the rotary commander key entry
90
KEYACK1
I
Key acknowledge detection signal input terminal for the front panel key entry
91
NC
-
Not used 
92, 93
KEYIN1, KEYIN0
I
Front panel key signal input terminal
94
AVSS
-
Ground terminal (for A/D converter)
95
RC_IN0
I
Rotary commander key input terminal
96
AVRH
-
Reference voltage terminal (+3.3V) (for A/D converter)
97
AVDD
-
Power supply terminal (+3.3V) (for A/D converter)
98
LCD_CE
O
Chip enable signal output to the liquid crystal display driver
99
LCD_SO
O
Serial data output to the liquid crystal display driver
100
LCD_CLK
O
Serial data transfer clock signal output to the liquid crystal display driver
DSX-A50BT/A50BTE
31
MAIN  BOARD  IC201  LC786800E-00US-H 
(USB  CONTROLLER,  INPUT  SELECTOR,  AUDIO  DSP,  ELECTRICAL  VOLUME)
Pin No.
Pin Name
I/O
Description
1
LFOUT
O
Audio signal (front L-ch) output terminal
2
LROUT
O
Audio signal (rear L-ch) output terminal
3
LVRIN
I
Audio signal (L-ch) input terminal
4
DACOUT_L
O
Audio signal (L-ch) output terminal
5
DACOUT_R
O
Audio signal (R-ch) output terminal
6
RVRIN
I
Audio signal (R-ch) input terminal
7
RROUT
O
Audio signal (rear R-ch) output terminal
8
RFOUT
O
Audio signal (front R-ch) output terminal
9
L1_IN
I
Audio signal (tuner L-ch) input terminal
10
R1_IN
I
Audio signal (tuner R-ch) input terminal
11
L2_IN
I
Audio signal (Bluetooth L-ch) input terminal
12
R2_IN
I
Audio signal (Bluetooth R-ch) input terminal
13
L3_IN_P
I
Audio signal (AUX L-ch) input terminal (positive)
14
L3_IN_N
I
Audio signal (AUX L-ch) input terminal (negative)
15
R3_IN_P
I
Audio signal (AUX R-ch) input terminal (positive)
16
R3_IN_N
I
Audio signal (AUX R-ch) input terminal (negative)
17, 18
ATEST01, ATEST02
-
Analog test terminal    Not used
19
VREFOUT
O
External reference voltage output terminal
20
VREF_ADC
-
External capacitor connection terminal for audio A/D converter reference voltage
21
AVSS2
-
Ground terminal (for A/D converter)
22
AVDD2
-
Power supply terminal (+3.3V) (for A/D converter)
23 to 26
NC
-
Not used
27 to 30
GP50 to GP53
I/O
Not used
31
DVDD
-
Power supply terminal (+3.3V) (for digital system)
32
DVSS
-
Ground terminal (for digital system)
33 to 40
GP30 to GP37
I/O
Not used
41
DVDD
-
Power supply terminal (+3.3V) (for digital system)
42
DVSS
-
Ground terminal (for digital system)
43
REG1_EXTR
-
Internal regulator reserve terminal
44
DVDD15
-
External capacitor connection terminal for internal regulator
45
TXD1
O
Serial data output terminal    Not used
46
RXD1
I
Serial data input terminal    Not used
47, 48
OSC_CTL12, 
OSC_CTL13
I
Clock control signal input terminal    Not used
49
DVDD
-
Power supply terminal (+3.3V) (for digital system)
50
DVSS
-
Ground terminal (for digital system)
51
RESETB
I
Reset signal input from the system controller    “L”: reset
52
SIFCK
I
Serial data transfer clock signal input from the system controller
53
SIFDI
I
Serial data input from the system controller
54
SIFDO
O
Serial data output to the system controller
55
SIFCE
I
Chip enable signal input from the system controller
56
BUSYB
O
Busy signal output to the system controller
57
USB_IN
O
USB device detection signal output to the system controller
58, 59
GP40, GP41
I/O
Not used
60
WDT_MON
O
Watch-dog timer status monitor output to the system controller
61
CMD_ERR
O
Command error signal output to the system controller
62 to 65
GP44 to GP47
I/O
Not used
66
DVDD
-
Power supply terminal (+3.3V) (for digital system)
67
DVSS
-
Ground terminal (for digital system)
68
UDM1
I/O
Two-way USB data (–) bus terminal
69
UDP1
I/O
Two-way USB data (+) bus terminal
70
DVSS
-
Ground terminal (for digital system)
71
UDM2
I/O
Two-way USB data (–) bus terminal    Fixed at “L” in this unit
72
UDP2
I/O
Two-way USB data (+) bus terminal    Fixed at “L” in this unit
73
XVDD
-
Power supply terminal (+3.3V) (for oscillation circuit)
74
X12IN
I
System clock input terminal (12 MHz)
75
X12OUT
O
System clock output terminal (12 MHz)
76
DVSS
-
Ground terminal (for oscillation circuit)
DSX-A50BT/A50BTE
32
Pin No.
Pin Name
I/O
Description
77
AFILT
O
Charge pump output terminal (for audio PLL)
78
VVDD2
-
Power supply terminal (+3.3V) (for audio PLL)
79
VVDD3
-
Power supply terminal (+3.3V) (for system PLL)
80
DVDD
-
Power supply terminal (+3.3V) (for digital system)
81
DVSS
-
Ground terminal (for digital system)
82
CP_SCL
O
Serial data transfer clock signal output terminal    Fixed at “H” in this unit
83
SP_SDA
I/O
Two-way serial data bus terminal    Fixed at “H” in this unit
84, 85
GP07, GP06
I/O
Not used
86
CP_RESET
O
Reset signal output terminal    Not used
87
TEST0
I
Test mode setting terminal    Fixed at “L”
88
DVDD
-
Power supply terminal (+3.3V) (for digital system)
89
DVSS
-
Ground terminal (for digital system)
90
DVDD15
-
External capacitor connection terminal for internal regulator
91
JTRSTB
I
Reset signal input terminal (for JTAG)    Normally: fi xed at “L”
92
JTCK
I
Clock signal input terminal (for JTAG)    Normally: fi xed at “L”
93
JTDI
I
Data input terminal (for JTAG)    Normally: fi xed at “L”
94
JTMS
I
Mode selection signal input terminal (for JTAG)    Normally: fi xed at “H”
95
JTDO
O
Data output terminal (for JTAG)    Normally: open
96
JTRTCK
O
Return clock signal output terminal (for JTAG)    Normally: open
97
TEST1
I
Test mode setting terminal    Fixed at “L”
98
AVDD1
-
Power supply terminal (+3.3V) (for A/D converter)
99
AVSS1
-
Ground terminal (for A/D converter)
100
LRREF
-
External capacitor connection terminal for audio D/A converter and electrical volume reference 
voltage
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