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Model
CDX-T68X
Pages
52
Size
3.8 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
cdx-t68x.pdf
Date

Sony CDX-T68X Service Manual ▷ View online

13
CDX-T68X
GND
+
BUS cable
compact disc changer
master unit
power supply
(DC 14.4 V)
SECTION  3
MECHANICAL  ADJUSTMENT
• Elevator Height (Address) Adjustment
Note:
This adjustments is necessary when the system controller (IC301),
variable resistor (RV302), lever (CHK.L) assy, lever (CHK.R) assy,
or chassis (EV) assy was replaced for any repair.
Connection:
Adjustment Method:
1. Connect this set to the master unit (e.g. MDX-C7970/C7970R),
load a disc magazine, and place the set vertically as shown
below.
2. Connect the regulated power supply to the master unit, and
turn the power on.
3. Press the DISC button on the master unit and select DISC 6.
4. Adjust the variable resistor RV302 so that the reference holes
of the slider (6L) and of the chassis (6B) meet within an error
of 
±
0.15 mm when the tray is loaded at address 6.
RV302
slider (6L)
slider (6L)
(reference hole)
slider (6L)
(reference hole)
chassis (6B)
chassis (6B)
(address 6 hole)
0.15mm
0.15mm
14
CDX-T68X
GND
+
BUS cable
compact disc changer
master unit
power supply
(DC 14.4 V)
SECTION  4
ELECTRICAL  CHECK
Note:
1. This check is performed with the set placed horizontally.
2. Power supply voltage: DC14.4 V (more than 3 A).
3. Be sure to use the disc “YEDS-18” parts code: 3-702-101-01, but only
when indicated.
Connection:
Focus Bias Check
Connection:
– RF Board (Component Side) –
Procedure:
1. Connect the oscilloscope to TP (RFAC) and TP (VC) on the
RF board.
2. Put the set into play mode by loading the disc (YEDS-18).
3. Confirm that oscilloscope waveform is clear and check RF sig-
nal level is correct or not.
Note:
Clear RF signal waveform means that the shape “
” can be clearly distin-
guished at the center of the waveform.
When observing the eye pattern, set the oscilloscope to AC range
and raise the vertical sensitivity so that it may be easily seen.
RF signal waveform
VOLT/DIV: 200 mV
TIME/DIV: 500 ns
(10 : 1 probe in use)
level: 1.4 
+ 0.3
 Vp-p
– 0.4
oscilloscope
(AC range)
+
TP (VC)
TP (RFAC)
IC101
15
CDX-T68X
Tracking Offset Check
Connection:
– RF Board (Component Side) –
Procedure:
1. Connect the oscilloscope to TP (TE) and TP (VC) on the RF
board.
2. Put the set into play mode by loading the disc (YEDS-18).
3. Press the 
[        AMS        ]
 button on the master unit, and check
the traverse waveform*.
4. Confirm that the oscilloscope waveform is symmetrical on the
top and bottom in relation to 0 V dc, and check this level.
* Traverse waveform: This is the tracking error wave form appears
when crossing the track.
A
0 V
A=B
traverse waveform
(100 track jump waveform)
VOLT/DIV: 500 mV
TIME/DIV: 2 ms
Center: 0 V
Traverse waveform
.        >
oscilloscope
(DC range)
+
TP (TE)
TP (VC)
IC101
CDX-T68X
17
17
RFAC
SUMMING
AMP
RFDC
SUMMING
AMP
AC
SUM
4
3
EQ IN
7
8
9
A
B
C
D
RW/ROM
28
30
16
18
RFDCO
DC OFST
FE
TE
E
F
10
11
FOCUS
ERROR
AMP
TRACKING
ERROR
AMP
SW
PD
12
2
LD
1
APC AMP
RW/ROM
15
RFAC
RFAC
VCA
RF EQ
AMP
116, 115,
118, 117
RF
FE
TE
109 – 106, 7 – 5,
3 – 1, 111
9 – 12, 15 – 19,
21, 8
2, 3,
24, 25
5
23
4
22
RAS
CAS
WE
OE
113
119
114
120
XRAS
XCAS
XWE
XOE
VIBRATION
MEMORY
CONTROLLER
&
COMPRESSION
EXPANDER
A0 – A10
A0 – A10
DQ1 – DQ4
D0 – D3
RFAC
ASYI
ASYO
71
73
74
66 69 68 67
FILO
CLTV
PCO
FILI
ASYMMETRY
CORRECTOR
DIGITAL
PLL
EFM
DEMODULATOR
INTERNAL BUS
D/A
INTERFACE
ERROR
CORRECTOR
32k RAM
15
15
15
90
88
86
BCK
PCMD
LRCK
SELECTOR
DIGITAL
OUT
15
85
DOUT
15
93
15
94
XTAI
XTAO
CLOCK
GENERATOR
15
78
15
81
WDCK
GFS
15
23
15
25
15
24
15
26
15
14
15
15
15
17
DATA
CLOK
XLAT
SENS
SQSO
SQCK
SCOR
SUBCODE
PROCESSOR
CPU
INTERFACE
XRDE
XWRE
XQOK
15
9
15
8
15
12
XRDE
XWRE
XQOK
SERVO AUTO
SEQUENSOR
SCLK
FOK
XRST
27
35
21
SERVO
INTERFACE
45
SSTP
TE
FE
RF
SE
TE
FE
RFDC
61
60
62
58
OP AMP
ANALOG SW
A/D CONVERTER
SERVO DSP
PWM GENERATOR
50
51
48
49
46
47
43
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
MDP
MIRR
DECT
FOK
DIGITAL
CLV
8
9
6
7
12
13
10
11
5
4
VO3 +
VO3 –
VO4 +
VO4 –
VO1 +
VO1 –
VO2 +
VO2 –
VL0 +
VL0 –
VIN3 +
VIN3 –
VIN4 +
VIN4 –
VIN1 + B
VIN1 – B
FWD
REV
25
24
31
32
19
18
1
2
MOTOR
DRIVE
MOTOR
DRIVE
MOTOR
DRIVE
COIL
DRIVE
COIL
DRIVE
TRACKING/FOCUS COIL DRIVE,
SLED/SPINDLE/CHUCKING
MOTOR DRIVE
IC201
A
B
C
D
E
F
I-V AMP
PD
LD
DETECTOR
(TRACKING)
(FOCUS)
2-AXIS DEVICE
OPTICAL
PICK-UP BLOCK
(KSS-720A)
LASER DIODE
M
M
M101
(SLED)
M
M
M102
(SPINDLE)
M
M
M103
(CHUHCKING)
15
88
(L)
(R)
MUTING
Q502, 503
SW101
(LIMIT)
SW102
(CHUCKING END DETECT)
ON : When the optical pick-up
        is inner position
ON : When completion of the disc
        chucking operation
ON : When the optical pick-up
        is inner position
RW SEL
GRSCOR
GFS
CDDAT
CDCLK
CDLAT
SENS
SCOR
XRDE
XWRE
XQOK
SCLK
LIM SW
LOAD SW
XRST
FOK
SQSO
SQCK
99
53
42
61
59
60
44
52
64
65
63
43
98
97
62
41
56
58
LOADF
LOADR
5
6
CD-ROM/RW
SELECT SWITCH
Q302
RF AMP OFFSET
CONTROL SWITCH
Q102
MUTING CONTROL
SWITCH
Q501
CN902 (1/2)
• SIGNAL PATH
: CD PLAY
FILTER
DIGITAL SIGNAL PROCESSOR,
DIGITAL SERVO PROCESSOR,
D-RAM CONTROLLER
IC401
D-RAM
IC402
AUTOMATIC
POWER
CONTROL
Q101
RF AMP,
FOCUS/TRACKING ERROR AMP
IC101
6
SYSTEM CONTROLLER
IC301 (1/2)
VIN2 –
21
67
MUTE
MUTE
SAVE SW
96
LEVEL SHIFT
IC502 (2/2)
55
HS
66
EMPH
DIGITAL FILTER, D/A CONVERTER,
LOW-PASS FILTER
IC501
SERIAL
INPUT
INTERFACE
TIMING
GENERATOR
CPU
INTERFACE
OSC
LOW-PASS
FILTER
DIGITAL
FILTER
CIRCUIT
∆Σ
MODULATOR
CIRCUIT
DATA
BCK
LRCK
MCK
X501
16.9344MHz
RO
LO
HS
EMP
XO
XI
21
19
16
15
9
5
22
23
24
13
LEVEL
SHIFT
IC502
(1/2)
1
5
3
2
6
4
11
9
8
10
SECTION  5
DIAGRAMS
5-1.
BLOCK  DIAGRAM  – SERVO Section –
Page of 52
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