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Model
CDX-S2200
Pages
45
Size
4.63 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
cdx-s2200.pdf
Date

Sony CDX-S2200 Service Manual ▷ View online

13
CDX-S2200
SECTION 3
DIAGRAMS
3-1. IC PIN DESCRIPTIONS
• IC3 CXD3059BR (DIGITAL SERVO/DIGITAL SIGNAL PROCESSOR) (SERVO BOARD (1/2))
Pin No.
Pin Name
I/O
Pin Description
1
MIRR
I/O
Mirror signal input/output (Not used in this set)
2
DFCT
I/O
Defect signal input/output (Not used in this set)
3
FOK
I/O
Focus OK signal input/output
4
VSS
Ground
5
LOCK
I/O
Lock signal input/output (Not used in this set)
6
MDP
O
Spindle motor servo control signal output
7
SSTP
I
Disc most inner detection signal input (Fixed at L in this set)
8
IOVSS1
Digital ground
9
SFDR
O
Sled drive signal output (FWD direction)
10
SRDR
O
Sled drive signal output (REV direction)
11
TFDR
O
Tracking drive signal output (FWD direction)
12
TRDR
O
Tracking drive signal output (REV direction)
13
FFDR
O
Focus drive signal output (FWD direction)
14
FRDR
O
Focus drive signal output (REV direction)
15
IOVDD1
Digital power supply pin (+3.3 V)
16
AVDD0
Analog power supply pin (+3.2 V)
17
AVSS0
Analog ground
18
NC
Not used. (Open)
19
E
I
E signal input
20
F
I
F signal input
21
TEI
I
Tracking error signal input
22
TEO
O
Tracking error signal output
23
FEI
I
Focus error signal input
24
FEO
O
Focus error signal output
25
VC
I/O
VC voltage output/Center voltage input
26
A
I
A signal input
27
B
I
B signal input
28
C
I
C signal input
29
D
I
D signal input
30
NC
Not used. (Open)
31
AVDD4
Analog power supply pin (+3.2 V)
32
RFDCO
I/O
RFDC signal input/output (Not used in this set)
33
PDSENS
I
Reference voltage input (Fixed at L in this set)
34
AC_SUM
O
RFAC summing amplifier signal output
35
EQ_IN
I
Equalizer circuit signal input
36
LD
O
APC amplifier signal output
37
PD
I
APC amplifier signal input
38
NC
Not used. (Open)
39
RFC
I
EQ cut off frequency adjustment input
40
AVSS4
Analog ground
41
RFACO
O
RFAC signal output
42
RFACI
I
RFAC signal input
43
AVDD3
Analog power supply pin (+3.2 V)
44
BIAS
I
Asymmetry circuit constant current input
45
ASYI
I
Asymmetry comparate voltage input
46
ASYO
O
EFM full swing signal output
47
VPCO
O
Charge pump output
48
VCTL
I
VCO2 control voltage input
49
AVSS3
Analog ground
50
CLTV
I
VCO1 control voltage input
51
FILO
O
Filter signal output
14
CDX-S2200
Pin No.
Pin Name
I/O
Pin Description
52
FILI
I
Filter signal input
53
PCO
O
Charge pump output
54
AVDD5
Analog power supply pin (+3.3 V)
55
DDVROUT
O
DC/DC converter output
56
DDVRSEN
I
DC/DC converter output voltage monitor signal input
57
AVSS5
Analog ground
58
DDCR
I
Reset signal input
59
NC
Not used. (Open)
60
BCKI
I
D/A interface bit clock signal input
61
PCMDI
I
D/A interface serial data signal input
62
LRCKI
I
D/A interface LR clock signal input
63
LRCK
O
D/A interface LR clock signal output
64
VSS
Ground
65
PCMD
O
D/A interface serial data signal output
66
BCK
O
D/A interface bit clock signal output
67
VDD
Power supply pin (+2.6 V)
68
EMPH
O
Not used. (Open)
69
EMPHI
I
Not used. (Fixed at L in this set)
70
IOVDD2
Digital power supply pin (+3.3 V)
71
DOUT
Digital out signal output (Not used in this set)
72, 73
TEST
I
Test pin (Normally, fixed at L)
74
IOVSS2
Digital ground
75
NC
Not used. (Open)
76
XVSS
Ground
77
XTAO
O
Master clock signal output (16.9344 MHz)
78
XTAI
I
Master clock signal input (16.9344 MHz)
79
XVDD
Power supply pin (+2.6 V)
80
AVDD1
Analog power supply pin (+3.3 V)
81
AOUT1
O
L channel analog signal output
82
VREFL
O
L channel reference voltage output
83, 84
AVSS1,AVSS2
Analog ground
85
VREFR
O
R channel reference voltage output
86
AOUT2
O
R channel analog signal output
87
AVDD2
Analog power supply pin (+3.3 V)
88
NC
Not used. (Open)
89
IOVDD0
Digital power supply pin (+3.3 V)
90
RMUT
O
R channel “0” detection flug output
91
LMUT
O
L channel “0” detection flug output
92
NC
Not used. (Open)
93
XTSL
I
Sub clock signal input (Fixed at L in this set)
94
IOVSS0
Digital ground
95
XTACN
I
Oscillation circuit control signal input (Fixed at H in this set)
96
SQSO
O
Sub 80 bit, PCM peak and level data signal output
97
SQCK
I
Clock signal input
98
SBSO
O
Sub P-W serial data signal output (Not used in this set)
99
EXCK
I
Clock signal input (Not used in this set)
100
XRST
I
System reset signal input
101
SYSM
I
Mute signal input (Fixed at L in this set)
102
DATA
I
Serial data signal input
103
VSS
Ground
104
XLAT
I
Latch signal input
105
CLOK
I
Serial data transfer clock signal input
106
VDD
Power supply pin (+2.6 V)
15
CDX-S2200
Pin No.
Pin Name
I/O
Pin Description
107
SENS
O
SENS signal output
108
SCLK
I
Clock signal input
109
ATSK
I/O
Input/output for anti-shock. (Fixed at L in this set)
110
WFCK
O
WFCK signal output (Not used in this set)
111
XUGF
O
XUGF signal output (Not used in this set)
112
XPCK
O
XPCK signal output (Not used in this set)
113
GFS
O
GFS signal output
114
C2PO
O
C2PO signal output
115
SCOR
O
Sub code sync signal output
116
VDD
Power supply pin (+2.6 V)
117
C4M
O
4.2366 MHz signal output (Not used in this set)
118
WDCK
O
Word clock signal output (Not used in this set)
119
COUT
I/O
Track count signal output/output (Not used in this set)
120
NC
Not used. (Open)
16
CDX-S2200
• IC500 MN101E01JKD (SYSTEM CONTROL) (MAIN BOARD (2/2))
Pin No.
Pin Name
I/O
Pin Description
1
DAVDD
D/A converter power supply (+) pin (+3.3 V)
2
NCO
O
Not used. (Open)
3
DAVSS
D/A converter power supply (–) pin
4
UNISO
O
SONY-BUS data output (Not used in this set)
5
UNISI
I
SONY-BUS data input (Not used in this set)
6
UNICKO
O
SONY-BUS clock output (Not used in this set)
7
RETRA_SW
I
Not used. (Open)
8, 9
NCO
O
Not used. (Open)
10
VDD1
Power supply pin (+3.3 V)
11
MMOD
I
Not used. (Fixed at L in this set)
12
OSCOUT
O
Main clock output (27.648 MHz)
13
OSCIN
I
Main clock input (27.648 MHz)
14
VSS1
Ground
15
XIN
I
Sub clock input (32.768 kHz)
16
XOUT
O
Sub clock output (32.768 kHz)
17
VDD2
Power supply pin (+3.3 V)
18
MOD1
Not used. (Fixed at H in this set)
19
RESET
I
Microcomputer reset input
20
RCIN1
I
Rotary commander SHIFT key input
21
ACCIN
I
Accessory power supply detection input
22
TESTIN
I
Test mode detection input
23
TELATT
I
Telephone attenuator detection input
24
ATT
O
Audio mute control output
25
ADON
O
A/D converter power supply control output
26
NCO
O
Not used. (Open)
27
KEYACK
I
Key acknowledge detection input
28
TUATTIN
I
Mute zero cross detection input from tuner unit.
29
CDON
I
Servo power supply control input from CD system control IC.
30
CDMON
I
Loading 6V power supply control input from CD system control IC.
31
BUIN
I
Backup power supply detection input
32 to 35
NCO
O
Not used. (Open)
36
BUSON
O
BUS ON output to CD system control IC.
37
SYSRST
O
System reset output to CD system control IC.
38 to 41
NCO
O
Not used. (Open)
42
Z_MUTE
I
Mute zero cross detection input from CD system control IC.
43 to 49
NCO
O
Not used. (Open)
50
BBESEL
I
Not used. (Open)
51
NCO
O
Not used. (Open)
52
AREASEL1
I
Not used. (Open)
53
AREASEL0
I
Not used. (Open)
54 to 56
NCO
O
Not used. (Open)
57
EJECT_OK_SW
O
Eject OK output
58
PANELSW
I
Front panel detach detection input (L: with front panel, H: without front panel)
59
DIAG
I
Mode input from power amp IC.
60
VOLATT
O
Attenuator control output to electronic volume IC.
61
NOSESW
O
Not used. (Open)
62
NCO
O
Not used. (Open)
63
VSS2
Ground
64
TUATT
O
Tuner mute control output
65
NCO (TUON)
O
Not used. (Open)
66
NSMASK
O
Noise mask output
67
E2P_CKO
O
Serial clock output to EEPROM communication.
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