Sony CDX-S22 / CDX-S22S Service Manual ▷ View online
29
29
CDX-S22/S22S
CDX-S22/S22S
3-15. SCHEMATIC DIAGRAM — KEY SECTION (EXCEPT AEP, UK MODEL) —
(Page 25)
D901
D981
R972
C971
R984
R985
R986
R981
R982
R974
R976
R926
R936
R948
R930
R944
R952
R962
R967
R963
R961
R968
R939
CN901
R983
R977
R979
R978
R973
C981
C985
C986
C982
IC971
S901
S902
S903
LSW904(1/2)
S908
S909
LSW910(1/2)
LSW911(1/2)
S905
LSW906(1/2)
S907
S921
S920
S919
S918
S917
S916
S915
S914
S913
R906
R905
R904
R903
R902
R901
R907
R908
R909
R910
R911
R912
R913
R914
R915
R916
R917
R918
R919
D902
R987
C983
C984
D982
LCD901
LED931
LSW911(2/2)
LSW910(2/2)
LSW906(2/2)
LSW904(2/2)
LED932
IC901
Q921
LED951
R921
R922
LED901
R933
LED941
R925
LED942
LED909
R929
LED908
R935
LED902
LED913
LED914
LED915
R940
LED916
LED917
R943
LED918
LED919
LED921
R947
LED920
LED907
R951
LED903
LED952
R955
R956
R957
LED905
30
30
CDX-S22/S22S
CDX-S22/S22S
• IC Block Diagrams
IC1 BA5968FP-E2 (SERVO Board (2/2))
1
2
11
13
14
12
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
MUTE
FWD
FWD
LDCTL
NC
OPOUT1
NC
NC
OPOUT2
POWVCC
VCC
VOL–
VOL+
VO2–
VO2+
VO1–
VO1+
REV
OPIN4+
OPIN4–
OPOUT4
OPIN3+
OPIN3–
OPOUT3
MUTE
BIAS
GND
GND
GND
VO3–
VO3+
VO4–
VO4+
REV
OUTR OUTF
10
9
8
7
6
5
28
27
26
25
24
23
22
21
20
19
18
17
16
15
4
3
VDDA
INTERPOLATOR
RAM
BUFFER
&
CONTROL
LOGIC
TEST LOGIC
&
PIN MUX'S
I
2
C/SPI
INTERFACE
BAND PASS
FILTER
SIGMA DELTA
CONVERTER
SINC4
FILTER
REF3
REF2
REF1
VSS
VDDD
RESETN
TM
1
MPX
16
CSN
SDAOUT
RDSREG
3
INTN
MPX
SINC4REG
SDAIN
SCK
SPI
TESTREG
SCK
SPI
TESTREG
14
2
3
4
5
6
7
8
INTN
15
SA
13
SDA
12
SCL
11
OSCILLATOR
XTO
10
XTI
9
RDS
DEMODULATOR &
SYNCHRONIZATION
2
IC51 TDA7333013TR (MAIN Board (1/3)) (AEP, UK model)
IC401 BD3806FS-E2 (MAIN Board (1/3))
32
31
30
29
28
27
26
25
24
23
22
I
2
C BUS
LOGIC
VCO
MIX
FADER
(0~-58,
-∞dB)
FADER
(0~-58,
-∞dB)
FADER
(0~-58,
-∞dB)
FADER
(0~-58,
-∞dB)
VOLUME
(+23~-79dB,-∞dB
1dB STEP)
VOLUME
(+23~-79dB,-∞dB
1dB STEP)
INPUT GAIN
(0~15dB,1dB STEP)
INPUT SELECTOR
(4 STEREO INCLUDE 1 ISOLATION INPUT)
INPUT GAIN
(0~15dB,1dB STEP)
ANTI-ALIASING
FILTER
ANTI-ALIASING
FILTER
MUTE
fc:40kHz
fc:40kHz
MUTE
6
7
8
9
10
11
3
4
5
2
1
D-GND
A-GND
FIL
AN
BUS-LCH
BUS-RCH
TU-RCH
TU-LCH
CD-RCH
CD-LCH
NC
NC
NC
NC
NC
NC
NC
12
14
16
13
15
SDA
SCL
MUTE
SEL
ADJ
VCC
OUT-FR
OUT-RR
OUT-FL
OUT-RL
NC
NC
NC
OUT-SUB-R
OUT-SUB-L
21
20
19
18
17
VCC
VCC/2
TONE
PASS
PASS
BASS
fo:60,70,80,100,120,140,160,200Hz
Q:0.5,0.75,1,1.25
fo:60,70,80,100,120,140,160,200Hz
Q:0.5,0.75,1,1.25
MIDDLE
fo:500Hz,1kHz
Q:1
fo:500Hz,1kHz
Q:1
TABLE
fo:5,7.5,10,12.5kHz
fo:5,7.5,10,12.5kHz
TONE
PASS
PASS
EFFECT (0dB~
+20dB,2dB STEP)
EFFECT (0dB~
+20dB,2dB STEP)
2ND ORDER
LPF
2ND ORDER LPF
fc:OFF,80,120,160Hz
Q: 0.707
fc:OFF,80,120,160Hz
Q: 0.707
BASS,TREBLE, MIDDLE
(-15dB~+15dB,1dB STEP)
BASS,TREBLE, MIDDLE
(-15dB~+15dB,1dB STEP)
GAIN+ATT
(+10~-29,
-∞dB)
31
CDX-S22/S22S
IC750 TDA8588BJ/N2/R1 (MAIN Board (2/3)) (CDX-S22: E, MX model)
IC750 TDA8589BJ/N2/R1/M5 (MAIN Board (2/3)) (CDX-S22: AEP, UK/S22S)
IC750 TDA8589BJ/N2/R1/M5 (MAIN Board (2/3)) (CDX-S22: AEP, UK/S22S)
MUTE
MUTE
ENABLE
LOGIC
STANDBY/
MUTE
BATTERY
DETECTION
CHIP DETECT/
DIAGNOSTIC
PROTECTION/
DIAGNOSTIC
SWITCH
REGULATOR
SWITCH
REFERENCE
VOLTAGE
LOADDUMP
PROTECTION
TEMPERATURE
PROTECTION
BACK-UP
SWITCH
REGULATOR
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
TAB
OUT-FL-
OUT-FL+
OUT-RL-
OUT-RL+
IN-RL
S-GND
IN-RR
OUT-RR+
OUT-RR-
OUT-FR+
OUT-FR-
DIAG
ANT-REM
AMP-REM
SERVO3.3V
MECH6V
VP
B.UP+B
SDA
SCL
VP2
PGND3
SVR
IN-FL
IN-FR
BEEP
PGND2
VP1
STB
PGND1
RST
CRES
AUDIO8.3V
GND
PANEL+B
CBU
FL
RL
RR
VP
FR
I
2
C BUS
32
CDX-S22/S22S
• IC Pin Descriptions
IC3 MB90486BPFV-G-177E1 (CD SYSTEM CONTROL) (SERVO BOARD (2/2))
Pin No.
Pin Name
I/O
Pin Description
1
CDON_1500MV
O
Servo 1.5 V power supply control signal output
2 to 5
NC
O
Not used. (Open)
6
DRVON
O
Motor drive mute signal output
7
CD_BUS0
I/O
Bus data input/output 0
8
CD_BUS1
I/O
Bus data input/output 1
9
VSS
—
Ground
10
CD_BUS2
I/O
Bus data input/output 2
11
CD_BUS3
I/O
Bus data input/output 3
12
CD_BUCK
O
Bus clock signal output
13
CD_XCCE
O
Chip enable signal output
14
CD_XRST
O
Reset signal output
15
CD_ZDET
I
Zero detection signal input
16 to 20
NC
O
Not used. (Open)
21
VCC
—
Power supply pin (+3.3 V)
22
DAC_ZDETL
I
Zero data detection signal input (L-ch) (Fixed at L in this set)
23
DAC_ZDETR
I
Zero data detection signal input (R-ch) (Fixed at L in this set)
24
NC
O
Not used. (Open)
25
RXD
I
UART RXD data input (MCBUS/flash data input)
26
TXD
O
UART TXD data output (MCBUS/flash data output)
27
DEC_SSTBY
O
SRAM standby mode control signal output
28, 29
NC
O
Not used. (Open)
30
DEC_INT
I
Request signal input
31, 32
NC
O
Not used. (Open)
33
AVCC
—
Power supply pin for A/D converter. (+3.3 V)
34
AVRH
—
External reference power supply pin for A/D converter. (+3.3 V)
35
AVSS
—
Ground for A/D converter.
36
NC
O
Not used. (Open)
37
DEC_XMUTE
O
Mute signal output (L: mute)
38, 39
NC
O
Not used. (Open)
40
VSS
—
Ground
41
NC
O
Not used. (Open)
42
MEC_LIMIT
I
Sled LIMIT in switch detection signal input
43
MEC_LOAD
O
Loading motor control signal output (Loading direction)
44
MEC_EJECT
O
Loading motor control signal output (Eject direction)
45
MEC_INSW
I
DISC IN switch detection signal input
46
MEC_DSW
I
DOWN switch detection signal input
47, 48
MD0, MD1
I
Input for operation mode designation. (Fixed at H in this set)
49
MD2
I
Input for operation mode designation. (Connect to VSS in this set)
50
BUS_ON
I
Bus on signal input (L: bus on)
51
BU_IN
I
Backup power supply detection signal input
52
NC
O
Not used. (Open)
53
MEC_SELFSW
I
SELF load position detection switch signal input
54, 55
NC
O
Not used. (Open)
56
UNISI
I
SONY-BUS data signal input
57
UNISO
O
SONY-BUS data signal output
58
UNICKI
I
SONY-BUS clock signal input
59
LINKOFF
O
Link off signal output
60
A_ATT
O
Audio attenuator signal output
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