Sony CDX-R3300EE Service Manual ▷ View online
17
CDX-R3300EE
• IC500 MN101E01KDK (SYSTEM CONTROL) (MAIN BOARD (2/2))
Pin No.
Pin Name
I/O
Pin Description
1
DAVDD
—
D/A converter power supply (+) pin (+3.3 V)
2
NCO
O
Not used. (Open)
3
DAVSS
—
D/A converter power supply (–) pin
4
UNISO
O
SONY-BUS data output (Not used in this set)
5
UNISI
I
SONY-BUS data input (Not used in this set)
6
UNICKO
O
SONY-BUS clock output (Not used in this set)
7
RETRA_SW
I
Retractable CD door open/close detection switch input
(L: CD door open, H: CD door close)
8, 9
NCO
O
Not used. (Open)
10
VDD1
—
Power supply pin (+3.3 V)
11
MMOD
I
Not used. (Fixed at L in this set)
12
OSCOUT
O
Main clock output (27.648 MHz)
13
OSCIN
I
Main clock input (27.648 MHz)
14
VSS1
—
Ground
15
XIN
I
Sub clock input (32.768 kHz)
16
XOUT
O
Sub clock output (32.768 kHz)
17
VDD2
—
Power supply pin (+3.3 V)
18
MOD1
—
Not used. (Fixed at H in this set)
19
RESET
I
Microcomputer reset input
20
RCIN1
I
Rotary commander SHIFT key input
21
ACCIN
I
Accessory power supply detection input
22
TESTIN
I
Test mode detection input
23
TELATT
I
Telephone attenuator detection input
24
ATT
O
Audio mute control output
25
ADON
O
A/D converter power supply control output
26
NCO
O
Not used. (Open)
27
KEYACK
I
Key acknowledge detection input
28
TUATTIN
I
Not used. (Fixed at L in this set)
29
CDON
I
Servo power supply control input from CD system control IC.
30
CDMON
I
Loading 6V power supply control input from CD system control IC.
31
BUIN
I
Backup power supply detection input
32 to 35
NCO
O
Not used. (Open)
36
BUSON
O
BUS ON output to CD system control IC.
37
SYSRST
O
System reset output to CD system control IC.
38 to 41
NCO
O
Not used. (Open)
42
Z_MUTE
I
Mute zero cross detection input from CD system control IC.
43 to 49
NCO
O
Not used. (Open)
50
BBESEL
I
Fixed at H in this set.
51
NCO
O
Not used. (Open)
52
AREASEL1
I
Destination area initial setting input (Fixed at L in this set)
53
AREASEL0
I
Destination area initial setting input (Fixed at H in this set)
54 to 56
NCO
O
Not used. (Open)
57
EJECT_OK_SW
O
Eject OK output
58
PANELSW
I
Front panel detach detection input (L: with front panel, H: without front panel)
59
DIAG
I
Mode input from power amp IC.
60
VOLATT
O
Attenuator control output to electronic volume IC.
61
NOSESW
O
Not used. (Open)
62
NCO
O
Not used. (Open)
63
VSS2
—
Ground
64
TUATT
O
Tuner mute control output
65
NCO (TUON)
O
Not used. (Open)
66
NSMASK
O
Not used. (Open)
18
CDX-R3300EE
Pin No.
Pin Name
I/O
Pin Description
67
E2P_CKO
O
Serial clock output to EEPROM communication.
68
E2P_SIO
I/O
Serial data input/output with EEPROM communication.
69
DOORIND
O
Not used. (Open)
70
AMPSTB
O
Standby control output to power amp IC.
71
NCO
O
Not used. (Open)
72
FLS.SO/LCDSO
O
Serial data output to LCD driver IC.
73
FLS.SI/LCDCE
O
Chip enable output to LCD driver IC.
74
LCDCKO
O
Serial clock output to LCD driver IC.
75 to 78
NCO
O
Not used. (Open)
79
I2C_SIO
I/O
I2C bus serial data input/output
80
NCO
O
Not used. (Open)
81
I2C_CKO
O
I2C bus serial clock output
82
DAVN
I
Not used. (Fixed at L in this set)
83
SIRCS
I
SIRCS signal input
84
NCO
O
Not used. (Open)
85
BEEP
O
Beep output to power amp IC.
86 to 88
NCO
O
Not used. (Open)
89
VDD3
—
Power supply pin (+3.3 V)
90
NCO
O
Not used. (Open)
91
VSS3
—
Ground
92
QUALITY
I
Not used. (Fixed at L in this set)
93
VSM
I
S-meter voltage detection input
94, 95
KEYIN1, 0
I
Key input 1, 0
96
RCIN0
I
Rotary commander key input
97 to 99
NCO
O
Not used. (Open)
100
VREF+
—
A/D converter power supply (+) pin (+3.3 V)
19
19
CDX-R3300EE
46
ASYO
RF AMP,DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC3
41
RFACO
24
FEO
22
TEO
42 RFACI
23 FEI
21 TEI
13 FFDR
PD1
PD2
E
F
I-V AMP
PD
LD
DETECTOR
45 ASYI
27
26
29
28
19
20
E
C
D
A
B
F
36 LD
37
PD
(FOCUS)
(TRACKING)
2-AXIS DEVICE
OPTICAL
PICK-UP BLOCK
(KSS1000E)
• Signal path
: CD
LASER DIODE
M
M
M
13
12
VO1–
VO1+
6
7
VO4+
VO4–
8
9
VO3–
VO3+
5
4
VOL+
VOL–
FWD
REV
1
2
VIN2+ 22
14 FRDR
VIN2– 21
11 TFDR
VIN1+B 19
12 TRDR
VIN1–B 18
9 SFDR
VIN4+ 31
10 SRDR
VIN4– 32
6 MDP
VIN3+ 25
MUTE 34
11
10
VO2–
VO2+
M903
(LOADING)
M901
(SPINDLE)
M902
(SLED)
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING
MOTOR DRIVE
IC1
3
FOK
96
SQSO
97
SQCK
100
XRST
102
DATA
104
XLAT
105
CLOK
107
SENS
CD-L
81
AOUT1
86
AOUT2
R-CH
18 CD SQCK
15 CD XRST
15 CD XRST
14 CD DATA
13 CD XLAT
53 MEC_SELFSW
45 MEC_INSW
42 MEC_LIMIT
12 CD CLOK
11 CD SENS
108
SCLK
10 CD SCLK
113
GFS
8
CD GFS
114
C2PO
7
CD C2PO
115
SCOR
52 CD SCOR
81 X1
80 X0
MEC LOAD
43
MEC EJECT
44
CD
SYSTEM CONTROL
IC4
AUDIO INTERFACE
IC8
+1.5V REG
IC7
SYSTEM CONTROL
IC500 (1/3)
19 CD FOK
16 CD SQSO
DRON
41
SD1O
14
LRCK1B
19
LRCK1A
16
SD0O
11
BCK1B
18
BCK1A
15
CLCK
22
SRMSTB
41
RESET
2
STANDBY
3
BUCK
36
I2C SCL
7
I2C SDA
6
BUSO
28
SW2
(SELF)
46 MEC_DSW
SW1
(DOWN)
SW3
(DISC IN)
SW4
(LIMIT)
91
LMUT
22 CD LMUT
90
RMUT
23 CD RMUT
51
BU IN
75
RSTX
61
EJECT OK
67
MECON CHK
69
EMPH
32
DEC SDA
31
DEC SCL
30
DEC INT
29
DEC STBY
28
DEC XRST
27
DEC SSTBY
37
DEC XMUTE
65
DECON
63
MECON
64
CDON
66
ZMUTE
60
A ATT
PD1
E
F
LD
PD
FCS+
FCS–
TRK+
TRK–
PD2
LD DRIVE
Q1
+3.3V
CONTROL
Q5,6
+1.5V
CONTROL
Q2,3
• R-ch is omitted due to same as L-ch.
77
78
X1
16.9344MHz
X2
18.43MHz
XTAI
XTAO
66
BCK
60
BCKI
61
PCMDI
63
LRCK
62
LRCKI
65
PCMD
EJECK OK SW
M-ATT
BU IN
SYS RST
97
CD ON
VOUT
29
CDM ON
30
Z MUTE
MECH+6V
42
56
UNISI
25
RXD
57
UNISO
26
TXD
58
UNICLK
UNISI
5
UNISO
4
UNICKO
6
50
BUS ON
BUSON
36
68
CDON CHK
1
5
VDD
3
CE
+3.3V
+1.5V
VDDT+3.3V
+3.3V
D601
MAIN
SECTION
MAIN
SECTION
A
B
3-2. BLOCK DIAGRAM — CD SECTION —
(Page 20)
(Page 20)
20
20
CDX-R3300EE
J1
(ANTENNA)
1 ANT
CDL
CDR
CD-L
TU-L
R-CH
3
R
AUDIO 8.3V
TUNER UNIT
TU1
6
S-METER
14
SDA
SYSTEM CONTROL
IC500 (2/3)
24
ACCIN 21
TELATT 23
AMPSTB 70
BEEP 85
CD
SECTION
A
CD
SECTION
B
3
11
CN700
1
9
FL+
FL-
2
10
RL+
RL-
4
12
13
7
FR+
FR-
15
RR+
RR-
TEST
ACC
ATT
16 +B (BATT)
8 GND
R-CH
F901
10A
TU_ATT
BATT
3.3V
17
19
18
BATT
EEP_CKO
67
VSM
13
SCL
ATT
BATT
D493
59
TESTIN
DIAG
22
93
VOLATT
60
SOUND CONTROL
ELECTRONIC VOLUME
IC400
NC
BUS-LCH
5
C2
9
B2
7
SDA
SCL
MUTE
CONT.
EVR
29
I2C_SIO
I2C_CKO
79
81
17
E2P-SDA
16
E2P-SCL
7
TUN MUTE
11
VDD5V
10
VCC8.3V
68 EEP_SIO
64
R-CH
25
29
AUDIO OUT REAR
-1
L
R
-2
R-CH
J400
5 AMP-R
27
35
37
34
33
31
30
6 ANT-R
BEEP
STB
FL
RL
SUB-L
4
SCL
2
SDA
CONT.
9
7
6
20
POWER AMP
IC300 (1/2)
MULTIPLE VOLTAGE
REGULATOR
IC300 (2/2)
VP2
VP1
VP1
• Signal path
: FM
: AM
: CD
• R-ch is omitted due to same as L-ch.
12
BUIN
M-ATT
31
4
L
OUTF2
23
OUTR2
22
SYSRST 37
RESET 19
+5V REG.
Q3
BACK-UP CHECK/
LOW VOLTAGE
CHECK
Q606,607
OVER VOLTAGE
DET.
Q605,D602,603
RESET
IC502
LINE MUTE
CONTROL
Q491,492
TEL
ATT
ATT
Q701
I2C
BUS
ACC
CHECK
Q702
MUTE
Q440
MUTE
Q450
11
MUTE
TONE
INPUT SELECTOR
EFFECT
OUTS2
17
MUTE
Q480
5
3
DIAG
AMP-REM
ANT-REM
B.UP+B
PANEL+B
MECH 6V
SERVO 3.3V
AUDIO +B
3.3V
PANEL+B
MECH 6V
SERVO 3.3V
AUDIO 8.3V
SERVO 3.3V
AUDIO 8.3V
VP
D302
D301
D351
S103
(RESET)
MUTE
16
22
I2C
BUS
31
30
BU IN
SYS RST
1
4
3-3. BLOCK DIAGRAM — TUNER SECTION —
(Page 19)
(Page 19)
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